usb: dwc3: Add chained TRB support for ep0
dwc3 can do only max packet aligned transfers. So in case request length is not max packet aligned and is bigger than DWC3_EP0_BOUNCE_SIZE two chained TRBs is required to handle the transfer. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
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@ -48,7 +48,7 @@ static const char *dwc3_ep0_state_string(enum dwc3_ep0_state state)
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}
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static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma,
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u32 len, u32 type)
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u32 len, u32 type, unsigned chain)
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{
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struct dwc3_gadget_ep_cmd_params params;
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struct dwc3_trb *trb;
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@ -62,7 +62,10 @@ static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma,
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return 0;
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}
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trb = dwc->ep0_trb;
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trb = &dwc->ep0_trb[dep->free_slot];
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if (chain)
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dep->free_slot++;
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trb->bpl = lower_32_bits(buf_dma);
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trb->bph = upper_32_bits(buf_dma);
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@ -70,13 +73,20 @@ static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma,
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trb->ctrl = type;
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trb->ctrl |= (DWC3_TRB_CTRL_HWO
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| DWC3_TRB_CTRL_LST
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| DWC3_TRB_CTRL_IOC
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| DWC3_TRB_CTRL_ISP_IMI);
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if (chain)
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trb->ctrl |= DWC3_TRB_CTRL_CHN;
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else
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trb->ctrl |= (DWC3_TRB_CTRL_IOC
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| DWC3_TRB_CTRL_LST);
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dwc3_flush_cache((int)buf_dma, len);
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dwc3_flush_cache((int)trb, sizeof(*trb));
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if (chain)
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return 0;
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memset(¶ms, 0, sizeof(params));
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params.param0 = upper_32_bits(dwc->ep0_trb_addr);
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params.param1 = lower_32_bits(dwc->ep0_trb_addr);
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@ -289,7 +299,7 @@ void dwc3_ep0_out_start(struct dwc3 *dwc)
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int ret;
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ret = dwc3_ep0_start_trans(dwc, 0, dwc->ctrl_req_addr, 8,
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DWC3_TRBCTL_CONTROL_SETUP);
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DWC3_TRBCTL_CONTROL_SETUP, 0);
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WARN_ON(ret < 0);
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}
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@ -800,6 +810,23 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
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maxp = ep0->endpoint.maxpacket;
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if (dwc->ep0_bounced) {
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/*
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* Handle the first TRB before handling the bounce buffer if
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* the request length is greater than the bounce buffer size.
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*/
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if (ur->length > DWC3_EP0_BOUNCE_SIZE) {
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transfer_size = (ur->length / maxp) * maxp;
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transferred = transfer_size - length;
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buf = (u8 *)buf + transferred;
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ur->actual += transferred;
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trb++;
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dwc3_flush_cache((int)trb, sizeof(*trb));
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length = trb->size & DWC3_TRB_SIZE_MASK;
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ep0->free_slot = 0;
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}
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transfer_size = roundup((ur->length - transfer_size),
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maxp);
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transferred = min_t(u32, ur->length - transferred,
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@ -827,7 +854,7 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
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ret = dwc3_ep0_start_trans(dwc, epnum,
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dwc->ctrl_req_addr, 0,
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DWC3_TRBCTL_CONTROL_DATA);
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DWC3_TRBCTL_CONTROL_DATA, 0);
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WARN_ON(ret < 0);
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}
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}
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@ -908,11 +935,11 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
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if (req->request.length == 0) {
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ret = dwc3_ep0_start_trans(dwc, dep->number,
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dwc->ctrl_req_addr, 0,
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DWC3_TRBCTL_CONTROL_DATA);
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} else if (!IS_ALIGNED(req->request.length, dep->endpoint.maxpacket)
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&& (dep->number == 0)) {
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u32 transfer_size;
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dwc->ctrl_req_addr, 0,
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DWC3_TRBCTL_CONTROL_DATA, 0);
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} else if (!IS_ALIGNED(req->request.length, dep->endpoint.maxpacket) &&
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(dep->number == 0)) {
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u32 transfer_size = 0;
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u32 maxpacket;
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ret = usb_gadget_map_request(&dwc->gadget, &req->request,
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@ -922,10 +949,18 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
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return;
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}
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WARN_ON(req->request.length > DWC3_EP0_BOUNCE_SIZE);
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maxpacket = dep->endpoint.maxpacket;
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transfer_size = roundup(req->request.length, maxpacket);
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if (req->request.length > DWC3_EP0_BOUNCE_SIZE) {
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transfer_size = (req->request.length / maxpacket) *
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maxpacket;
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ret = dwc3_ep0_start_trans(dwc, dep->number,
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req->request.dma,
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transfer_size,
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DWC3_TRBCTL_CONTROL_DATA, 1);
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}
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transfer_size = roundup((req->request.length - transfer_size),
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maxpacket);
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dwc->ep0_bounced = true;
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@ -935,8 +970,8 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
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* TRBs to handle the transfer.
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*/
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ret = dwc3_ep0_start_trans(dwc, dep->number,
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dwc->ep0_bounce_addr, transfer_size,
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DWC3_TRBCTL_CONTROL_DATA);
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dwc->ep0_bounce_addr, transfer_size,
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DWC3_TRBCTL_CONTROL_DATA, 0);
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} else {
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ret = usb_gadget_map_request(&dwc->gadget, &req->request,
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dep->number);
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@ -946,7 +981,8 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
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}
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ret = dwc3_ep0_start_trans(dwc, dep->number, req->request.dma,
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req->request.length, DWC3_TRBCTL_CONTROL_DATA);
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req->request.length,
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DWC3_TRBCTL_CONTROL_DATA, 0);
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}
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WARN_ON(ret < 0);
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@ -961,7 +997,7 @@ static int dwc3_ep0_start_control_status(struct dwc3_ep *dep)
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: DWC3_TRBCTL_CONTROL_STATUS2;
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return dwc3_ep0_start_trans(dwc, dep->number,
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dwc->ctrl_req_addr, 0, type);
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dwc->ctrl_req_addr, 0, type, 0);
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}
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static void __dwc3_ep0_do_control_status(struct dwc3 *dwc, struct dwc3_ep *dep)
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@ -2580,7 +2580,7 @@ int dwc3_gadget_init(struct dwc3 *dwc)
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goto err0;
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}
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dwc->ep0_trb = dma_alloc_coherent(sizeof(*dwc->ep0_trb),
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dwc->ep0_trb = dma_alloc_coherent(sizeof(*dwc->ep0_trb) * 2,
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(unsigned long *)&dwc->ep0_trb_addr);
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if (!dwc->ep0_trb) {
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dev_err(dwc->dev, "failed to allocate ep0 trb\n");
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