Convert CONFIG_MXC_GPIO to Kconfig
This converts the following to Kconfig: CONFIG_MXC_GPIO Signed-off-by: Adam Ford <aford173@gmail.com>
This commit is contained in:
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f1754f0810
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8bbff6a70e
@ -669,11 +669,13 @@ config ARCH_MX8M
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config ARCH_MX25
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bool "NXP MX25"
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select CPU_ARM926EJS
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imply MXC_GPIO
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config ARCH_MX7ULP
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bool "NXP MX7ULP"
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select CPU_V7
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select ROM_UNIFIED_SECTIONS
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imply MXC_GPIO
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config ARCH_MX7
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bool "Freescale MX7"
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@ -683,6 +685,7 @@ config ARCH_MX7
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select SYS_FSL_SEC_LE
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select BOARD_EARLY_INIT_F
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select ARCH_MISC_INIT
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imply MXC_GPIO
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config ARCH_MX6
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bool "Freescale MX6"
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@ -691,6 +694,7 @@ config ARCH_MX6
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select SYS_FSL_SEC_COMPAT_4
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select SYS_FSL_SEC_LE
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select SYS_THUMB_BUILD if SPL
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imply MXC_GPIO
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if ARCH_MX6
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config SPL_LDSCRIPT
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@ -701,6 +705,7 @@ config ARCH_MX5
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bool "Freescale MX5"
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select CPU_V7
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select BOARD_EARLY_INIT_F
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imply MXC_GPIO
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config ARCH_QEMU
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bool "QEMU Virtual Platform"
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@ -33,6 +33,7 @@ CONFIG_CMD_UBI=y
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CONFIG_ENV_IS_IN_NAND=y
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CONFIG_FPGA_XILINX=y
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CONFIG_MMC_MXC=y
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CONFIG_MXC_GPIO=y
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CONFIG_NAND=y
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CONFIG_NAND_MXC=y
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CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
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@ -19,6 +19,7 @@ CONFIG_CMD_MTDPARTS=y
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CONFIG_MTDIDS_DEFAULT="nand0=mxc_nand,nor0=physmap-flash.0"
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CONFIG_MTDPARTS_DEFAULT="mtdparts=mxc_nand:50m(root1),32m(rootfb),64m(pcache),64m(app1),10m(app2),-(spool);physmap-flash.0:512k(u-boot),64k(env1),64k(env2),3776k(kernel1),3776k(kernel2)"
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CONFIG_ENV_IS_IN_FLASH=y
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CONFIG_MXC_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_NAND=y
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@ -12,6 +12,7 @@ CONFIG_CMD_PING=y
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CONFIG_CMD_BMP=y
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CONFIG_MTDPARTS_DEFAULT="mtdparts=physmap-flash.0:128k(uboot)ro,1536k(kernel),-(root)"
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CONFIG_ENV_IS_IN_EEPROM=y
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CONFIG_MXC_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_NETDEVICES=y
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@ -7,5 +7,6 @@ CONFIG_CMD_DHCP=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_DATE=y
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CONFIG_ENV_IS_IN_FLASH=y
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CONFIG_MXC_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_MTD_NOR_FLASH=y
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@ -14,6 +14,7 @@ CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_DATE=y
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CONFIG_ENV_IS_IN_NAND=y
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CONFIG_MXC_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_MXC=y
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@ -23,6 +23,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=mxc_nand:1m(boot),5m(linux),96m(root),8m(cfg),
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CONFIG_EFI_PARTITION=y
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# CONFIG_PARTITION_UUIDS is not set
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CONFIG_ENV_IS_IN_FLASH=y
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CONFIG_MXC_GPIO=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_NAND=y
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CONFIG_NAND_MXC=y
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@ -14,6 +14,7 @@ CONFIG_ENV_IS_IN_MMC=y
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CONFIG_DM=y
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CONFIG_DM_GPIO=y
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CONFIG_IMX_RGPIO2P=y
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# CONFIG_MXC_GPIO is not set
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CONFIG_DM_I2C=y
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CONFIG_DM_MMC=y
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CONFIG_PINCTRL=y
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@ -13,6 +13,7 @@ CONFIG_ENV_IS_IN_MMC=y
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CONFIG_DM=y
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CONFIG_DM_GPIO=y
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CONFIG_IMX_RGPIO2P=y
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# CONFIG_MXC_GPIO is not set
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CONFIG_DM_I2C=y
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CONFIG_DM_MMC=y
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CONFIG_PINCTRL=y
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@ -24,6 +24,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=mxc_nand:50m(root1),32m(rootfb),64m(pcache),64
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CONFIG_EFI_PARTITION=y
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# CONFIG_PARTITION_UUIDS is not set
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CONFIG_ENV_IS_IN_FLASH=y
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CONFIG_MXC_GPIO=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_NAND=y
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CONFIG_NAND_MXC=y
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@ -35,6 +35,7 @@ CONFIG_EFI_PARTITION=y
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# CONFIG_PARTITION_UUIDS is not set
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# CONFIG_SPL_PARTITION_UUIDS is not set
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CONFIG_ENV_IS_IN_FLASH=y
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CONFIG_MXC_GPIO=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_NAND=y
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CONFIG_NAND_MXC=y
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@ -108,6 +108,11 @@ config MSM_GPIO
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- APQ8016
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- MSM8916
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config MXC_GPIO
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bool "Freescale/NXP MXC UART driver"
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help
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Support GPIO controllers on various i.MX platforms
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config OMAP_GPIO
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bool "TI OMAP GPIO driver"
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depends on ARCH_OMAP2PLUS
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@ -33,7 +33,6 @@
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#define CONFIG_REVISION_TAG
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#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
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#define CONFIG_MXC_GPIO
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_OCOTP
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@ -101,7 +101,6 @@
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#define CONFIG_DFU_MMC
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/* Miscellaneous commands */
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#define CONFIG_MXC_GPIO
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/* Framebuffer and LCD */
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#define CONFIG_VIDEO_IPUV3
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@ -169,11 +169,6 @@
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_MXC_UART_BASE UART1_BASE
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/*
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* GPIO
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*/
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#define CONFIG_MXC_GPIO
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/*
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* NOR
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*/
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@ -89,7 +89,6 @@
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#define CONFIG_DFU_MMC
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/* Miscellaneous commands */
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#define CONFIG_MXC_GPIO
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/* Framebuffer and LCD */
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#define CONFIG_VIDEO_IPUV3
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@ -64,9 +64,6 @@
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#define CONFIG_MXC_OCOTP
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#endif
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/* GPIO */
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#define CONFIG_MXC_GPIO
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/* I2C Configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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@ -48,7 +48,6 @@
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#define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */
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#define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe
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#define CONFIG_MXC_SPI
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#define CONFIG_MXC_GPIO
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/*
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* UART (console)
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@ -50,7 +50,6 @@
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#define CONFIG_LAST_STAGE_INIT
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#define CONFIG_MXC_GPIO
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_OCOTP
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@ -131,11 +131,6 @@
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#define CONFIG_JFFS2_NAND
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#define CONFIG_MXC_NAND_HWECC
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/*
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* GPIO
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*/
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#define CONFIG_MXC_GPIO
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/*
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* U-Boot general configuration
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*/
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@ -147,8 +147,6 @@
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/* EET platform additions */
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#ifdef CONFIG_TARGET_IMX31_PHYCORE_EET
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#define CONFIG_MXC_GPIO
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#define CONFIG_HARD_SPI
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#define CONFIG_MXC_SPI
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@ -8,8 +8,6 @@
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#ifndef __M53EVK_CONFIG_H__
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#define __M53EVK_CONFIG_H__
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#define CONFIG_MXC_GPIO
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#include <asm/arch/imx-regs.h>
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#define CONFIG_REVISION_TAG
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@ -12,7 +12,6 @@
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/* High Level Configuration Options */
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#define CONFIG_SYS_TEXT_BASE 0x81200000
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#define CONFIG_MXC_GPIO
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#define CONFIG_SYS_FSL_CLK
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#define CONFIG_SYS_TIMER_RATE 32768
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#define CONFIG_MXC_SPI 1
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#define CONFIG_DEFAULT_SPI_BUS 1
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#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
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#define CONFIG_MXC_GPIO
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/* PMIC Controller */
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#define CONFIG_POWER
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@ -46,7 +46,6 @@
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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#define CONFIG_MXC_GPIO
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#define CONFIG_HARD_SPI
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#define CONFIG_MXC_SPI
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@ -42,7 +42,6 @@
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_MXC_SPI
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#define CONFIG_MXC_GPIO
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/*
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* PMIC Configs
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@ -36,7 +36,6 @@
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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#define CONFIG_MXC_GPIO
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/*
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* SPI Configs
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@ -23,8 +23,6 @@
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
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#define CONFIG_MXC_GPIO
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
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#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
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#define CONFIG_MXC_GPIO
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#define CONFIG_REVISION_TAG
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#define CONFIG_MXC_UART_BASE UART2_BASE
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
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#define CONFIG_MXC_GPIO
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
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#define CONFIG_MXC_GPIO
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#define CONFIG_REVISION_TAG
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#define CONFIG_MXC_UART
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#define CONFIG_MISC_INIT_R
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#define CONFIG_BOARD_LATE_INIT
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#define CONFIG_MXC_GPIO
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#define CONFIG_REVISION_TAG
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#define CONFIG_MXC_UART
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
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#define CONFIG_MXC_GPIO
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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#define CONFIG_SYS_CBSIZE 512
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#define CONFIG_SYS_MAXARGS 32
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/* GPIO */
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#define CONFIG_MXC_GPIO
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/* MMC */
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_FSL_ESDHC
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
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#define CONFIG_MXC_GPIO
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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#ifndef CONFIG_SYS_DCACHE_OFF
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#endif
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/* GPIO */
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#define CONFIG_MXC_GPIO
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/* UART */
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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#define CONFIG_MXC_GPIO
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/*
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* SPI Configs
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#define __CONFIG_H
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#define CONFIG_SYS_FSL_CLK
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#define CONFIG_MXC_GPIO
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#include <asm/arch/imx-regs.h>
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_SPD_BUS_NUM 0
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#define CONFIG_MXC_SPI
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#define CONFIG_MXC_GPIO
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/* PMIC Controller */
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#define CONFIG_POWER
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@ -76,8 +75,6 @@
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_DNS
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#define CONFIG_MXC_GPIO
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#define CONFIG_NET_RETRY_COUNT 100
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* Hardware drivers
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*/
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/*
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* GPIO
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*/
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#define CONFIG_MXC_GPIO
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/*
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* Serial
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*/
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@ -1428,7 +1428,6 @@ CONFIG_MX6DQ_LPDDR2
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CONFIG_MX6SX_SABRESD_REVA
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CONFIG_MX6UL_14X14_EVK_EMMC_REWORK
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CONFIG_MXC_EPDC
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CONFIG_MXC_GPIO
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CONFIG_MXC_GPT_HCLK
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CONFIG_MXC_MCI_REGS_BASE
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CONFIG_MXC_NAND_HWECC
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