m68k: Drop CONFIG_MCFPIT support
All platforms currently use the "MCFTMR" DMA timer rather than the PIT timer, so drop the MCFPIT code. Cc: Huan Wang <alison.wang@nxp.com> Cc: Angelo Dureghello <angelo@sysam.it> Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com> Cc: Wolfgang Wegner <w.wegner@astro-kom.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Angelo Dureghello <angelo@sysam.it>
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@ -28,12 +28,6 @@
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#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
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#endif
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#ifdef CONFIG_MCFPIT
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#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0)
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#define CONFIG_SYS_PIT_BASE (MMAP_PIT1)
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#define CONFIG_SYS_PIT_PRESCALE (6)
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#endif
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#define CONFIG_SYS_INTR_BASE (MMAP_INTC0)
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#define CONFIG_SYS_NUM_IRQS (128)
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#endif /* CONFIG_M520x */
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@ -62,12 +56,6 @@
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#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
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#endif
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#ifdef CONFIG_MCFPIT
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#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0)
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#define CONFIG_SYS_PIT_BASE (MMAP_PIT1)
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#define CONFIG_SYS_PIT_PRESCALE (6)
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#endif
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#define CONFIG_SYS_INTR_BASE (MMAP_INTC0)
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#define CONFIG_SYS_NUM_IRQS (128)
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#endif /* CONFIG_M52277 */
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@ -91,12 +79,6 @@
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#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
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#endif
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#ifdef CONFIG_MCFPIT
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#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0)
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#define CONFIG_SYS_PIT_BASE (MMAP_PIT1)
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#define CONFIG_SYS_PIT_PRESCALE (6)
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#endif
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#define CONFIG_SYS_INTR_BASE (MMAP_INTC0)
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#define CONFIG_SYS_NUM_IRQS (128)
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#endif /* CONFIG_M5235 */
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@ -285,12 +267,6 @@
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#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
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#endif
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#ifdef CONFIG_MCFPIT
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#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0)
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#define CONFIG_SYS_PIT_BASE (MMAP_PIT1)
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#define CONFIG_SYS_PIT_PRESCALE (6)
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#endif
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#define CONFIG_SYS_INTR_BASE (MMAP_INTC0)
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#define CONFIG_SYS_NUM_IRQS (128)
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#endif /* CONFIG_M5301x */
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@ -315,12 +291,6 @@
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#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
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#endif
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#ifdef CONFIG_MCFPIT
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#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0)
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#define CONFIG_SYS_PIT_BASE (MMAP_PIT1)
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#define CONFIG_SYS_PIT_PRESCALE (6)
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#endif
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#define CONFIG_SYS_INTR_BASE (MMAP_INTC0)
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#define CONFIG_SYS_NUM_IRQS (128)
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#endif /* CONFIG_M5329 && CONFIG_M5373 */
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@ -355,12 +325,6 @@
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#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
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#endif
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#ifdef CONFIG_MCFPIT
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#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0)
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#define CONFIG_SYS_PIT_BASE (MMAP_PIT1)
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#define CONFIG_SYS_PIT_PRESCALE (6)
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#endif
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#define CONFIG_SYS_INTR_BASE (MMAP_INTC0)
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#define CONFIG_SYS_NUM_IRQS (192)
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@ -391,12 +355,6 @@
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#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
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#endif
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#ifdef CONFIG_MCFPIT
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#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0)
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#define CONFIG_SYS_PIT_BASE (MMAP_PIT1)
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#define CONFIG_SYS_PIT_PRESCALE (6)
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#endif
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#define CONFIG_SYS_INTR_BASE (MMAP_INTC0)
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#define CONFIG_SYS_NUM_IRQS (128)
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@ -110,69 +110,6 @@ ulong get_timer(ulong base)
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#endif /* CONFIG_MCFTMR */
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#if defined(CONFIG_MCFPIT)
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#if !defined(CONFIG_SYS_PIT_BASE)
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# error "CONFIG_SYS_PIT_BASE not defined!"
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#endif
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static unsigned short lastinc;
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void __udelay(unsigned long usec)
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{
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volatile pit_t *timerp = (pit_t *) (CONFIG_SYS_UDELAY_BASE);
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uint tmp;
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while (usec > 0) {
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if (usec > 65000)
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tmp = 65000;
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else
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tmp = usec;
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usec = usec - tmp;
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/* Set up TIMER 3 as timebase clock */
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timerp->pcsr = PIT_PCSR_OVW;
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timerp->pmr = 0;
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/* set period to 1 us */
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timerp->pcsr |= PIT_PCSR_PRE(CONFIG_SYS_PIT_PRESCALE) | PIT_PCSR_EN;
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timerp->pmr = tmp;
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while (timerp->pcntr > 0) ;
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}
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}
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void timer_init(void)
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{
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volatile pit_t *timerp = (pit_t *) (CONFIG_SYS_PIT_BASE);
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timestamp = 0;
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/* Set up TIMER 4 as poll clock */
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timerp->pcsr = PIT_PCSR_OVW;
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timerp->pmr = lastinc = 0;
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timerp->pcsr |= PIT_PCSR_PRE(CONFIG_SYS_PIT_PRESCALE) | PIT_PCSR_EN;
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return 0;
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}
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ulong get_timer(ulong base)
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{
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unsigned short now, diff;
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volatile pit_t *timerp = (pit_t *) (CONFIG_SYS_PIT_BASE);
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now = timerp->pcntr;
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diff = -(now - lastinc);
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timestamp += diff;
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lastinc = now;
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return timestamp - base;
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}
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void wait_ticks(unsigned long ticks)
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{
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u32 start = get_timer(0);
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while (get_timer(start) < ticks) ;
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}
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#endif /* CONFIG_MCFPIT */
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/*
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* This function is derived from PowerPC code (read timebase as long long).
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* On M68K it just returns the timer value.
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@ -79,7 +79,6 @@ RTC_DEBUG -- define to show RTC debug message
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CONFIG_CMD_DATE -- enable to use date feature in U-Boot
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CONFIG_MCFTMR -- define to use DMA timer
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CONFIG_MCFPIT -- define to use PIT timer
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CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver
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CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
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@ -88,7 +88,6 @@ CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register
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MCFFEC_TOUT_LOOP -- set FEC timeout loop
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CONFIG_MCFTMR -- define to use DMA timer
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CONFIG_MCFPIT -- define to use PIT timer
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CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver
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CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
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@ -87,7 +87,6 @@ CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register
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MCFFEC_TOUT_LOOP -- set FEC timeout loop
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CONFIG_MCFTMR -- define to use DMA timer
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CONFIG_MCFPIT -- define to use PIT timer
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CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver
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CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
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@ -110,7 +110,6 @@ CONFIG_SYS_ATA_STRIDE -- define for Interval between registers
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_IO_BASE -- define for IO base address
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CONFIG_MCFTMR -- define to use DMA timer
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CONFIG_MCFPIT -- define to use PIT timer
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CONFIG_SYS_FSL_I2C -- define to use FSL common I2C driver
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CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
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@ -38,7 +38,6 @@
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/* Timer */
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#define CONFIG_MCFTMR
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#undef CONFIG_MCFPIT
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/* I2C */
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#define CONFIG_SYS_I2C
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@ -90,7 +90,6 @@
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/* Timer */
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#define CONFIG_MCFTMR
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#undef CONFIG_MCFPIT
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/* I2c */
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#define CONFIG_SYS_I2C
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@ -47,7 +47,6 @@
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/* Timer */
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#define CONFIG_MCFTMR
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#undef CONFIG_MCFPIT
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/* I2C */
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#define CONFIG_SYS_I2C
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@ -53,7 +53,6 @@
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/* Timer */
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#define CONFIG_MCFTMR
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#undef CONFIG_MCFPIT
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/* I2C */
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#define CONFIG_SYS_I2C
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/* Timer */
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#define CONFIG_MCFTMR
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#undef CONFIG_MCFPIT
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/* I2C */
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#define CONFIG_SYS_I2C
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/* Timer */
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#define CONFIG_MCFTMR
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#undef CONFIG_MCFPIT
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/* I2C */
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#define CONFIG_SYS_I2C
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@ -128,7 +128,6 @@
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/* Timer */
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#define CONFIG_MCFTMR
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#undef CONFIG_MCFPIT
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/* I2c */
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#undef CONFIG_SYS_FSL_I2C
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/* Timer */
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#define CONFIG_MCFTMR
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#undef CONFIG_MCFPIT
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/* I2c */
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#define CONFIG_SYS_I2C
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/* Timer */
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#define CONFIG_MCFTMR
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#undef CONFIG_MCFPIT
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/* I2c */
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#define CONFIG_SYS_I2C
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/* Timer */
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#define CONFIG_MCFTMR
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#undef CONFIG_MCFPIT
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/* I2C */
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#define CONFIG_SYS_I2C
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/* Timer */
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#define CONFIG_MCFTMR
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#undef CONFIG_MCFPIT
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/* DSPI and Serial Flash */
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#define CONFIG_CF_DSPI
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@ -1081,7 +1081,6 @@ CONFIG_MAX_RAM_BANK_SIZE
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CONFIG_MCF5249
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CONFIG_MCF5253
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CONFIG_MCFFEC
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CONFIG_MCFPIT
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CONFIG_MCFRTC
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CONFIG_MCFTMR
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CONFIG_MCLK_DIS
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