m68k: Drop CONFIG_MCFPIT support

All platforms currently use the "MCFTMR" DMA timer rather than the PIT
timer, so drop the MCFPIT code.

Cc: Huan Wang <alison.wang@nxp.com>
Cc: Angelo Dureghello <angelo@sysam.it>
Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com>
Cc: Wolfgang Wegner <w.wegner@astro-kom.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Angelo Dureghello <angelo@sysam.it>
This commit is contained in:
Tom Rini 2019-11-11 09:39:11 -05:00
parent ae3d38f318
commit 8947145cd0
18 changed files with 0 additions and 121 deletions

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@ -28,12 +28,6 @@
#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
#endif
#ifdef CONFIG_MCFPIT
#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0)
#define CONFIG_SYS_PIT_BASE (MMAP_PIT1)
#define CONFIG_SYS_PIT_PRESCALE (6)
#endif
#define CONFIG_SYS_INTR_BASE (MMAP_INTC0)
#define CONFIG_SYS_NUM_IRQS (128)
#endif /* CONFIG_M520x */
@ -62,12 +56,6 @@
#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
#endif
#ifdef CONFIG_MCFPIT
#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0)
#define CONFIG_SYS_PIT_BASE (MMAP_PIT1)
#define CONFIG_SYS_PIT_PRESCALE (6)
#endif
#define CONFIG_SYS_INTR_BASE (MMAP_INTC0)
#define CONFIG_SYS_NUM_IRQS (128)
#endif /* CONFIG_M52277 */
@ -91,12 +79,6 @@
#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
#endif
#ifdef CONFIG_MCFPIT
#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0)
#define CONFIG_SYS_PIT_BASE (MMAP_PIT1)
#define CONFIG_SYS_PIT_PRESCALE (6)
#endif
#define CONFIG_SYS_INTR_BASE (MMAP_INTC0)
#define CONFIG_SYS_NUM_IRQS (128)
#endif /* CONFIG_M5235 */
@ -285,12 +267,6 @@
#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
#endif
#ifdef CONFIG_MCFPIT
#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0)
#define CONFIG_SYS_PIT_BASE (MMAP_PIT1)
#define CONFIG_SYS_PIT_PRESCALE (6)
#endif
#define CONFIG_SYS_INTR_BASE (MMAP_INTC0)
#define CONFIG_SYS_NUM_IRQS (128)
#endif /* CONFIG_M5301x */
@ -315,12 +291,6 @@
#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
#endif
#ifdef CONFIG_MCFPIT
#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0)
#define CONFIG_SYS_PIT_BASE (MMAP_PIT1)
#define CONFIG_SYS_PIT_PRESCALE (6)
#endif
#define CONFIG_SYS_INTR_BASE (MMAP_INTC0)
#define CONFIG_SYS_NUM_IRQS (128)
#endif /* CONFIG_M5329 && CONFIG_M5373 */
@ -355,12 +325,6 @@
#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
#endif
#ifdef CONFIG_MCFPIT
#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0)
#define CONFIG_SYS_PIT_BASE (MMAP_PIT1)
#define CONFIG_SYS_PIT_PRESCALE (6)
#endif
#define CONFIG_SYS_INTR_BASE (MMAP_INTC0)
#define CONFIG_SYS_NUM_IRQS (192)
@ -391,12 +355,6 @@
#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
#endif
#ifdef CONFIG_MCFPIT
#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0)
#define CONFIG_SYS_PIT_BASE (MMAP_PIT1)
#define CONFIG_SYS_PIT_PRESCALE (6)
#endif
#define CONFIG_SYS_INTR_BASE (MMAP_INTC0)
#define CONFIG_SYS_NUM_IRQS (128)

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@ -110,69 +110,6 @@ ulong get_timer(ulong base)
#endif /* CONFIG_MCFTMR */
#if defined(CONFIG_MCFPIT)
#if !defined(CONFIG_SYS_PIT_BASE)
# error "CONFIG_SYS_PIT_BASE not defined!"
#endif
static unsigned short lastinc;
void __udelay(unsigned long usec)
{
volatile pit_t *timerp = (pit_t *) (CONFIG_SYS_UDELAY_BASE);
uint tmp;
while (usec > 0) {
if (usec > 65000)
tmp = 65000;
else
tmp = usec;
usec = usec - tmp;
/* Set up TIMER 3 as timebase clock */
timerp->pcsr = PIT_PCSR_OVW;
timerp->pmr = 0;
/* set period to 1 us */
timerp->pcsr |= PIT_PCSR_PRE(CONFIG_SYS_PIT_PRESCALE) | PIT_PCSR_EN;
timerp->pmr = tmp;
while (timerp->pcntr > 0) ;
}
}
void timer_init(void)
{
volatile pit_t *timerp = (pit_t *) (CONFIG_SYS_PIT_BASE);
timestamp = 0;
/* Set up TIMER 4 as poll clock */
timerp->pcsr = PIT_PCSR_OVW;
timerp->pmr = lastinc = 0;
timerp->pcsr |= PIT_PCSR_PRE(CONFIG_SYS_PIT_PRESCALE) | PIT_PCSR_EN;
return 0;
}
ulong get_timer(ulong base)
{
unsigned short now, diff;
volatile pit_t *timerp = (pit_t *) (CONFIG_SYS_PIT_BASE);
now = timerp->pcntr;
diff = -(now - lastinc);
timestamp += diff;
lastinc = now;
return timestamp - base;
}
void wait_ticks(unsigned long ticks)
{
u32 start = get_timer(0);
while (get_timer(start) < ticks) ;
}
#endif /* CONFIG_MCFPIT */
/*
* This function is derived from PowerPC code (read timebase as long long).
* On M68K it just returns the timer value.

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@ -79,7 +79,6 @@ RTC_DEBUG -- define to show RTC debug message
CONFIG_CMD_DATE -- enable to use date feature in U-Boot
CONFIG_MCFTMR -- define to use DMA timer
CONFIG_MCFPIT -- define to use PIT timer
CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver
CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged

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@ -88,7 +88,6 @@ CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register
MCFFEC_TOUT_LOOP -- set FEC timeout loop
CONFIG_MCFTMR -- define to use DMA timer
CONFIG_MCFPIT -- define to use PIT timer
CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver
CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged

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@ -87,7 +87,6 @@ CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register
MCFFEC_TOUT_LOOP -- set FEC timeout loop
CONFIG_MCFTMR -- define to use DMA timer
CONFIG_MCFPIT -- define to use PIT timer
CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver
CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged

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@ -110,7 +110,6 @@ CONFIG_SYS_ATA_STRIDE -- define for Interval between registers
_IO_BASE -- define for IO base address
CONFIG_MCFTMR -- define to use DMA timer
CONFIG_MCFPIT -- define to use PIT timer
CONFIG_SYS_FSL_I2C -- define to use FSL common I2C driver
CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged

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@ -38,7 +38,6 @@
/* Timer */
#define CONFIG_MCFTMR
#undef CONFIG_MCFPIT
/* I2C */
#define CONFIG_SYS_I2C

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@ -90,7 +90,6 @@
/* Timer */
#define CONFIG_MCFTMR
#undef CONFIG_MCFPIT
/* I2c */
#define CONFIG_SYS_I2C

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@ -47,7 +47,6 @@
/* Timer */
#define CONFIG_MCFTMR
#undef CONFIG_MCFPIT
/* I2C */
#define CONFIG_SYS_I2C

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@ -53,7 +53,6 @@
/* Timer */
#define CONFIG_MCFTMR
#undef CONFIG_MCFPIT
/* I2C */
#define CONFIG_SYS_I2C

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@ -47,7 +47,6 @@
/* Timer */
#define CONFIG_MCFTMR
#undef CONFIG_MCFPIT
/* I2C */
#define CONFIG_SYS_I2C

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@ -47,7 +47,6 @@
/* Timer */
#define CONFIG_MCFTMR
#undef CONFIG_MCFPIT
/* I2C */
#define CONFIG_SYS_I2C

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@ -128,7 +128,6 @@
/* Timer */
#define CONFIG_MCFTMR
#undef CONFIG_MCFPIT
/* I2c */
#undef CONFIG_SYS_FSL_I2C

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@ -97,7 +97,6 @@
/* Timer */
#define CONFIG_MCFTMR
#undef CONFIG_MCFPIT
/* I2c */
#define CONFIG_SYS_I2C

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@ -122,7 +122,6 @@
/* Timer */
#define CONFIG_MCFTMR
#undef CONFIG_MCFPIT
/* I2c */
#define CONFIG_SYS_I2C

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@ -57,7 +57,6 @@
/* Timer */
#define CONFIG_MCFTMR
#undef CONFIG_MCFPIT
/* I2C */
#define CONFIG_SYS_I2C

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@ -60,7 +60,6 @@
/* Timer */
#define CONFIG_MCFTMR
#undef CONFIG_MCFPIT
/* DSPI and Serial Flash */
#define CONFIG_CF_DSPI

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@ -1081,7 +1081,6 @@ CONFIG_MAX_RAM_BANK_SIZE
CONFIG_MCF5249
CONFIG_MCF5253
CONFIG_MCFFEC
CONFIG_MCFPIT
CONFIG_MCFRTC
CONFIG_MCFTMR
CONFIG_MCLK_DIS