ARC: Move BCR encodings to separate header file
We're starting to use more and more BCRs and having their definitions in-lined in sources becomes a bit annoying so we move it all to a separate header. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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arch/arc/include/asm/arc-bcr.h
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77
arch/arc/include/asm/arc-bcr.h
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@ -0,0 +1,77 @@
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/*
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* ARC Build Configuration Registers, with encoded hardware config
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*
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* Copyright (C) 2018 Synopsys
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* Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __ARC_BCR_H
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#define __ARC_BCR_H
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#ifndef __ASSEMBLY__
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#include <config.h>
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union bcr_di_cache {
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struct {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;
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#else
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unsigned int ver:8, config:4, sz:4, line_len:4, pad:12;
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#endif
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} fields;
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unsigned int word;
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};
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union bcr_slc_cfg {
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struct {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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unsigned int pad:24, way:2, lsz:2, sz:4;
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#else
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unsigned int sz:4, lsz:2, way:2, pad:24;
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#endif
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} fields;
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unsigned int word;
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};
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union bcr_generic {
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struct {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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unsigned int pad:24, ver:8;
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#else
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unsigned int ver:8, pad:24;
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#endif
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} fields;
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unsigned int word;
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};
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union bcr_clust_cfg {
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struct {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;
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#else
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unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7;
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#endif
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} fields;
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unsigned int word;
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};
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union bcr_mmu_4 {
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struct {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1,
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n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3;
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#else
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/* DTLB ITLB JES JE JA */
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unsigned int u_dtlb:3, u_itlb:3, n_super:2, n_entry:2, n_ways:2,
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pae:1, res:2, sz0:4, sz1:4, sasid:1, ver:8;
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#endif
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} fields;
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unsigned int word;
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};
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#endif /* __ASSEMBLY__ */
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#endif /* __ARC_BCR_H */
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@ -10,6 +10,7 @@
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#include <linux/kernel.h>
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#include <linux/log2.h>
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#include <asm/arcregs.h>
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#include <asm/arc-bcr.h>
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#include <asm/cache.h>
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/*
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@ -129,24 +130,11 @@ void read_decode_mmu_bcr(void)
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{
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/* TODO: should we compare mmu version from BCR and from CONFIG? */
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#if (CONFIG_ARC_MMU_VER >= 4)
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u32 tmp;
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union bcr_mmu_4 mmu4;
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tmp = read_aux_reg(ARC_AUX_MMU_BCR);
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mmu4.word = read_aux_reg(ARC_AUX_MMU_BCR);
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struct bcr_mmu_4 {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1,
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n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3;
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#else
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/* DTLB ITLB JES JE JA */
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unsigned int u_dtlb:3, u_itlb:3, n_super:2, n_entry:2, n_ways:2,
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pae:1, res:2, sz0:4, sz1:4, sasid:1, ver:8;
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#endif /* CONFIG_CPU_BIG_ENDIAN */
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} *mmu4;
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mmu4 = (struct bcr_mmu_4 *)&tmp;
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pae_exists = !!mmu4->pae;
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pae_exists = !!mmu4.fields.pae;
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#endif /* (CONFIG_ARC_MMU_VER >= 4) */
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}
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@ -264,27 +252,9 @@ static void arc_ioc_setup(void)
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#ifdef CONFIG_ISA_ARCV2
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static void read_decode_cache_bcr_arcv2(void)
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{
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union {
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struct {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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unsigned int pad:24, way:2, lsz:2, sz:4;
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#else
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unsigned int sz:4, lsz:2, way:2, pad:24;
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#endif
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} fields;
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unsigned int word;
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} slc_cfg;
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union {
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struct {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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unsigned int pad:24, ver:8;
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#else
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unsigned int ver:8, pad:24;
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#endif
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} fields;
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unsigned int word;
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} sbcr;
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union bcr_slc_cfg slc_cfg;
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union bcr_clust_cfg cbcr;
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union bcr_generic sbcr;
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sbcr.word = read_aux_reg(ARC_BCR_SLC);
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if (sbcr.fields.ver) {
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@ -293,17 +263,6 @@ static void read_decode_cache_bcr_arcv2(void)
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slc_line_sz = (slc_cfg.fields.lsz == 0) ? 128 : 64;
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}
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union {
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struct bcr_clust_cfg {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;
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#else
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unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7;
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#endif
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} fields;
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unsigned int word;
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} cbcr;
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cbcr.word = read_aux_reg(ARC_BCR_CLUSTER);
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if (cbcr.fields.c && ioc_enable)
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ioc_exists = true;
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@ -313,17 +272,7 @@ static void read_decode_cache_bcr_arcv2(void)
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void read_decode_cache_bcr(void)
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{
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int dc_line_sz = 0, ic_line_sz = 0;
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union {
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struct {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;
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#else
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unsigned int ver:8, config:4, sz:4, line_len:4, pad:12;
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#endif
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} fields;
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unsigned int word;
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} ibcr, dbcr;
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union bcr_di_cache ibcr, dbcr;
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ibcr.word = read_aux_reg(ARC_BCR_IC_BUILD);
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if (ibcr.fields.ver) {
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