Coding style cleanup; update CHANEGLOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
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CHANGELOG
30
CHANGELOG
@ -1,3 +1,33 @@
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commit 7c803be2eb3cae245dedda438776e08fb122250f
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Author: Wolfgang Denk <wd@denx.de>
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Date: Tue Sep 16 18:02:19 2008 +0200
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TQM8xx: Fix CFI flash driver support for all TQM8xx based boards
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After switching to using the CFI flash driver, the correct remapping
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of the flash banks was forgotten.
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Also, some boards were not adapted, and the old legacy flash driver
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was not removed yet.
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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commit c0d2f87d6c450128b88e73eea715fa3654f65b6c
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Author: Wolfgang Denk <wd@denx.de>
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Date: Sun Sep 14 00:59:35 2008 +0200
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Prepare v2008.10-rc2
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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commit f12e4549b6fb01cd2654348af95a3c7a6ac161e7
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Author: Wolfgang Denk <wd@denx.de>
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Date: Sat Sep 13 02:23:05 2008 +0200
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Coding style cleanup, update CHANGELOG
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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commit 0c32565f536609d78feef35c88bbc39d3ac53a73
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Author: Peter Tyser <ptyser@xes-inc.com>
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Date: Wed Sep 10 09:18:34 2008 -0500
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@ -400,8 +400,6 @@ phys_size_t initdram (int board_type)
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memctl->memc_or5 = CFG_OR5_ISP1362;
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memctl->memc_br5 = CFG_BR5_ISP1362;
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#endif /* CONFIG_ISP1362_USB */
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return (size_b0 + size_b1);
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}
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@ -453,7 +451,7 @@ int board_early_init_r (void)
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#ifdef CONFIG_MISC_INIT_R
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int misc_init_r (void)
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{
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volatile immap_t *immap = (immap_t *)CFG_IMMR;
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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volatile memctl8xx_t *memctl = &immap->im_memctl;
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#ifdef CFG_OR_TIMING_FLASH_AT_50MHZ
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@ -463,28 +461,29 @@ int misc_init_r (void)
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if (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_TRLX) {
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trlx = OR_TRLX;
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scy *= 2;
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} else
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} else {
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trlx = 0;
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}
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/*
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* We assume that each 10MHz of bus clock require 1-clk SCY
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* adjustment.
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*/
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/*
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* We assume that each 10MHz of bus clock require 1-clk SCY
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* adjustment.
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*/
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clk_diff = (gd->bus_clk / 1000000) - 50;
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/*
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* We need proper rounding here. This is what the "+5" and "-5"
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* are here for.
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*/
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/*
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* We need proper rounding here. This is what the "+5" and "-5"
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* are here for.
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*/
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if (clk_diff >= 0)
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scy += (clk_diff + 5) / 10;
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else
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scy += (clk_diff - 5) / 10;
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/*
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* For bus frequencies above 50MHz, we want to use relaxed timing
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* (OR_TRLX).
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*/
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/*
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* For bus frequencies above 50MHz, we want to use relaxed timing
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* (OR_TRLX).
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*/
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if (gd->bus_clk >= 50000000)
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trlx = OR_TRLX;
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else
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@ -499,35 +498,39 @@ int misc_init_r (void)
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scy = 1;
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flash_or_timing = (scy << 4) | trlx |
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(CFG_OR_TIMING_FLASH_AT_50MHZ & ~(OR_TRLX | OR_SCY_MSK));
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(CFG_OR_TIMING_FLASH_AT_50MHZ & ~(OR_TRLX | OR_SCY_MSK));
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memctl->memc_or0 = flash_or_timing | (-flash_info[0].size & OR_AM_MSK);
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memctl->memc_or0 =
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flash_or_timing | (-flash_info[0].size & OR_AM_MSK);
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#else
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memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-flash_info[0].size & OR_AM_MSK);
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memctl->memc_or0 =
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CFG_OR_TIMING_FLASH | (-flash_info[0].size & OR_AM_MSK);
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#endif
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memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
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debug ("## BR0: 0x%08x OR0: 0x%08x\n",
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memctl->memc_br0, memctl->memc_or0);
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memctl->memc_br0, memctl->memc_or0);
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if (flash_info[1].size) {
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#ifdef CFG_OR_TIMING_FLASH_AT_50MHZ
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memctl->memc_or1 = flash_or_timing |
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(-flash_info[1].size & 0xFFFF8000);
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(-flash_info[1].size & 0xFFFF8000);
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#else
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memctl->memc_or1 = CFG_OR_TIMING_FLASH |
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(-flash_info[1].size & 0xFFFF8000);
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(-flash_info[1].size & 0xFFFF8000);
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#endif
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memctl->memc_br1 = ((CFG_FLASH_BASE + flash_info[0].size) & BR_BA_MSK) |
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BR_MS_GPCM | BR_V;
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memctl->memc_br1 =
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((CFG_FLASH_BASE +
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flash_info[0].
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size) & BR_BA_MSK) | BR_MS_GPCM | BR_V;
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debug ("## BR1: 0x%08x OR1: 0x%08x\n",
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memctl->memc_br1, memctl->memc_or1);
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memctl->memc_br1, memctl->memc_or1);
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} else {
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memctl->memc_br1 = 0; /* invalidate bank */
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memctl->memc_br1 = 0; /* invalidate bank */
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debug ("## DISABLE BR1: 0x%08x OR1: 0x%08x\n",
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memctl->memc_br1, memctl->memc_or1);
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memctl->memc_br1, memctl->memc_or1);
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}
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# ifdef CONFIG_IDE_LED
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@ -540,11 +543,11 @@ int misc_init_r (void)
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#ifdef CONFIG_NSCU
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/* wake up ethernet module */
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immap->im_ioport.iop_pcpar &= ~0x0004; /* GPIO pin */
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immap->im_ioport.iop_pcdir |= 0x0004; /* output */
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immap->im_ioport.iop_pcso &= ~0x0004; /* for clarity */
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immap->im_ioport.iop_pcdat |= 0x0004; /* enable */
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#endif /* CONFIG_NSCU */
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immap->im_ioport.iop_pcpar &= ~0x0004; /* GPIO pin */
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immap->im_ioport.iop_pcdir |= 0x0004; /* output */
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immap->im_ioport.iop_pcso &= ~0x0004; /* for clarity */
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immap->im_ioport.iop_pcdat |= 0x0004; /* enable */
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#endif /* CONFIG_NSCU */
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return (0);
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}
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@ -609,7 +612,4 @@ int last_stage_init(void)
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return 0;
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}
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#endif
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/* ------------------------------------------------------------------------- */
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