TI:am33xx: Create common config files for TI ARMv7 platforms, and AM33xx
We create two new files, include/configs/ti_armv7_common.h for all of the common IP blocks and related features / commands we share in virtually all of our platforms. We then create include/configs/ti_am335x_common.h for everything common to the am335x SoC leaving just the board specific parts to include/configs/ti_am335x_common.h. Signed-off-by: Tom Rini <trini@ti.com>
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@ -16,44 +16,20 @@
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#ifndef __CONFIG_AM335X_EVM_H
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#define __CONFIG_AM335X_EVM_H
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#define CONFIG_AM33XX
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#define CONFIG_OMAP
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#define CONFIG_OMAP_COMMON
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#include <configs/ti_am335x_common.h>
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#include <asm/arch/omap.h>
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#define CONFIG_DMA_COHERENT
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#define CONFIG_DMA_COHERENT_SIZE (1 << 20)
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#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
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#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
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#define CONFIG_SYS_PROMPT "U-Boot# "
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#define CONFIG_BOARD_LATE_INIT
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#define CONFIG_SYS_NO_FLASH
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#define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */
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#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
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#define CONFIG_OF_LIBFDT
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_STACKSIZE (128 * 1024)
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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/* Clock Defines */
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#define V_OSCK 24000000 /* Clock output from T2 */
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#define V_SCLK (V_OSCK)
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/* Custom script for NOR */
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#define CONFIG_SYS_LDSCRIPT "board/ti/am335x/u-boot.lds"
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#define CONFIG_SYS_CACHELINE_SIZE 64
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/* commands to include */
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#include <config_cmd_default.h>
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#define CONFIG_CMD_ASKENV
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#define CONFIG_VERSION_VARIABLE
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/* Always 128 KiB env size */
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#define CONFIG_ENV_SIZE (128 << 10)
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#ifdef CONFIG_NAND
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#define NANDARGS \
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@ -76,10 +52,8 @@
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#define NANDARGS ""
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#endif
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/* set to negative value for no autoboot */
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#define CONFIG_BOOTDELAY 1
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#define CONFIG_ENV_VARS_UBOOT_CONFIG
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#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"loadaddr=0x80200000\0" \
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@ -197,60 +171,11 @@
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"run mmcboot;" \
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"run nandboot;"
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/* Clock Defines */
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#define V_OSCK 24000000 /* Clock output from T2 */
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#define V_SCLK (V_OSCK)
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#define CONFIG_CMD_ECHO
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/* We set the max number of command args high to avoid HUSH bugs. */
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#define CONFIG_SYS_MAXARGS 64
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/* Console I/O Buffer Size */
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#define CONFIG_SYS_CBSIZE 512
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
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+ sizeof(CONFIG_SYS_PROMPT) + 16)
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/*
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* memtest works on 8 MB in DRAM after skipping 32MB from
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* start addr of ram disk
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*/
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#define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024))
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \
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+ (8 * 1024 * 1024))
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#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_OMAP_HSMMC
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#define CONFIG_CMD_MMC
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#define CONFIG_DOS_PARTITION
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#define CONFIG_CMD_FAT
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#define CONFIG_FAT_WRITE
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_EXT4
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#define CONFIG_CMD_FS_GENERIC
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#define CONFIG_SPI
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#define CONFIG_OMAP3_SPI
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#define CONFIG_MTD_DEVICE
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_WINBOND
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#define CONFIG_CMD_SF
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#define CONFIG_SF_DEFAULT_SPEED (24000000)
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/* USB Composite download gadget - g_dnl */
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#define CONFIG_USB_GADGET
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#define CONFIG_USBDOWNLOAD_GADGET
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/* USB TI's IDs */
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#define CONFIG_USBD_HS
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#define CONFIG_G_DNL_VENDOR_NUM 0x0403
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#define CONFIG_G_DNL_PRODUCT_NUM 0xBD00
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#define CONFIG_G_DNL_MANUFACTURER "Texas Instruments"
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@ -284,109 +209,24 @@
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"rootfs part 0 9"
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#endif
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
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#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
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#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
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#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
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#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
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GENERATED_GBL_DATA_SIZE)
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/* Platform/Board specific defs */
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#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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#define CONFIG_SYS_HZ 1000 /* 1ms clock */
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/* NS16550 Configuration */
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK (48000000)
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#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
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#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
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#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
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#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
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#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
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#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
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#define CONFIG_BAUDRATE 115200
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/* I2C Configuration */
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#define CONFIG_I2C
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#define CONFIG_CMD_I2C
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#define CONFIG_HARD_I2C
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_I2C_SLAVE 1
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_DRIVER_OMAP24XX_I2C
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#define CONFIG_CMD_EEPROM
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#define CONFIG_ENV_EEPROM_IS_ON_I2C
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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#define CONFIG_SYS_I2C_MULTI_EEPROMS
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#define CONFIG_OMAP_GPIO
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#define CONFIG_BAUDRATE 115200
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/* CPU */
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_ENV_OVERWRITE 1
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#define CONFIG_SYS_CONSOLE_INFO_QUIET
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/* SPL */
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#ifndef CONFIG_NOR_BOOT
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/* Defines for SPL */
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#define CONFIG_SPL
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#define CONFIG_SPL_FRAMEWORK
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/*
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* Place the image at the start of the ROM defined image space.
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* We limit our size to the ROM-defined downloaded image area, and use the
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* rest of the space for stack.
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*/
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#define CONFIG_SPL_TEXT_BASE 0x402F0400
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#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
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#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
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#define CONFIG_SPL_OS_BOOT
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#define CONFIG_SPL_BSS_START_ADDR 0x80a00000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
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#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
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#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
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#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
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#ifdef CONFIG_SPL_OS_BOOT
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/* fat */
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#define CONFIG_SPL_FAT_LOAD_KERNEL_NAME "uImage"
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#define CONFIG_SPL_FAT_LOAD_ARGS_NAME "args"
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#define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_DRAM_1 + 0x100)
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/* raw mmc */
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#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
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/* nand */
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#ifdef CONFIG_NAND
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#define CONFIG_CMD_SPL_NAND_OFS 0x240000 /* end of u-boot */
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
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#endif
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/* spl export command */
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#define CONFIG_CMD_SPL
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#endif
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SPL_FAT_SUPPORT
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#define CONFIG_SPL_I2C_SUPPORT
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBDISK_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_GPIO_SUPPORT
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#define CONFIG_SPL_YMODEM_SUPPORT
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#define CONFIG_SPL_NET_SUPPORT
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#define CONFIG_SPL_ENV_SUPPORT
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@ -401,14 +241,7 @@
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#define CONFIG_SPL_MUSB_NEW_SUPPORT
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#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
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#define CONFIG_SPL_BOARD_INIT
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#ifdef CONFIG_NAND
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#define CONFIG_SPL_NAND_AM33XX_BCH
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#define CONFIG_SPL_NAND_SUPPORT
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#define CONFIG_SPL_NAND_BASE
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#define CONFIG_SPL_NAND_DRIVERS
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#define CONFIG_SPL_NAND_ECC
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
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CONFIG_SYS_NAND_PAGE_SIZE)
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@ -428,30 +261,16 @@
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#define CONFIG_SYS_NAND_ECCBYTES 14
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
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#endif
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#endif
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/*
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* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
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* 64 bytes before this address should be set aside for u-boot.img's
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* header. That is 0x800FFFC0--0x80100000 should not be used for any
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* other needs.
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* For NOR boot, we must set this to the start of where NOR is mapped
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* in memory.
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*/
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#ifdef CONFIG_NOR_BOOT
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#define CONFIG_SYS_TEXT_BASE 0x08000000
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#else
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#define CONFIG_SYS_TEXT_BASE 0x80800000
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#endif
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#define CONFIG_SYS_SPL_MALLOC_START 0x80a08000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
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/* Since SPL did pll and ddr initialization for us,
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* we don't need to do it twice.
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*/
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#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT)
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#endif
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/*
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@ -506,7 +325,6 @@
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#define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */
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#define CONFIG_ENV_OFFSET (768 << 10) /* 768 KiB in */
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#define CONFIG_ENV_OFFSET_REDUND (896 << 10) /* 896 KiB in */
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#define CONFIG_CMD_MTDPARTS
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#define MTDIDS_DEFAULT "nor0=m25p80-flash.0"
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#define MTDPARTS_DEFAULT "mtdparts=m25p80-flash.0:128k(SPL)," \
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"512k(u-boot),128k(u-boot-env1)," \
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@ -519,22 +337,13 @@
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#define CONFIG_SYS_MMC_ENV_PART 2
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#endif
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/* Unsupported features */
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#undef CONFIG_USE_IRQ
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/* SPI flash. */
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#define CONFIG_CMD_SF
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_WINBOND
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#define CONFIG_SF_DEFAULT_SPEED 24000000
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_PING
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#define CONFIG_DRIVER_TI_CPSW
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#define CONFIG_MII
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#define CONFIG_BOOTP_DEFAULT
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#define CONFIG_BOOTP_DNS
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#define CONFIG_BOOTP_DNS2
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#define CONFIG_BOOTP_SEND_HOSTNAME
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_SUBNETMASK
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#define CONFIG_NET_RETRY_COUNT 10
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#define CONFIG_NET_MULTI
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/* Network. */
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#define CONFIG_PHY_GIGE
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_ADDR 0
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@ -543,14 +352,7 @@
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/* NAND support */
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#ifdef CONFIG_NAND
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_NAND_OMAP_GPMC
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#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
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#define CONFIG_SYS_NAND_BASE (0x08000000) /* physical address */
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/* to access nand at */
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/* CS0 */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND
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devices */
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#if !defined(CONFIG_SPI_BOOT) && !defined(CONFIG_NOR_BOOT)
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#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
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#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:128k(SPL)," \
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@ -579,6 +381,7 @@
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*/
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#if defined(CONFIG_NOR)
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#undef CONFIG_SYS_NO_FLASH
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#define CONFIG_CMD_FLASH
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
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#define CONFIG_SYS_FLASH_PROTECTION
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#define CONFIG_SYS_FLASH_CFI
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@ -594,7 +397,6 @@
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#define CONFIG_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
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#define CONFIG_ENV_OFFSET (512 << 10) /* 512 KiB */
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#define CONFIG_ENV_OFFSET_REDUND (768 << 10) /* 768 KiB */
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#define CONFIG_CMD_MTDPARTS
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#define MTDIDS_DEFAULT "nor0=physmap-flash.0"
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#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \
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"512k(u-boot)," \
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@ -602,8 +404,6 @@
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"128k(u-boot-env2)," \
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"4m(kernel),-(rootfs)"
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#endif
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#define CONFIG_MTD_DEVICE
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#define CONFIG_CMD_FLASH
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#endif /* NOR support */
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#endif /* ! __CONFIG_AM335X_EVM_H */
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include/configs/ti_am335x_common.h
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60
include/configs/ti_am335x_common.h
Normal file
@ -0,0 +1,60 @@
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/*
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* ti_am335x_common.h
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*
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* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* For more details, please see the technical documents listed at
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* http://www.ti.com/product/am3359#technicaldocuments
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*/
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#ifndef __CONFIG_TI_AM335X_COMMON_H__
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#define __CONFIG_TI_AM335X_COMMON_H__
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#define CONFIG_AM33XX
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#define CONFIG_BOARD_LATE_INIT
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_SYS_CACHELINE_SIZE 64
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#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
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#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
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#include <asm/arch/omap.h>
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/* NS16550 Configuration */
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK 48000000
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/* Network defines. */
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_PING
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#define CONFIG_DRIVER_TI_CPSW
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#define CONFIG_MII
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#define CONFIG_BOOTP_DEFAULT
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#define CONFIG_BOOTP_DNS
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#define CONFIG_BOOTP_DNS2
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#define CONFIG_BOOTP_SEND_HOSTNAME
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_SUBNETMASK
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#define CONFIG_NET_RETRY_COUNT 10
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/* SPL defines. */
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#define CONFIG_SPL_TEXT_BASE 0x402F0400
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#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
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#define CONFIG_SPL_YMODEM_SUPPORT
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/*
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* Since SPL did pll and ddr initialization for us,
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* we don't need to do it twice.
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*/
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#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT)
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#endif
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/* Now bring in the rest of the common code. */
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#include <configs/ti_armv7_common.h>
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#endif /* __CONFIG_TI_AM335X_COMMON_H__ */
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include/configs/ti_armv7_common.h
Normal file
248
include/configs/ti_armv7_common.h
Normal file
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/*
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* ti_armv7_common.h
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*
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* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* The various ARMv7 SoCs from TI all share a number of IP blocks when
|
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* implementing a given feature. Rather than define these in every
|
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* board or even SoC common file, we define a common file to be re-used
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* in all cases. While technically true that some of these details are
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* configurable at the board design, they are common throughout SoC
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* reference platforms as well as custom designs and become de facto
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* standards.
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*/
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#ifndef __CONFIG_TI_ARMV7_COMMON_H__
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#define __CONFIG_TI_ARMV7_COMMON_H__
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/* Common define for many platforms. */
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#define CONFIG_OMAP
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#define CONFIG_OMAP_COMMON
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/*
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* We typically do not contain NOR flash. In the cases where we do, we
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* undefine this later.
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*/
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#define CONFIG_SYS_NO_FLASH
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/* Support both device trees and ATAGs. */
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#define CONFIG_OF_LIBFDT
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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/*
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* Our DDR memory always starts at 0x80000000 and U-Boot shall have
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* relocated itself to higher in memory by the time this value is used.
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*/
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#define CONFIG_SYS_LOAD_ADDR 0x80000000
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/*
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* Default to a quick boot delay.
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*/
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#define CONFIG_BOOTDELAY 1
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/*
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* DDR information. We say (for simplicity) that we have 1 bank,
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* always, even when we have more. We always start at 0x80000000,
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* and we place the initial stack pointer in our SRAM.
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
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GENERATED_GBL_DATA_SIZE)
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/* Timer information. */
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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#define CONFIG_SYS_HZ 1000 /* 1ms clock */
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/* I2C IP block */
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#define CONFIG_I2C
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#define CONFIG_CMD_I2C
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#define CONFIG_HARD_I2C
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_I2C_SLAVE 1
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_DRIVER_OMAP24XX_I2C
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/* MMC/SD IP block */
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_OMAP_HSMMC
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||||
#define CONFIG_CMD_MMC
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/* McSPI IP block */
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#define CONFIG_SPI
|
||||
#define CONFIG_OMAP3_SPI
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|
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/* GPIO block */
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#define CONFIG_OMAP_GPIO
|
||||
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/*
|
||||
* GPMC NAND block. We support 1 device and the physical address to
|
||||
* access CS0 at is 0x8000000.
|
||||
*/
|
||||
#ifdef CONFIG_NAND
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||||
#define CONFIG_CMD_NAND
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||||
#define CONFIG_NAND_OMAP_GPMC
|
||||
#define CONFIG_SYS_NAND_BASE 0x8000000
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||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#endif
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||||
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||||
/*
|
||||
* The following are general good-enough settings for U-Boot. We set a
|
||||
* large malloc pool as we generally have a lot of DDR, and we opt for
|
||||
* function over binary size in the main portion of U-Boot as this is
|
||||
* generally easily constrained later if needed. We enable the config
|
||||
* options that give us information in the environment about what board
|
||||
* we are on so we do not need to rely on the command prompt. We set a
|
||||
* console baudrate of 115200 and use the default baud rate table.
|
||||
*/
|
||||
#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
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||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_AUTO_COMPLETE
|
||||
#define CONFIG_CMDLINE_EDITING
|
||||
#define CONFIG_SYS_PROMPT "U-Boot# "
|
||||
#define CONFIG_VERSION_VARIABLE
|
||||
#define CONFIG_ENV_VARS_UBOOT_CONFIG
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
/* We set the max number of command args high to avoid HUSH bugs. */
|
||||
#define CONFIG_SYS_MAXARGS 64
|
||||
|
||||
/* Console I/O Buffer Size */
|
||||
#define CONFIG_SYS_CBSIZE 512
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||||
/* Print Buffer Size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
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||||
+ sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
/* Boot Argument Buffer Size */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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||||
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||||
#define CONFIG_ENV_OVERWRITE
|
||||
#define CONFIG_SYS_CONSOLE_INFO_QUIET
|
||||
|
||||
/*
|
||||
* When we have SPI, NOR or NAND flash we expect to be making use of
|
||||
* mtdparts, both for ease of use in U-Boot and for passing information
|
||||
* on to the Linux kernel.
|
||||
*/
|
||||
#if defined(CONFIG_SPI_BOOT) || defined(CONFIG_NOR) || defined(CONFIG_NAND)
|
||||
#define CONFIG_MTD_DEVICE /* Required for mtdparts */
|
||||
#define CONFIG_CMD_MTDPARTS
|
||||
#endif
|
||||
|
||||
/*
|
||||
* For commands to use, we take the default list and add a few other
|
||||
* useful commands. Note that we must have set CONFIG_SYS_NO_FLASH
|
||||
* prior to this include, in order to skip a few commands. When we do
|
||||
* have flash, if we expect these commands they must be enabled in that
|
||||
* config.
|
||||
*/
|
||||
#include <config_cmd_default.h>
|
||||
#define CONFIG_CMD_ASKENV
|
||||
#define CONFIG_CMD_ECHO
|
||||
#define CONFIG_CMD_BOOTZ
|
||||
|
||||
/*
|
||||
* Common filesystems support. When we have removable storage we
|
||||
* enabled a number of useful commands and support.
|
||||
*/
|
||||
#if defined(CONFIG_MMC) || defined(CONFIG_USB_STORAGE)
|
||||
#define CONFIG_DOS_PARTITION
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_FAT_WRITE
|
||||
#define CONFIG_CMD_EXT2
|
||||
#define CONFIG_CMD_EXT4
|
||||
#define CONFIG_CMD_FS_GENERIC
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Our platforms make use of SPL to initalize the hardware (primarily
|
||||
* memory) enough for full U-Boot to be loaded. We also support Falcon
|
||||
* Mode so that the Linux kernel can be booted directly from SPL
|
||||
* instead, if desired. We make use of the general SPL framework found
|
||||
* under common/spl/. Given our generally common memory map, we set a
|
||||
* number of related defaults and sizes here.
|
||||
*/
|
||||
#ifndef CONFIG_NOR_BOOT
|
||||
#define CONFIG_SPL
|
||||
#define CONFIG_SPL_FRAMEWORK
|
||||
#define CONFIG_SPL_OS_BOOT
|
||||
|
||||
/*
|
||||
* Place the image at the start of the ROM defined image space.
|
||||
* We limit our size to the ROM-defined downloaded image area, and use the
|
||||
* rest of the space for stack. We load U-Boot itself into memory at
|
||||
* 0x80800000 for legacy reasons (to not conflict with older SPLs). We
|
||||
* have our BSS be placed 1MiB after this, to allow for the default
|
||||
* Linux kernel address of 0x80008000 to work, in the Falcon Mode case.
|
||||
* We have the SPL malloc pool at the end of the BSS area.
|
||||
*/
|
||||
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
|
||||
#define CONFIG_SYS_TEXT_BASE 0x80800000
|
||||
#define CONFIG_SPL_BSS_START_ADDR 0x80a00000
|
||||
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
|
||||
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
|
||||
CONFIG_SPL_BSS_MAX_SIZE)
|
||||
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
|
||||
|
||||
/* RAW SD card / eMMC locations. */
|
||||
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
|
||||
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
|
||||
|
||||
/* FAT sd card locations. */
|
||||
#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
|
||||
#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
|
||||
|
||||
#ifdef CONFIG_SPL_OS_BOOT
|
||||
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100)
|
||||
|
||||
/* FAT */
|
||||
#define CONFIG_SPL_FAT_LOAD_KERNEL_NAME "uImage"
|
||||
#define CONFIG_SPL_FAT_LOAD_ARGS_NAME "args"
|
||||
|
||||
/* RAW SD card / eMMC */
|
||||
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */
|
||||
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
|
||||
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
|
||||
|
||||
/* NAND */
|
||||
#ifdef CONFIG_NAND
|
||||
#define CONFIG_CMD_SPL_NAND_OFS 0x240000 /* end of u-boot */
|
||||
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
|
||||
#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
|
||||
#endif
|
||||
|
||||
/* spl export command */
|
||||
#define CONFIG_CMD_SPL
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MMC
|
||||
#define CONFIG_SPL_MMC_SUPPORT
|
||||
#define CONFIG_SPL_FAT_SUPPORT
|
||||
#endif
|
||||
|
||||
/* General parts of the framework. */
|
||||
#define CONFIG_SPL_I2C_SUPPORT
|
||||
#define CONFIG_SPL_LIBCOMMON_SUPPORT
|
||||
#define CONFIG_SPL_LIBDISK_SUPPORT
|
||||
#define CONFIG_SPL_LIBGENERIC_SUPPORT
|
||||
#define CONFIG_SPL_SERIAL_SUPPORT
|
||||
#define CONFIG_SPL_GPIO_SUPPORT
|
||||
#define CONFIG_SPL_BOARD_INIT
|
||||
|
||||
#ifdef CONFIG_NAND
|
||||
#define CONFIG_SPL_NAND_AM33XX_BCH /* OMAP4 and later ELM support */
|
||||
#define CONFIG_SPL_NAND_SUPPORT
|
||||
#define CONFIG_SPL_NAND_BASE
|
||||
#define CONFIG_SPL_NAND_DRIVERS
|
||||
#define CONFIG_SPL_NAND_ECC
|
||||
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
|
||||
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
|
||||
#endif
|
||||
#endif /* !CONFIG_NOR_BOOT */
|
||||
|
||||
#endif /* __CONFIG_TI_ARMV7_COMMON_H__ */
|
Loading…
Reference in New Issue
Block a user