imx6: aristainetos: convert to DM_MMC
Enable DM_MMC support. Signed-off-by: Heiko Schocher <hs@denx.de>
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@ -19,8 +19,6 @@
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/mach-imx/mxc_i2c.h>
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#include <asm/mach-imx/video.h>
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#include <mmc.h>
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#include <fsl_esdhc_imx.h>
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#include <miiphy.h>
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#include <netdev.h>
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#include <asm/arch/mxc_hdmi.h>
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@ -43,10 +41,6 @@
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DECLARE_GLOBAL_DATA_PTR;
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#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
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PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
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PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
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PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
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@ -63,9 +57,6 @@ DECLARE_GLOBAL_DATA_PTR;
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#define ECSPI4_CS1 IMX_GPIO_NR(5, 2)
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#define USDHC2_PAD_CTRL (PAD_CTL_SPEED_LOW | \
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
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#if (CONFIG_SYS_BOARD_VERSION == 2)
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/* 4.3 display controller */
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#define ECSPI1_CS0 IMX_GPIO_NR(4, 9)
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@ -706,15 +697,6 @@ struct i2c_pads_info i2c_pad_info2 = {
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}
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};
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iomux_v3_cfg_t const usdhc1_pads[] = {
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MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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};
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int dram_init(void)
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{
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gd->ram_size = imx_ddr_size();
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@ -722,41 +704,6 @@ int dram_init(void)
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return 0;
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}
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#ifdef CONFIG_FSL_ESDHC_IMX
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struct fsl_esdhc_cfg usdhc_cfg[2] = {
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{USDHC1_BASE_ADDR},
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{USDHC2_BASE_ADDR},
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};
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int board_mmc_getcd(struct mmc *mmc)
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{
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return 1;
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}
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int board_mmc_init(bd_t *bis)
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{
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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imx_iomux_v3_setup_multiple_pads(usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
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#if (CONFIG_SYS_BOARD_VERSION == 2)
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/*
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* usdhc2 has a levelshifter on the carrier board Rev. DV1,
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* that will automatically detect the driving direction.
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* During initialisation this isn't working correctly,
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* which causes DAT3 to be driven low towards the SD-card.
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* This causes a SD-card enetring the SPI-Mode
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* and therefore getting inaccessible until next power cycle.
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* As workaround we drive the DAT3 line as GPIO and set it high.
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* This makes usdhc2 unusable in u-boot, but works for the
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* initialisation in Linux
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*/
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imx_iomux_v3_setup_pad(MX6_PAD_SD2_DAT3__GPIO1_IO12 |
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MUX_PAD_CTRL(NO_PAD_CTRL));
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gpio_direction_output(IMX_GPIO_NR(1, 12) , 1);
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#endif
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return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
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}
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#endif
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struct display_info_t const displays[] = {
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{
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.bus = -1,
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@ -53,6 +53,7 @@ CONFIG_ENV_SPI_EARLY=y
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CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
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CONFIG_ENV_OFFSET_REDUND=0xE0000
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_DM_MMC=y
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CONFIG_FSL_USDHC=y
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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@ -45,7 +45,7 @@
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#define CONFIG_MMCROOT "/dev/mmcblk0p1"
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/* MMC Configs */
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_ETHPRIME "FEC"
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