ARM: uniphier: rename CONFIG_MACH_* to CONFIG_ARCH_UNIPHIER_*
I want these prefixed with CONFIG_ARCH_UNIPHIER_ to clarify they belong to UniPhier SoC family. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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@ -8,20 +8,20 @@ config UNIPHIER_SMP
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choice
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prompt "UniPhier SoC select"
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default MACH_PH1_PRO4
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default ARCH_UNIPHIER_PH1_PRO4
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config MACH_PH1_SLD3
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config ARCH_UNIPHIER_PH1_SLD3
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bool "PH1-sLD3"
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select UNIPHIER_SMP
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config MACH_PH1_LD4
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config ARCH_UNIPHIER_PH1_LD4
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bool "PH1-LD4"
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config MACH_PH1_PRO4
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config ARCH_UNIPHIER_PH1_PRO4
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bool "PH1-Pro4"
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select UNIPHIER_SMP
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config MACH_PH1_SLD8
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config ARCH_UNIPHIER_PH1_SLD8
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bool "PH1-sLD8"
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endchoice
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@ -53,11 +53,11 @@ choice
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config DDR_FREQ_1600
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bool "DDR3 1600"
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depends on MACH_PH1_SLD3 || MACH_PH1_LD4 || MACH_PH1_PRO4
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depends on ARCH_UNIPHIER_PH1_SLD3 || ARCH_UNIPHIER_PH1_LD4 || ARCH_UNIPHIER_PH1_PRO4
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config DDR_FREQ_1333
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bool "DDR3 1333"
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depends on MACH_PH1_SLD3 || MACH_PH1_LD4 || MACH_PH1_SLD8
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depends on ARCH_UNIPHIER_PH1_SLD3 || ARCH_UNIPHIER_PH1_LD4 || ARCH_UNIPHIER_PH1_SLD8
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endchoice
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@ -31,7 +31,7 @@ obj-y += timer.o
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obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o
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obj-$(CONFIG_MACH_PH1_SLD3) += ph1-sld3/
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obj-$(CONFIG_MACH_PH1_LD4) += ph1-ld4/
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obj-$(CONFIG_MACH_PH1_PRO4) += ph1-pro4/
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obj-$(CONFIG_MACH_PH1_SLD8) += ph1-sld8/
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obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += ph1-sld3/
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obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += ph1-ld4/
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obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += ph1-pro4/
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obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += ph1-sld8/
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@ -156,7 +156,8 @@ struct ddrphy {
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/* SoC-specific parameters */
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#define NR_DATX8_PER_DDRPHY 2
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#if defined(CONFIG_MACH_PH1_LD4) || defined(CONFIG_MACH_PH1_SLD8)
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#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \
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defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
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#define NR_DDRPHY_PER_CH 1
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#else
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#define NR_DDRPHY_PER_CH 2
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@ -9,7 +9,7 @@
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#ifndef ARCH_SC_REGS_H
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#define ARCH_SC_REGS_H
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#if defined(CONFIG_MACH_PH1_SLD3)
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#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
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#define SC_BASE_ADDR 0xf1840000
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#else
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#define SC_BASE_ADDR 0x61840000
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@ -54,12 +54,10 @@ static void vpll_init(void)
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tmp = readl(SG_PINMON0);
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clk_mode_axosel = tmp & SG_PINMON0_CLK_MODE_AXOSEL_MASK;
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#if defined(CONFIG_MACH_PH1_PRO4)
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/* 25MHz or 6.25MHz is default for Pro4R, no need to set VPLLA/B */
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if (clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ ||
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clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_6250KHZ)
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return;
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#endif
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/* Disable write protect of VPLL27ACTRL[2-7]*, VPLL27BCTRL[2-8] */
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tmp = readl(SC_VPLL27ACTRL);
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@ -1,7 +1,7 @@
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CONFIG_ARM=y
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CONFIG_ARCH_UNIPHIER=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_MACH_PH1_LD4=y
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CONFIG_ARCH_UNIPHIER_PH1_LD4=y
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CONFIG_MICRO_SUPPORT_CARD=y
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CONFIG_SYS_TEXT_BASE=0x84000000
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CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld4-ref"
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@ -1,6 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_UNIPHIER=y
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CONFIG_MACH_PH1_SLD3=y
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CONFIG_ARCH_UNIPHIER_PH1_SLD3=y
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CONFIG_MICRO_SUPPORT_CARD=y
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CONFIG_SYS_TEXT_BASE=0x84000000
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CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld3-ref"
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@ -1,7 +1,7 @@
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CONFIG_ARM=y
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CONFIG_ARCH_UNIPHIER=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_MACH_PH1_SLD8=y
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CONFIG_ARCH_UNIPHIER_PH1_SLD8=y
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CONFIG_MICRO_SUPPORT_CARD=y
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CONFIG_SYS_TEXT_BASE=0x84000000
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CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld8-ref"
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@ -5,37 +5,37 @@ config PINCTRL_UNIPHIER_CORE
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config PINCTRL_UNIPHIER_PH1_LD4
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bool "UniPhier PH1-LD4 SoC pinctrl driver"
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depends on MACH_PH1_LD4
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depends on ARCH_UNIPHIER_PH1_LD4
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default y
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select PINCTRL_UNIPHIER_CORE
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config PINCTRL_UNIPHIER_PH1_PRO4
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bool "UniPhier PH1-Pro4 SoC pinctrl driver"
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depends on MACH_PH1_PRO4
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depends on ARCH_UNIPHIER_PH1_PRO4
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default y
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select PINCTRL_UNIPHIER_CORE
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config PINCTRL_UNIPHIER_PH1_SLD8
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bool "UniPhier PH1-sLD8 SoC pinctrl driver"
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depends on MACH_PH1_SLD8
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depends on ARCH_UNIPHIER_PH1_SLD8
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default y
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select PINCTRL_UNIPHIER_CORE
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config PINCTRL_UNIPHIER_PH1_PRO5
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bool "UniPhier PH1-Pro5 SoC pinctrl driver"
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depends on MACH_PH1_PRO5
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depends on ARCH_UNIPHIER_PH1_PRO5
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default y
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select PINCTRL_UNIPHIER_CORE
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config PINCTRL_UNIPHIER_PROXSTREAM2
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bool "UniPhier ProXstream2 SoC pinctrl driver"
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depends on MACH_PROXSTREAM2
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depends on ARCH_UNIPHIER_PROXSTREAM2
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default y
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select PINCTRL_UNIPHIER_CORE
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config PINCTRL_UNIPHIER_PH1_LD6B
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bool "UniPhier PH1-LD6b SoC pinctrl driver"
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depends on MACH_PH1_LD6B
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depends on ARCH_UNIPHIER_PH1_LD6B
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default y
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select PINCTRL_UNIPHIER_CORE
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@ -9,7 +9,7 @@
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#ifndef __CONFIG_UNIPHIER_COMMON_H__
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#define __CONFIG_UNIPHIER_COMMON_H__
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#if defined(CONFIG_MACH_PH1_SLD3)
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#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
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#define CONFIG_DDR_NUM_CH0 2
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#define CONFIG_DDR_NUM_CH1 1
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#define CONFIG_DDR_NUM_CH2 1
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@ -23,7 +23,7 @@
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#define CONFIG_SDRAM2_SIZE 0x10000000
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#endif
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#if defined(CONFIG_MACH_PH1_LD4)
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#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4)
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#define CONFIG_DDR_NUM_CH0 1
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#define CONFIG_DDR_NUM_CH1 1
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@ -34,7 +34,7 @@
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#define CONFIG_SDRAM1_SIZE 0x10000000
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#endif
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#if defined(CONFIG_MACH_PH1_PRO4)
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#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
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#define CONFIG_DDR_NUM_CH0 2
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#define CONFIG_DDR_NUM_CH1 2
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@ -45,7 +45,7 @@
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#define CONFIG_SDRAM1_SIZE 0x20000000
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#endif
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#if defined(CONFIG_MACH_PH1_SLD8)
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#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
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#define CONFIG_DDR_NUM_CH0 1
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#define CONFIG_DDR_NUM_CH1 1
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@ -175,7 +175,7 @@
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#define CONFIG_NAND_DENALI_ECC_SIZE 1024
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#ifdef CONFIG_MACH_PH1_SLD3
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#ifdef CONFIG_ARCH_UNIPHIER_PH1_SLD3
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#define CONFIG_SYS_NAND_REGS_BASE 0xf8100000
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#define CONFIG_SYS_NAND_DATA_BASE 0xf8000000
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#else
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@ -291,11 +291,12 @@
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_NR_DRAM_BANKS 2
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#if defined(CONFIG_MACH_PH1_SLD3) || defined(CONFIG_MACH_PH1_LD4) || \
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defined(CONFIG_MACH_PH1_SLD8)
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#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) || \
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defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \
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defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
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#define CONFIG_SPL_TEXT_BASE 0x00040000
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#endif
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#if defined(CONFIG_MACH_PH1_PRO4)
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#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
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#define CONFIG_SPL_TEXT_BASE 0x00100000
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#endif
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