mmc: add nexell driver
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01: - driver changed to DM. - pinctrl-driver/dt is used now instead of configuring the mmc I/O-pins in the mmc-driver. - nexell_dwmmc_ofdata_to_platdata() reworked, i.e. valid default values are used now (where possible) and the appropriate if-blocks have been removed. - new dt-property "mmcboost" is used now instead of "CONFIG_BOOST_MMC" which was not defined anywhere. Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
This commit is contained in:
Stefan Bosch
Tom Rini
parent
c25e9e04a1
commit
8408318943
@ -263,6 +263,14 @@ config MMC_DW_SNPS
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This selects support for Synopsys DesignWare Memory Card Interface driver
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extensions used in various Synopsys ARC devboards.
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config NEXELL_DWMMC
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bool "Nexell SD/MMC controller support"
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depends on ARCH_NEXELL
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depends on MMC_DW
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depends on DM_MMC
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depends on PINCTRL_NEXELL
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default y
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config MMC_MESON_GX
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bool "Meson GX EMMC controller support"
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depends on DM_MMC && BLK && ARCH_MESON
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@ -44,6 +44,7 @@ obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
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obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
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obj-$(CONFIG_STM32_SDMMC2) += stm32_sdmmc2.o
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obj-$(CONFIG_JZ47XX_MMC) += jz_mmc.o
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obj-$(CONFIG_NEXELL_DWMMC) += nexell_dw_mmc.o
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# SDHCI
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obj-$(CONFIG_MMC_SDHCI) += sdhci.o
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237
drivers/mmc/nexell_dw_mmc.c
Normal file
237
drivers/mmc/nexell_dw_mmc.c
Normal file
@ -0,0 +1,237 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2016 Nexell
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* Youngbok, Park <park@nexell.co.kr>
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*
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* (C) Copyright 2019 Stefan Bosch <stefan_b@posteo.net>
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*/
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#include <common.h>
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#include <dm.h>
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#include <dt-structs.h>
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#include <dwmmc.h>
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#include <log.h>
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#include <syscon.h>
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#include <asm/arch/reset.h>
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#include <asm/arch/clk.h>
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#define DWMCI_CLKSEL 0x09C
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#define DWMCI_SHIFT_0 0x0
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#define DWMCI_SHIFT_1 0x1
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#define DWMCI_SHIFT_2 0x2
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#define DWMCI_SHIFT_3 0x3
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#define DWMCI_SET_SAMPLE_CLK(x) (x)
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#define DWMCI_SET_DRV_CLK(x) ((x) << 16)
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#define DWMCI_SET_DIV_RATIO(x) ((x) << 24)
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#define DWMCI_CLKCTRL 0x114
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#define NX_MMC_CLK_DELAY(x, y, a, b) ((((x) & 0xFF) << 0) |\
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(((y) & 0x03) << 16) |\
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(((a) & 0xFF) << 8) |\
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(((b) & 0x03) << 24))
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struct nexell_mmc_plat {
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struct mmc_config cfg;
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struct mmc mmc;
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};
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struct nexell_dwmmc_priv {
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struct clk *clk;
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struct dwmci_host host;
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int fifo_size;
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bool fifo_mode;
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int frequency;
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u32 min_freq;
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u32 max_freq;
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int d_delay;
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int d_shift;
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int s_delay;
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int s_shift;
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bool mmcboost;
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};
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struct clk *clk_get(const char *id);
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static void nx_dw_mmc_clksel(struct dwmci_host *host)
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{
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/* host->priv is pointer to "struct udevice" */
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struct nexell_dwmmc_priv *priv = dev_get_priv(host->priv);
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u32 val;
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if (priv->mmcboost)
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val = DWMCI_SET_SAMPLE_CLK(DWMCI_SHIFT_0) |
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DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | DWMCI_SET_DIV_RATIO(1);
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else
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val = DWMCI_SET_SAMPLE_CLK(DWMCI_SHIFT_0) |
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DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | DWMCI_SET_DIV_RATIO(3);
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dwmci_writel(host, DWMCI_CLKSEL, val);
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}
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static void nx_dw_mmc_reset(int ch)
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{
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int rst_id = RESET_ID_SDMMC0 + ch;
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nx_rstcon_setrst(rst_id, 0);
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nx_rstcon_setrst(rst_id, 1);
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}
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static void nx_dw_mmc_clk_delay(struct udevice *dev)
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{
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unsigned int delay;
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struct nexell_dwmmc_priv *priv = dev_get_priv(dev);
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struct dwmci_host *host = &priv->host;
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delay = NX_MMC_CLK_DELAY(priv->d_delay,
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priv->d_shift, priv->s_delay, priv->s_shift);
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writel(delay, (host->ioaddr + DWMCI_CLKCTRL));
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debug("%s: Values set: d_delay==%d, d_shift==%d, s_delay==%d, "
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"s_shift==%d\n", __func__, priv->d_delay, priv->d_shift,
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priv->s_delay, priv->s_shift);
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}
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static unsigned int nx_dw_mmc_get_clk(struct dwmci_host *host, uint freq)
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{
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struct clk *clk;
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struct udevice *dev = host->priv;
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struct nexell_dwmmc_priv *priv = dev_get_priv(dev);
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int index = host->dev_index;
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char name[50] = { 0, };
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clk = priv->clk;
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if (!clk) {
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sprintf(name, "%s.%d", DEV_NAME_SDHC, index);
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clk = clk_get((const char *)name);
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if (!clk)
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return 0;
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priv->clk = clk;
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}
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return clk_get_rate(clk) / 2;
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}
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static unsigned long nx_dw_mmc_set_clk(struct dwmci_host *host,
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unsigned int rate)
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{
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struct clk *clk;
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char name[50] = { 0, };
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struct udevice *dev = host->priv;
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struct nexell_dwmmc_priv *priv = dev_get_priv(dev);
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int index = host->dev_index;
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clk = priv->clk;
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if (!clk) {
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sprintf(name, "%s.%d", DEV_NAME_SDHC, index);
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clk = clk_get((const char *)name);
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if (!clk) {
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debug("%s: clk_get(\"%s\") failed!\n", __func__, name);
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return 0;
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}
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priv->clk = clk;
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}
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clk_disable(clk);
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rate = clk_set_rate(clk, rate);
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clk_enable(clk);
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return rate;
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}
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static int nexell_dwmmc_ofdata_to_platdata(struct udevice *dev)
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{
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struct nexell_dwmmc_priv *priv = dev_get_priv(dev);
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struct dwmci_host *host = &priv->host;
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int val = -1;
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debug("%s\n", __func__);
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host->name = dev->name;
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host->ioaddr = dev_read_addr_ptr(dev);
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host->buswidth = dev_read_u32_default(dev, "bus-width", 4);
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host->get_mmc_clk = nx_dw_mmc_get_clk;
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host->clksel = nx_dw_mmc_clksel;
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host->priv = dev;
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val = dev_read_u32_default(dev, "index", -1);
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if (val < 0 || val > 2) {
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debug(" 'index' missing/invalid!\n");
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return -EINVAL;
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}
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host->dev_index = val;
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priv->fifo_size = dev_read_u32_default(dev, "fifo-size", 0x20);
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priv->fifo_mode = dev_read_bool(dev, "fifo-mode");
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priv->frequency = dev_read_u32_default(dev, "frequency", 50000000);
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priv->max_freq = dev_read_u32_default(dev, "max-frequency", 50000000);
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priv->min_freq = 400000; /* 400 kHz */
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priv->d_delay = dev_read_u32_default(dev, "drive_dly", 0);
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priv->d_shift = dev_read_u32_default(dev, "drive_shift", 3);
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priv->s_delay = dev_read_u32_default(dev, "sample_dly", 0);
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priv->s_shift = dev_read_u32_default(dev, "sample_shift", 2);
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priv->mmcboost = dev_read_u32_default(dev, "mmcboost", 0);
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debug(" index==%d, name==%s, ioaddr==0x%08x\n",
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host->dev_index, host->name, (u32)host->ioaddr);
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return 0;
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}
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static int nexell_dwmmc_probe(struct udevice *dev)
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{
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struct nexell_mmc_plat *plat = dev_get_platdata(dev);
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struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
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struct nexell_dwmmc_priv *priv = dev_get_priv(dev);
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struct dwmci_host *host = &priv->host;
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struct udevice *pwr_dev __maybe_unused;
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host->fifoth_val = MSIZE(0x2) |
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RX_WMARK(priv->fifo_size / 2 - 1) |
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TX_WMARK(priv->fifo_size / 2);
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host->fifo_mode = priv->fifo_mode;
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dwmci_setup_cfg(&plat->cfg, host, priv->max_freq, priv->min_freq);
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host->mmc = &plat->mmc;
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host->mmc->priv = &priv->host;
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host->mmc->dev = dev;
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upriv->mmc = host->mmc;
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if (nx_dw_mmc_set_clk(host, priv->frequency * 4) !=
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priv->frequency * 4) {
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debug("%s: nx_dw_mmc_set_clk(host, %d) failed!\n",
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__func__, priv->frequency * 4);
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return -EIO;
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}
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debug("%s: nx_dw_mmc_set_clk(host, %d) OK\n",
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__func__, priv->frequency * 4);
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nx_dw_mmc_reset(host->dev_index);
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nx_dw_mmc_clk_delay(dev);
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return dwmci_probe(dev);
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}
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static int nexell_dwmmc_bind(struct udevice *dev)
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{
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struct nexell_mmc_plat *plat = dev_get_platdata(dev);
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return dwmci_bind(dev, &plat->mmc, &plat->cfg);
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}
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static const struct udevice_id nexell_dwmmc_ids[] = {
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{ .compatible = "nexell,nexell-dwmmc" },
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{ }
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};
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U_BOOT_DRIVER(nexell_dwmmc_drv) = {
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.name = "nexell_dwmmc",
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.id = UCLASS_MMC,
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.of_match = nexell_dwmmc_ids,
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.ofdata_to_platdata = nexell_dwmmc_ofdata_to_platdata,
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.ops = &dm_dwmci_ops,
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.bind = nexell_dwmmc_bind,
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.probe = nexell_dwmmc_probe,
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.priv_auto_alloc_size = sizeof(struct nexell_dwmmc_priv),
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.platdata_auto_alloc_size = sizeof(struct nexell_mmc_plat),
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};
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