leandrof/u-boot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

x86: Use microcode update from device tree for all processors

Browse Source 
Built without a ROM image with FSP (u-boot.rom), the U-Boot loader applies
the microcode update data block encoded in Device Tree to the bootstrap
processor but not passed to the other CPUs when multiprocessing is enabled.

If the bootstrap processor successfully performs a microcode update
from Device Tree, use the same data block for the other processors.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed build errors on edison and qemu-x86]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Ivan Gorinov 2018-06-21 21:16:16 -07:00 committed by Bin Meng
parent fc48ebe6df
commit 8199a145c4
4 changed files with 13 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/x86/cpu/intel_common/car.S
View File

@ -239,4 +239,6 @@ _dt_ucode_base_size:
.globl ucode_base
ucode_base: /* Declared in microcode.h */
.long 0 /* microcode base */
.globl ucode_size
ucode_size: /* Declared in microcode.h */
.long 0 /* microcode size */

10
arch/x86/cpu/intel_common/microcode.c
View File

@ -43,8 +43,6 @@ static int microcode_decode_node(const void *blob, int node,
update->data = fdt_getprop(blob, node, "data", &update->size);
if (!update->data)
return -ENOENT;
update->data += UCODE_HEADER_LEN;
update->size -= UCODE_HEADER_LEN;
update->header_version = fdtdec_get_int(blob, node,
"intel,header-version", 0);
@ -124,6 +122,7 @@ static void microcode_read_cpu(struct microcode_update *cpu)
int microcode_update_intel(void)
{
struct microcode_update cpu, update;
ulong address;
const void *blob = gd->fdt_blob;
int skipped;
int count;
@ -167,7 +166,8 @@ int microcode_update_intel(void)
skipped++;
continue;
}
wrmsr(MSR_IA32_UCODE_WRITE, (ulong)update.data, 0);
address = (ulong)update.data + UCODE_HEADER_LEN;
wrmsr(MSR_IA32_UCODE_WRITE, address, 0);
rev = microcode_read_rev();
debug("microcode: updated to revision 0x%x date=%04x-%02x-%02x\n",
rev, update.date_code & 0xffff,
@ -178,5 +178,9 @@ int microcode_update_intel(void)
return -EFAULT;
}
count++;
if (!ucode_base) {
ucode_base = (ulong)update.data;
ucode_size = update.size;
}
} while (1);
}

1
arch/x86/include/asm/microcode.h
View File

@ -10,6 +10,7 @@
/* This is a declaration for ucode_base in start.S */
extern u32 ucode_base;
extern u32 ucode_size;
/**
* microcode_update_intel() - Apply microcode updates

4
arch/x86/lib/fsp/fsp_car.S
View File

@ -102,8 +102,10 @@ temp_ram_init_params:
_dt_ucode_base_size:
/* These next two fields are filled in by ifdtool */
.globl ucode_base
ucode_base: /* Declared in micrcode.h */
ucode_base: /* Declared in microcode.h */
.long 0 /* microcode base */
.globl ucode_size
ucode_size: /* Declared in microcode.h */
.long 0 /* microcode size */
.long CONFIG_SYS_MONITOR_BASE /* code region base */
.long CONFIG_SYS_MONITOR_LEN /* code region size */