mmc: dwmmc: Poll for iDMAC TX/RX interrupt
Poll for iDMAC TX/RX interrupt before disable DMA. This to prevent disable DMA before data is transfer completed. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
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@ -12,6 +12,7 @@
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#include <memalign.h>
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#include <mmc.h>
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#include <dwmmc.h>
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#include <wait_bit.h>
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#define PAGE_SIZE 4096
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@ -55,6 +56,9 @@ static void dwmci_prepare_data(struct dwmci_host *host,
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dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET);
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/* Clear IDMAC interrupt */
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dwmci_writel(host, DWMCI_IDSTS, 0xFFFFFFFF);
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data_start = (ulong)cur_idmac;
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dwmci_writel(host, DWMCI_DBADDR, (ulong)cur_idmac);
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@ -340,6 +344,18 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
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/* only dma mode need it */
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if (!host->fifo_mode) {
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if (data->flags == MMC_DATA_READ)
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mask = DWMCI_IDINTEN_RI;
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else
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mask = DWMCI_IDINTEN_TI;
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ret = wait_for_bit_le32(host->ioaddr + DWMCI_IDSTS,
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mask, true, 1000, false);
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if (ret)
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debug("%s: DWMCI_IDINTEN mask 0x%x timeout.\n",
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__func__, mask);
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/* clear interrupts */
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dwmci_writel(host, DWMCI_IDSTS, DWMCI_IDINTEN_MASK);
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ctrl = dwmci_readl(host, DWMCI_CTRL);
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ctrl &= ~(DWMCI_DMA_EN);
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dwmci_writel(host, DWMCI_CTRL, ctrl);
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@ -494,6 +510,9 @@ static int dwmci_init(struct mmc *mmc)
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dwmci_writel(host, DWMCI_CLKENA, 0);
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dwmci_writel(host, DWMCI_CLKSRC, 0);
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if (!host->fifo_mode)
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dwmci_writel(host, DWMCI_IDINTEN, DWMCI_IDINTEN_MASK);
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return 0;
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}
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@ -130,6 +130,13 @@
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/* UHS register */
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#define DWMCI_DDR_MODE (1 << 16)
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/* Internal IDMAC interrupt defines */
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#define DWMCI_IDINTEN_RI BIT(1)
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#define DWMCI_IDINTEN_TI BIT(0)
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#define DWMCI_IDINTEN_MASK (DWMCI_IDINTEN_TI | \
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DWMCI_IDINTEN_RI)
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/* quirks */
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#define DWMCI_QUIRK_DISABLE_SMU (1 << 0)
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