KM/kmp204x: qrio and i2c deblock code moved to common
This patch moves the qrio and i2c deblocking code to keymile/common as it will also be used by the upcoming CENT2 board. Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com> CC: Priyanka Jain <priyanka.jain@nxp.com>
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@ -6,8 +6,8 @@
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#include <common.h>
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#include "../common/common.h"
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#include "kmp204x.h"
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#include "common.h"
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#include "qrio.h"
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/* QRIO GPIO register offsets */
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#define DIRECT_OFF 0x18
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@ -135,10 +135,10 @@ void qrio_prstcfg(u8 bit, u8 mode)
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prstcfg = in_be32(qrio_base + PRSTCFG_OFF);
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for (i = 0; i < 2; i++) {
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if (mode & (1<<i))
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set_bit(2*bit+i, &prstcfg);
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if (mode & (1 << i))
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set_bit(2 * bit + i, &prstcfg);
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else
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clear_bit(2*bit+i, &prstcfg);
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clear_bit(2 * bit + i, &prstcfg);
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}
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out_be32(qrio_base + PRSTCFG_OFF, prstcfg);
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@ -180,6 +180,7 @@ void qrio_cpuwd_flag(bool flag)
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{
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u8 reason1;
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void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
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reason1 = in_8(qrio_base + REASON1_OFF);
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if (flag)
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reason1 |= REASON1_CPUWD;
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@ -188,6 +189,31 @@ void qrio_cpuwd_flag(bool flag)
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out_8(qrio_base + REASON1_OFF, reason1);
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}
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#define REASON0_OFF 0x13
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#define REASON0_SWURST 0x80
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#define REASON0_CPURST 0x40
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#define REASON0_BPRST 0x20
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#define REASON0_COPRST 0x10
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#define REASON0_SWCRST 0x08
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#define REASON0_WDRST 0x04
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#define REASON0_KBRST 0x02
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#define REASON0_POWUP 0x01
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#define UNIT_RESET\
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((REASON1_CPUWD << 8) |\
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REASON0_POWUP | REASON0_COPRST | REASON0_KBRST |\
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REASON0_BPRST | REASON0_SWURST | REASON0_WDRST)
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#define CORE_RESET REASON0_SWCRST
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bool qrio_reason_unitrst(void)
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{
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u16 reason;
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void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
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reason = in_be16(qrio_base + REASON1_OFF);
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return (reason & UNIT_RESET) > 0;
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}
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#define RSTCFG_OFF 0x11
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void qrio_uprstreq(u8 mode)
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@ -204,3 +230,51 @@ void qrio_uprstreq(u8 mode)
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out_8(qrio_base + RSTCFG_OFF, rstcfg);
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}
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/* I2C deblocking uses the algorithm defined in board/keymile/common/common.c
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* 2 dedicated QRIO GPIOs externally pull the SCL and SDA lines
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* For I2C only the low state is activly driven and high state is pulled-up
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* by a resistor. Therefore the deblock GPIOs are used
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* -> as an active output to drive a low state
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* -> as an open-drain input to have a pulled-up high state
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*/
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/* By default deblock GPIOs are floating */
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void i2c_deblock_gpio_cfg(void)
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{
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/* set I2C bus 1 deblocking GPIOs input, but 0 value for open drain */
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qrio_gpio_direction_input(KM_I2C_DEBLOCK_PORT,
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KM_I2C_DEBLOCK_SCL);
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qrio_gpio_direction_input(KM_I2C_DEBLOCK_PORT,
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KM_I2C_DEBLOCK_SDA);
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qrio_set_gpio(KM_I2C_DEBLOCK_PORT,
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KM_I2C_DEBLOCK_SCL, 0);
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qrio_set_gpio(KM_I2C_DEBLOCK_PORT,
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KM_I2C_DEBLOCK_SDA, 0);
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}
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void set_sda(int state)
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{
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qrio_set_opendrain_gpio(KM_I2C_DEBLOCK_PORT,
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KM_I2C_DEBLOCK_SDA, state);
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}
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void set_scl(int state)
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{
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qrio_set_opendrain_gpio(KM_I2C_DEBLOCK_PORT,
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KM_I2C_DEBLOCK_SCL, state);
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}
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int get_sda(void)
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{
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return qrio_get_gpio(KM_I2C_DEBLOCK_PORT,
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KM_I2C_DEBLOCK_SDA);
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}
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int get_scl(void)
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{
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return qrio_get_gpio(KM_I2C_DEBLOCK_PORT,
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KM_I2C_DEBLOCK_SCL);
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}
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40
board/keymile/common/qrio.h
Normal file
40
board/keymile/common/qrio.h
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@ -0,0 +1,40 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2018 ABB
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* Valentin Longchamp <valentin.longchamp@ch.abb.com>
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*/
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#ifndef __QRIO_H
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#define __QRIO_H
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/* QRIO GPIO ports */
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#define QRIO_GPIO_A 0x40
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#define QRIO_GPIO_B 0x60
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int qrio_get_gpio(u8 port_off, u8 gpio_nr);
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void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val);
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void qrio_set_gpio(u8 port_off, u8 gpio_nr, bool value);
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void qrio_gpio_direction_output(u8 port_off, u8 gpio_nr, bool value);
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void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr);
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/* QRIO Periphery reset configurations */
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#define PRSTCFG_POWUP_UNIT_CORE_RST 0x0
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#define PRSTCFG_POWUP_UNIT_RST 0x1
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#define PRSTCFG_POWUP_RST 0x3
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void qrio_prst(u8 bit, bool en, bool wden);
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void qrio_wdmask(u8 bit, bool wden);
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void qrio_prstcfg(u8 bit, u8 mode);
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void qrio_set_leds(void);
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void qrio_enable_app_buffer(void);
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void qrio_cpuwd_flag(bool flag);
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bool qrio_reason_unitrst(void);
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/* QRIO uP reset request configurations */
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#define UPREQ_UNIT_RST 0x0
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#define UPREQ_CORE_RST 0x1
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void qrio_uprstreq(u8 mode);
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void i2c_deblock_gpio_cfg(void);
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#endif /* __QRIO_H */
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@ -6,5 +6,5 @@
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# See file CREDITS for list of people who contributed to this
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# project.
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obj-y := kmp204x.o ddr.o eth.o tlb.o pci.o law.o qrio.o \
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../common/common.o ../common/ivm.o
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obj-y := kmp204x.o ddr.o eth.o tlb.o pci.o law.o ../common/common.o\
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../common/ivm.o ../common/qrio.o
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@ -24,6 +24,7 @@
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#include <fm_eth.h>
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#include "../common/common.h"
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#include "../common/qrio.h"
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#include "kmp204x.h"
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static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN];
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@ -35,51 +36,6 @@ int checkboard(void)
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return 0;
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}
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/* I2C deblocking uses the algorithm defined in board/keymile/common/common.c
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* 2 dedicated QRIO GPIOs externally pull the SCL and SDA lines
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* For I2C only the low state is activly driven and high state is pulled-up
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* by a resistor. Therefore the deblock GPIOs are used
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* -> as an active output to drive a low state
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* -> as an open-drain input to have a pulled-up high state
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*/
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/* QRIO GPIOs used for deblocking */
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#define DEBLOCK_PORT1 GPIO_A
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#define DEBLOCK_SCL1 20
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#define DEBLOCK_SDA1 21
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/* By default deblock GPIOs are floating */
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static void i2c_deblock_gpio_cfg(void)
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{
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/* set I2C bus 1 deblocking GPIOs input, but 0 value for open drain */
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qrio_gpio_direction_input(DEBLOCK_PORT1, DEBLOCK_SCL1);
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qrio_gpio_direction_input(DEBLOCK_PORT1, DEBLOCK_SDA1);
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qrio_set_gpio(DEBLOCK_PORT1, DEBLOCK_SCL1, 0);
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qrio_set_gpio(DEBLOCK_PORT1, DEBLOCK_SDA1, 0);
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}
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void set_sda(int state)
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{
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qrio_set_opendrain_gpio(DEBLOCK_PORT1, DEBLOCK_SDA1, state);
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}
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void set_scl(int state)
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{
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qrio_set_opendrain_gpio(DEBLOCK_PORT1, DEBLOCK_SCL1, state);
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}
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int get_sda(void)
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{
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return qrio_get_gpio(DEBLOCK_PORT1, DEBLOCK_SDA1);
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}
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int get_scl(void)
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{
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return qrio_get_gpio(DEBLOCK_PORT1, DEBLOCK_SCL1);
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}
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#define ZL30158_RST 8
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#define BFTIC4_RST 0
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#define RSTRQSR1_WDT_RR 0x00200000
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@ -297,7 +253,7 @@ int ft_board_setup(void *blob, bd_t *bd)
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#if defined(CONFIG_POST)
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/* DIC26_SELFTEST GPIO used to start factory test sw */
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#define SELFTEST_PORT GPIO_A
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#define SELFTEST_PORT QRIO_GPIO_A
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#define SELFTEST_PIN 31
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int post_hotkeys_pressed(void)
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* Valentin Longchamp <valentin.longchamp@keymile.com>
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*/
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/* QRIO GPIO ports */
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#define GPIO_A 0x40
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#define GPIO_B 0x60
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int qrio_get_gpio(u8 port_off, u8 gpio_nr);
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void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val);
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void qrio_set_gpio(u8 port_off, u8 gpio_nr, bool value);
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void qrio_gpio_direction_output(u8 port_off, u8 gpio_nr, bool value);
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void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr);
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#define PRSTCFG_POWUP_UNIT_CORE_RST 0x0
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#define PRSTCFG_POWUP_UNIT_RST 0x1
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#define PRSTCFG_POWUP_RST 0x3
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void qrio_prst(u8 bit, bool en, bool wden);
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void qrio_wdmask(u8 bit, bool wden);
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void qrio_prstcfg(u8 bit, u8 mode);
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void qrio_set_leds(void);
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void qrio_enable_app_buffer(void);
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void qrio_cpuwd_flag(bool flag);
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int qrio_reset_reason(void);
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#define UPREQ_UNIT_RST 0x0
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#define UPREQ_CORE_RST 0x1
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void qrio_uprstreq(u8 mode);
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void pci_of_setup(void *blob, bd_t *bd);
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@ -16,13 +16,14 @@
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#include <asm/fsl_serdes.h>
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#include <linux/errno.h>
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#include "../common/qrio.h"
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#include "kmp204x.h"
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#define PROM_SEL_L 11
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/* control the PROM_SEL_L signal*/
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static void toggle_fpga_eeprom_bus(bool cpu_own)
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{
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qrio_gpio_direction_output(GPIO_A, PROM_SEL_L, !cpu_own);
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qrio_gpio_direction_output(QRIO_GPIO_A, PROM_SEL_L, !cpu_own);
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}
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#define CONF_SEL_L 10
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@ -40,17 +41,17 @@ int trigger_fpga_config(void)
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toggle_fpga_eeprom_bus(false);
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/* assert CONF_SEL_L to be able to drive FPGA_PROG_L */
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qrio_gpio_direction_output(GPIO_A, CONF_SEL_L, 0);
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qrio_gpio_direction_output(QRIO_GPIO_A, CONF_SEL_L, 0);
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/* trigger the config start */
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qrio_gpio_direction_output(GPIO_A, FPGA_PROG_L, 0);
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qrio_gpio_direction_output(QRIO_GPIO_A, FPGA_PROG_L, 0);
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/* small delay for INIT_L line */
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udelay(10);
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/* wait for FPGA_INIT to be asserted */
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do {
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init_l = qrio_get_gpio(GPIO_A, FPGA_INIT_L);
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init_l = qrio_get_gpio(QRIO_GPIO_A, FPGA_INIT_L);
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if (timeout-- == 0) {
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printf("FPGA_INIT timeout\n");
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ret = -EFAULT;
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@ -60,7 +61,7 @@ int trigger_fpga_config(void)
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} while (init_l);
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/* deassert FPGA_PROG, config should start */
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qrio_set_gpio(GPIO_A, FPGA_PROG_L, 1);
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qrio_set_gpio(QRIO_GPIO_A, FPGA_PROG_L, 1);
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return ret;
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}
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@ -74,7 +75,7 @@ static int wait_for_fpga_config(void)
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printf("PCIe FPGA config:");
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do {
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done = qrio_get_gpio(GPIO_A, FPGA_DONE);
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done = qrio_get_gpio(QRIO_GPIO_A, FPGA_DONE);
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if (timeout-- == 0) {
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printf(" FPGA_DONE timeout\n");
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ret = -EFAULT;
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@ -87,7 +88,7 @@ static int wait_for_fpga_config(void)
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err_out:
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/* deactive CONF_SEL and give the CPU conf EEPROM access */
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qrio_set_gpio(GPIO_A, CONF_SEL_L, 1);
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qrio_set_gpio(QRIO_GPIO_A, CONF_SEL_L, 1);
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toggle_fpga_eeprom_bus(true);
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return ret;
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@ -224,6 +224,10 @@ unsigned long get_board_sys_clk(unsigned long dummy);
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#define CONFIG_KM_CONSOLE_TTY "ttyS0"
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/* I2C */
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/* QRIO GPIOs used for deblocking */
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#define KM_I2C_DEBLOCK_PORT QRIO_GPIO_A
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#define KM_I2C_DEBLOCK_SCL 20
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#define KM_I2C_DEBLOCK_SDA 21
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_INIT_BOARD
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