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mmc: Add Aspeed SD controller driver

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Add support for the Aspeed SD host controller engine.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Eddie James 2019-08-27 09:48:03 -05:00 committed by Peng Fan
parent 38c9f08b41
commit 7764ee2e83
4 changed files with 104 additions and 1 deletions
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3
arch/arm/include/asm/gpio.h
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@ -2,7 +2,8 @@
!defined(CONFIG_ARCH_K3) && !defined(CONFIG_ARCH_BCM6858) && \
!defined(CONFIG_ARCH_BCM63158) && !defined(CONFIG_ARCH_ROCKCHIP) && \
!defined(CONFIG_ARCH_LX2160A) && !defined(CONFIG_ARCH_LS1028A) && \
!defined(CONFIG_ARCH_LS2080A) && !defined(CONFIG_ARCH_LS1088A)
!defined(CONFIG_ARCH_LS2080A) && !defined(CONFIG_ARCH_LS1088A) && \
!defined(CONFIG_ARCH_ASPEED)
#include <asm/arch/gpio.h>
#endif
#include <asm-generic/gpio.h>

11
drivers/mmc/Kconfig
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@ -421,6 +421,17 @@ config SPL_MMC_SDHCI_ADMA
This enables support for the ADMA (Advanced DMA) defined
in the SD Host Controller Standard Specification Version 3.00 in SPL.
config MMC_SDHCI_ASPEED
bool "Aspeed SDHCI controller"
depends on ARCH_ASPEED
depends on DM_MMC
depends on MMC_SDHCI
help
Enables support for the Aspeed SDHCI 2.0 controller present on Aspeed
SoCs. This device is compatible with SD 3.0 and/or MMC 4.3
specifications. On the AST2600, the device is also compatible with
MMC 5.1 and eMMC 3.0.
config MMC_SDHCI_ATMEL
bool "Atmel SDHCI controller support"
depends on ARCH_AT91

1
drivers/mmc/Makefile
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@ -46,6 +46,7 @@ obj-$(CONFIG_JZ47XX_MMC) += jz_mmc.o
# SDHCI
obj-$(CONFIG_MMC_SDHCI) += sdhci.o
obj-$(CONFIG_MMC_SDHCI_ASPEED) += aspeed_sdhci.o
obj-$(CONFIG_MMC_SDHCI_ATMEL) += atmel_sdhci.o
obj-$(CONFIG_MMC_SDHCI_BCM2835) += bcm2835_sdhci.o
obj-$(CONFIG_MMC_SDHCI_BCMSTB) += bcmstb_sdhci.o

90
drivers/mmc/aspeed_sdhci.c Normal file
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@ -0,0 +1,90 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2019 IBM Corp.
* Eddie James <eajames@linux.ibm.com>
*/
#include <common.h>
#include <clk.h>
#include <dm.h>
#include <malloc.h>
#include <sdhci.h>
struct aspeed_sdhci_plat {
struct mmc_config cfg;
struct mmc mmc;
};
static int aspeed_sdhci_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct aspeed_sdhci_plat *plat = dev_get_platdata(dev);
struct sdhci_host *host = dev_get_priv(dev);
u32 max_clk;
struct clk clk;
int ret;
ret = clk_get_by_index(dev, 0, &clk);
if (ret)
return ret;
ret = clk_enable(&clk);
if (ret)
goto free;
host->name = dev->name;
host->ioaddr = (void *)devfdt_get_addr(dev);
max_clk = clk_get_rate(&clk);
if (IS_ERR_VALUE(max_clk)) {
ret = max_clk;
goto err;
}
host->max_clk = max_clk;
host->mmc = &plat->mmc;
host->mmc->dev = dev;
host->mmc->priv = host;
upriv->mmc = host->mmc;
ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0);
if (ret)
goto err;
ret = sdhci_probe(dev);
if (ret)
goto err;
return 0;
err:
clk_disable(&clk);
free:
clk_free(&clk);
return ret;
}
static int aspeed_sdhci_bind(struct udevice *dev)
{
struct aspeed_sdhci_plat *plat = dev_get_platdata(dev);
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
static const struct udevice_id aspeed_sdhci_ids[] = {
{ .compatible = "aspeed,ast2400-sdhci" },
{ .compatible = "aspeed,ast2500-sdhci" },
{ .compatible = "aspeed,ast2600-sdhci" },
{ }
};
U_BOOT_DRIVER(aspeed_sdhci_drv) = {
.name = "aspeed_sdhci",
.id = UCLASS_MMC,
.of_match = aspeed_sdhci_ids,
.ops = &sdhci_ops,
.bind = aspeed_sdhci_bind,
.probe = aspeed_sdhci_probe,
.priv_auto_alloc_size = sizeof(struct sdhci_host),
.platdata_auto_alloc_size = sizeof(struct aspeed_sdhci_plat),
};