clk: meson: g12a: add missing SD_EMMC_A controller gates
Add missing SD_EMMC_A controller gates needed for probe of the A controller, otherwise leading to a freeze of the SoC afterb3d69aa596
. Fixes:b3d69aa596
("clk: meson: reset mmc clock on probe") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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@ -112,6 +112,7 @@ static struct meson_gate gates[NUM_CLKS] = {
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MESON_GATE(CLKID_I2C, HHI_GCLK_MPEG0, 9),
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MESON_GATE(CLKID_UART0, HHI_GCLK_MPEG0, 13),
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MESON_GATE(CLKID_SPICC1, HHI_GCLK_MPEG0, 14),
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MESON_GATE(CLKID_SD_EMMC_A, HHI_GCLK_MPEG0, 4),
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MESON_GATE(CLKID_SD_EMMC_B, HHI_GCLK_MPEG0, 25),
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MESON_GATE(CLKID_SD_EMMC_C, HHI_GCLK_MPEG0, 26),
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MESON_GATE(CLKID_ETH, HHI_GCLK_MPEG1, 3),
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@ -127,6 +128,7 @@ static struct meson_gate gates[NUM_CLKS] = {
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MESON_GATE(CLKID_FCLK_DIV4, HHI_FIX_PLL_CNTL1, 21),
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MESON_GATE(CLKID_FCLK_DIV5, HHI_FIX_PLL_CNTL1, 22),
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MESON_GATE(CLKID_FCLK_DIV7, HHI_FIX_PLL_CNTL1, 23),
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MESON_GATE(CLKID_SD_EMMC_A_CLK0, HHI_SD_EMMC_CLK_CNTL, 7),
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MESON_GATE(CLKID_SD_EMMC_B_CLK0, HHI_SD_EMMC_CLK_CNTL, 23),
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MESON_GATE(CLKID_SD_EMMC_C_CLK0, HHI_NAND_CLK_CNTL, 7),
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MESON_GATE(CLKID_VPU_0, HHI_VPU_CLK_CNTL, 8),
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