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Merge git://git.denx.de/u-boot-video

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This commit is contained in:
Tom Rini 2017-10-09 13:31:33 -04:00
commit 74d90d17ee
44 changed files with 495 additions and 579 deletions
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60
arch/arm/dts/at91-sama5d2_xplained.dts
View File

@ -41,6 +41,31 @@
};
apb {
hlcdc: hlcdc@f0000000 {
atmel,vl-bpix = <4>;
atmel,guard-time = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>;
status = "okay";
u-boot,dm-pre-reloc;
display-timings {
u-boot,dm-pre-reloc;
480x272 {
clock-frequency = <9000000>;
hactive = <480>;
vactive = <272>;
hsync-len = <41>;
hfront-porch = <2>;
hback-porch = <2>;
vfront-porch = <2>;
vback-porch = <2>;
vsync-len = <11>;
u-boot,dm-pre-reloc;
};
};
};
qspi0: spi@f0020000 {
status = "okay";
@ -117,6 +142,41 @@
bias-disable;
};
pinctrl_lcd_base: pinctrl_lcd_base {
pinmux = <PIN_PC30__LCDVSYNC>,
<PIN_PC31__LCDHSYNC>,
<PIN_PD1__LCDDEN>,
<PIN_PD0__LCDPCK>;
bias-disable;
};
pinctrl_lcd_pwm: pinctrl_lcd_pwm {
pinmux = <PIN_PC28__LCDPWM>;
bias-disable;
};
pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 {
pinmux = <PIN_PC10__LCDDAT2>,
<PIN_PC11__LCDDAT3>,
<PIN_PC12__LCDDAT4>,
<PIN_PC13__LCDDAT5>,
<PIN_PC14__LCDDAT6>,
<PIN_PC15__LCDDAT7>,
<PIN_PC16__LCDDAT10>,
<PIN_PC17__LCDDAT11>,
<PIN_PC18__LCDDAT12>,
<PIN_PC19__LCDDAT13>,
<PIN_PC20__LCDDAT14>,
<PIN_PC21__LCDDAT15>,
<PIN_PC22__LCDDAT18>,
<PIN_PC23__LCDDAT19>,
<PIN_PC24__LCDDAT20>,
<PIN_PC25__LCDDAT21>,
<PIN_PC26__LCDDAT22>,
<PIN_PC27__LCDDAT23>;
bias-disable;
};
pinctrl_macb0_phy_irq: macb0_phy_irq {
pinmux = <PIN_PC9__GPIO>;
bias-disable;

25
arch/arm/dts/at91-sama5d4_xplained.dts
View File

@ -74,6 +74,31 @@
ahb {
apb {
hlcdc: hlcdc@f0000000 {
atmel,vl-bpix = <4>;
atmel,guard-time = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888>;
status = "okay";
u-boot,dm-pre-reloc;
display-timings {
u-boot,dm-pre-reloc;
480x272 {
clock-frequency = <9000000>;
hactive = <480>;
vactive = <272>;
hsync-len = <41>;
hfront-porch = <2>;
hback-porch = <2>;
vfront-porch = <2>;
vback-porch = <2>;
vsync-len = <11>;
u-boot,dm-pre-reloc;
};
};
};
spi0: spi@f8010000 {
u-boot,dm-pre-reloc;
cs-gpios = <&pioC 3 0>, <0>, <0>, <0>;

26
arch/arm/dts/at91-sama5d4ek.dts
View File

@ -75,6 +75,32 @@
ahb {
apb {
hlcdc: hlcdc@f0000000 {
atmel,vl-bpix = <4>;
atmel,output-mode = <18>;
atmel,guard-time = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>;
status = "okay";
u-boot,dm-pre-reloc;
display-timings {
u-boot,dm-pre-reloc;
800x480 {
clock-frequency = <33260000>;
hactive = <800>;
vactive = <480>;
hsync-len = <5>;
hfront-porch = <128>;
hback-porch = <0>;
vfront-porch = <23>;
vback-porch = <22>;
vsync-len = <5>;
u-boot,dm-pre-reloc;
};
};
};
adc0: adc@fc034000 {
pinctrl-names = "default";
pinctrl-0 = <

7
arch/arm/dts/sama5d2.dtsi
View File

@ -69,6 +69,13 @@
#size-cells = <1>;
u-boot,dm-pre-reloc;
hlcdc: hlcdc@f0000000 {
compatible = "atmel,at91sam9x5-hlcdc";
reg = <0xf0000000 0x2000>;
clocks = <&lcdc_clk>;
status = "disabled";
};
pmc: pmc@f0014000 {
compatible = "atmel,sama5d2-pmc", "syscon";
reg = <0xf0014000 0x160>;

1
arch/arm/dts/sama5d36ek_cmp.dts
View File

@ -8,6 +8,7 @@
/dts-v1/;
#include "sama5d36.dtsi"
#include "sama5d3xmb_cmp.dtsi"
#include "sama5d3xdm.dtsi"
/ {
model = "Atmel SAMA5D36-EK";

21
arch/arm/dts/sama5d3_lcd.dtsi
View File

@ -14,31 +14,12 @@
ahb {
apb {
hlcdc: hlcdc@f0030000 {
compatible = "atmel,sama5d3-hlcdc";
compatible = "atmel,at91sam9x5-hlcdc";
reg = <0xf0030000 0x2000>;
interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
clock-names = "periph_clk","sys_clk", "slow_clk";
status = "disabled";
hlcdc-display-controller {
compatible = "atmel,hlcdc-display-controller";
#address-cells = <1>;
#size-cells = <0>;
port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
};
hlcdc_pwm: hlcdc-pwm {
compatible = "atmel,hlcdc-pwm";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_pwm>;
#pwm-cells = <3>;
};
};
pinctrl@fffff200 {

26
arch/arm/dts/sama5d3xdm.dtsi
View File

@ -10,6 +10,32 @@
/ {
ahb {
apb {
hlcdc: hlcdc@f0030000 {
atmel,vl-bpix = <4>;
atmel,output-mode = <24>;
atmel,guard-time = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888_alt>;
status = "okay";
u-boot,dm-pre-reloc;
display-timings {
u-boot,dm-pre-reloc;
800x480 {
clock-frequency = <24000000>;
hactive = <800>;
vactive = <480>;
hsync-len = <5>;
hfront-porch = <64>;
hback-porch = <64>;
vfront-porch = <22>;
vback-porch = <21>;
vsync-len = <5>;
u-boot,dm-pre-reloc;
};
};
};
i2c1: i2c@f0018000 {
qt1070: keyboard@1b {
compatible = "qt1070";

21
arch/arm/dts/sama5d4.dtsi
View File

@ -320,31 +320,12 @@
u-boot,dm-pre-reloc;
hlcdc: hlcdc@f0000000 {
compatible = "atmel,sama5d4-hlcdc";
compatible = "atmel,at91sam9x5-hlcdc";
reg = <0xf0000000 0x4000>;
interrupts = <51 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
clock-names = "periph_clk","sys_clk", "slow_clk";
status = "disabled";
hlcdc-display-controller {
compatible = "atmel,hlcdc-display-controller";
#address-cells = <1>;
#size-cells = <0>;
port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
};
hlcdc_pwm: hlcdc-pwm {
compatible = "atmel,hlcdc-pwm";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_pwm>;
#pwm-cells = <3>;
};
};
dma1: dma-controller@f0004000 {

4
arch/arm/mach-at91/Kconfig
View File

@ -141,6 +141,7 @@ config TARGET_AT91SAM9X5EK
select AT91SAM9X5
select SUPPORT_SPL
select BOARD_EARLY_INIT_F
select BOARD_LATE_INIT
config TARGET_SAMA5D2_PTC
bool "SAMA5D2 PTC board"
@ -153,6 +154,7 @@ config TARGET_SAMA5D2_XPLAINED
select SAMA5D2
select SUPPORT_SPL
select BOARD_EARLY_INIT_F
select BOARD_LATE_INIT
config TARGET_SAMA5D27_SOM1_EK
bool "SAMA5D27 SOM1 EK board"
@ -185,12 +187,14 @@ config TARGET_SAMA5D4_XPLAINED
select SAMA5D4
select SUPPORT_SPL
select BOARD_EARLY_INIT_F
select BOARD_LATE_INIT
config TARGET_SAMA5D4EK
bool "SAMA5D4 Evaluation Kit"
select SAMA5D4
select SUPPORT_SPL
select BOARD_EARLY_INIT_F
select BOARD_LATE_INIT
config TARGET_MA5D4EVK
bool "Aries MA5D4EVK Evaluation Kit"

111
board/atmel/at91sam9x5ek/at91sam9x5ek.c
View File

@ -13,12 +13,6 @@
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
#include <debug_uart.h>
#include <lcd.h>
#include <atmel_hlcdc.h>
#ifdef CONFIG_LCD_INFO
#include <nand.h>
#include <version.h>
#endif
#include <asm/mach-types.h>
DECLARE_GLOBAL_DATA_PTR;
@ -86,103 +80,15 @@ static void at91sam9x5ek_nand_hw_init(void)
}
#endif
#ifdef CONFIG_LCD
vidinfo_t panel_info = {
.vl_col = 800,
.vl_row = 480,
.vl_clk = 24000000,
.vl_sync = LCDC_LCDCFG5_HSPOL | LCDC_LCDCFG5_VSPOL,
.vl_bpix = LCD_BPP,
.vl_tft = 1,
.vl_clk_pol = 1,
.vl_hsync_len = 128,
.vl_left_margin = 64,
.vl_right_margin = 64,
.vl_vsync_len = 2,
.vl_upper_margin = 22,
.vl_lower_margin = 21,
.mmio = ATMEL_BASE_LCDC,
};
void lcd_enable(void)
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
if (has_lcdc())
at91_pio3_set_a_periph(AT91_PIO_PORTC, 29, 1); /* power up */
#ifdef CONFIG_DM_VIDEO
at91_video_show_board_info();
#endif
return 0;
}
void lcd_disable(void)
{
if (has_lcdc())
at91_pio3_set_a_periph(AT91_PIO_PORTC, 29, 0); /* power down */
}
static void at91sam9x5ek_lcd_hw_init(void)
{
if (has_lcdc()) {
at91_pio3_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDPWM */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDVSYNC */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 28, 0); /* LCDHSYNC */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDDISP */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 29, 0); /* LCDDEN */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 30, 0); /* LCDPCK */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 0, 0); /* LCDD0 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDD1 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDD2 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 3, 0); /* LCDD3 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 4, 0); /* LCDD4 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 5, 0); /* LCDD5 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 6, 0); /* LCDD6 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 7, 0); /* LCDD7 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 8, 0); /* LCDD8 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 9, 0); /* LCDD9 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDD10 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDD11 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 12, 0); /* LCDD12 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 13, 0); /* LCDD13 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDD14 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDD15 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDD16 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 17, 0); /* LCDD17 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDD18 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDD19 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 20, 0); /* LCDD20 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 21, 0); /* LCDD21 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDD22 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDD23 */
at91_periph_clk_enable(ATMEL_ID_LCDC);
}
}
#ifdef CONFIG_LCD_INFO
void lcd_show_board_info(void)
{
ulong dram_size, nand_size;
int i;
char temp[32];
if (has_lcdc()) {
lcd_printf("%s\n", U_BOOT_VERSION);
lcd_printf("(C) 2012 ATMEL Corp\n");
lcd_printf("at91support@atmel.com\n");
lcd_printf("%s CPU at %s MHz\n",
get_cpu_name(),
strmhz(temp, get_cpu_clk_rate()));
dram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
dram_size += gd->bd->bi_dram[i].size;
nand_size = 0;
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += get_nand_dev_by_index(i)->size;
lcd_printf(" %ld MB SDRAM, %ld MB NAND\n",
dram_size >> 20,
nand_size >> 20);
}
}
#endif /* CONFIG_LCD_INFO */
#endif /* CONFIG_LCD */
#endif
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
void board_debug_uart_init(void)
@ -215,9 +121,6 @@ int board_init(void)
#if defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_EHCI_HCD)
at91_uhp_hw_init();
#endif
#ifdef CONFIG_LCD
at91sam9x5ek_lcd_hw_init();
#endif
return 0;
}

2
board/atmel/common/video_display.c
View File

@ -43,7 +43,7 @@ int at91_video_show_board_info(void)
nand_size = 0;
#ifdef CONFIG_NAND_ATMEL
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += nand_info[i]->size;
nand_size += get_nand_dev_by_index(i)->size;
#endif
len += sprintf(&buf[len], "%ld MB SDRAM, %ld MB NAND\n",

95
board/atmel/sama5d2_xplained/sama5d2_xplained.c
View File

@ -6,10 +6,7 @@
*/
#include <common.h>
#include <atmel_hlcdc.h>
#include <debug_uart.h>
#include <lcd.h>
#include <version.h>
#include <asm/io.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/atmel_pio4.h>
@ -26,90 +23,15 @@ static void board_usb_hw_init(void)
atmel_pio4_set_pio_output(AT91_PIO_PORTB, 10, 1);
}
#ifdef CONFIG_LCD
vidinfo_t panel_info = {
.vl_col = 480,
.vl_row = 272,
.vl_clk = 9000000,
.vl_bpix = LCD_BPP,
.vl_tft = 1,
.vl_hsync_len = 41,
.vl_left_margin = 2,
.vl_right_margin = 2,
.vl_vsync_len = 11,
.vl_upper_margin = 2,
.vl_lower_margin = 2,
.mmio = ATMEL_BASE_LCDC,
};
/* No power up/down pin for the LCD pannel */
void lcd_enable(void) { /* Empty! */ }
void lcd_disable(void) { /* Empty! */ }
unsigned int has_lcdc(void)
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
return 1;
#ifdef CONFIG_DM_VIDEO
at91_video_show_board_info();
#endif
return 0;
}
static void board_lcd_hw_init(void)
{
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 28, 0); /* LCDPWM */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 29, 0); /* LCDDISP */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 30, 0); /* LCDVSYNC */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 31, 0); /* LCDHSYNC */
atmel_pio4_set_a_periph(AT91_PIO_PORTD, 0, 0); /* LCDPCK */
atmel_pio4_set_a_periph(AT91_PIO_PORTD, 1, 0); /* LCDDEN */
/* LCDDAT0 */
/* LCDDAT1 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDDAT2 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDDAT3 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 12, 0); /* LCDDAT4 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 13, 0); /* LCDDAT5 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDDAT6 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDDAT7 */
/* LCDDAT8 */
/* LCDDAT9 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDDAT10 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 17, 0); /* LCDDAT11 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDDAT12 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDDAT13 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 20, 0); /* LCDDAT14 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 21, 0); /* LCDDAT15 */
/* LCDD16 */
/* LCDD17 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDDAT18 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDDAT19 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDDAT20 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 25, 0); /* LCDDAT21 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDDAT22 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDDAT23 */
at91_periph_clk_enable(ATMEL_ID_LCDC);
}
#ifdef CONFIG_LCD_INFO
void lcd_show_board_info(void)
{
ulong dram_size;
int i;
char temp[32];
lcd_printf("%s\n", U_BOOT_VERSION);
lcd_printf("2015 ATMEL Corp\n");
lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),
strmhz(temp, get_cpu_clk_rate()));
dram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
dram_size += gd->bd->bi_dram[i].size;
lcd_printf("%ld MB SDRAM\n", dram_size >> 20);
}
#endif /* CONFIG_LCD_INFO */
#endif /* CONFIG_LCD */
#endif
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
static void board_uart1_hw_init(void)
@ -142,9 +64,6 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#ifdef CONFIG_LCD
board_lcd_hw_init();
#endif
#ifdef CONFIG_CMD_USB
board_usb_hw_init();
#endif

83
board/atmel/sama5d3xek/sama5d3xek.c
View File

@ -13,9 +13,7 @@
#include <asm/arch/gpio.h>
#include <asm/arch/clk.h>
#include <debug_uart.h>
#include <lcd.h>
#include <linux/ctype.h>
#include <atmel_hlcdc.h>
#include <phy.h>
#include <micrel.h>
#include <spl.h>
@ -132,80 +130,6 @@ static void sama5d3xek_mci_hw_init(void)
}
#endif
#ifdef CONFIG_LCD
vidinfo_t panel_info = {
.vl_col = 800,
.vl_row = 480,
.vl_clk = 24000000,
.vl_bpix = LCD_BPP,
.vl_tft = 1,
.vl_hsync_len = 128,
.vl_left_margin = 64,
.vl_right_margin = 64,
.vl_vsync_len = 2,
.vl_upper_margin = 22,
.vl_lower_margin = 21,
.mmio = ATMEL_BASE_LCDC,
};
void lcd_enable(void)
{
}
void lcd_disable(void)
{
}
static void sama5d3xek_lcd_hw_init(void)
{
gd->fb_base = CONFIG_SAMA5D3_LCD_BASE;
/* The higher 8 bit of LCD is board related */
at91_pio3_set_c_periph(AT91_PIO_PORTC, 14, 0); /* LCDD16 */
at91_pio3_set_c_periph(AT91_PIO_PORTC, 13, 0); /* LCDD17 */
at91_pio3_set_c_periph(AT91_PIO_PORTC, 12, 0); /* LCDD18 */
at91_pio3_set_c_periph(AT91_PIO_PORTC, 11, 0); /* LCDD19 */
at91_pio3_set_c_periph(AT91_PIO_PORTC, 10, 0); /* LCDD20 */
at91_pio3_set_c_periph(AT91_PIO_PORTC, 15, 0); /* LCDD21 */
at91_pio3_set_c_periph(AT91_PIO_PORTE, 27, 0); /* LCDD22 */
at91_pio3_set_c_periph(AT91_PIO_PORTE, 28, 0); /* LCDD23 */
/* Configure lower 16 bit of LCD and enable clock */
at91_lcd_hw_init();
}
#ifdef CONFIG_LCD_INFO
#include <nand.h>
#include <version.h>
void lcd_show_board_info(void)
{
ulong dram_size;
uint64_t nand_size;
int i;
char temp[32];
lcd_printf("%s\n", U_BOOT_VERSION);
lcd_printf("(C) 2013 ATMEL Corp\n");
lcd_printf("at91@atmel.com\n");
lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),
strmhz(temp, get_cpu_clk_rate()));
dram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
dram_size += gd->bd->bi_dram[i].size;
nand_size = 0;
#ifdef CONFIG_NAND_ATMEL
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += get_nand_dev_by_index(i)->size;
#endif
lcd_printf("%ld MB SDRAM, %lld MB NAND\n",
dram_size >> 20, nand_size >> 20);
}
#endif /* CONFIG_LCD_INFO */
#endif /* CONFIG_LCD */
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
void board_debug_uart_init(void)
{
@ -239,10 +163,6 @@ int board_init(void)
#endif
#ifdef CONFIG_GENERIC_ATMEL_MCI
sama5d3xek_mci_hw_init();
#endif
#ifdef CONFIG_LCD
if (has_lcdc())
sama5d3xek_lcd_hw_init();
#endif
return 0;
}
@ -268,6 +188,9 @@ int board_late_init(void)
strcat(name, "ek.dtb");
env_set("dtb_name", name);
#endif
#ifdef CONFIG_DM_VIDEO
at91_video_show_board_info();
#endif
return 0;
}

102
board/atmel/sama5d4_xplained/sama5d4_xplained.c
View File

@ -14,11 +14,7 @@
#include <asm/arch/clk.h>
#include <asm/arch/sama5d3_smc.h>
#include <asm/arch/sama5d4.h>
#include <atmel_hlcdc.h>
#include <debug_uart.h>
#include <lcd.h>
#include <nand.h>
#include <version.h>
DECLARE_GLOBAL_DATA_PTR;
@ -73,98 +69,15 @@ static void sama5d4_xplained_usb_hw_init(void)
}
#endif
#ifdef CONFIG_LCD
vidinfo_t panel_info = {
.vl_col = 480,
.vl_row = 272,
.vl_clk = 9000000,
.vl_bpix = LCD_BPP,
.vl_tft = 1,
.vl_hsync_len = 41,
.vl_left_margin = 2,
.vl_right_margin = 2,
.vl_vsync_len = 11,
.vl_upper_margin = 2,
.vl_lower_margin = 2,
.mmio = ATMEL_BASE_LCDC,
};
/* No power up/down pin for the LCD pannel */
void lcd_enable(void) { /* Empty! */ }
void lcd_disable(void) { /* Empty! */ }
unsigned int has_lcdc(void)
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
return 1;
}
static void sama5d4_xplained_lcd_hw_init(void)
{
at91_pio3_set_a_periph(AT91_PIO_PORTA, 24, 0); /* LCDPWM */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 25, 0); /* LCDDISP */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 26, 0); /* LCDVSYNC */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 27, 0); /* LCDHSYNC */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 28, 0); /* LCDDOTCK */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 29, 0); /* LCDDEN */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 0, 0); /* LCDD0 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 1, 0); /* LCDD1 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 2, 0); /* LCDD2 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 3, 0); /* LCDD3 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 4, 0); /* LCDD4 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 5, 0); /* LCDD5 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 6, 0); /* LCDD6 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 7, 0); /* LCDD7 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 8, 0); /* LCDD9 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 9, 0); /* LCDD8 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 10, 0); /* LCDD10 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 11, 0); /* LCDD11 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 12, 0); /* LCDD12 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 13, 0); /* LCDD13 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 14, 0); /* LCDD14 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 15, 0); /* LCDD15 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 16, 0); /* LCDD16 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 17, 0); /* LCDD17 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 18, 0); /* LCDD18 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 19, 0); /* LCDD19 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 20, 0); /* LCDD20 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 21, 0); /* LCDD21 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 22, 0); /* LCDD22 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 23, 0); /* LCDD23 */
/* Enable clock */
at91_periph_clk_enable(ATMEL_ID_LCDC);
}
#ifdef CONFIG_LCD_INFO
void lcd_show_board_info(void)
{
ulong dram_size, nand_size;
int i;
char temp[32];
lcd_printf("%s\n", U_BOOT_VERSION);
lcd_printf("2014 ATMEL Corp\n");
lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),
strmhz(temp, get_cpu_clk_rate()));
dram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
dram_size += gd->bd->bi_dram[i].size;
nand_size = 0;
#ifdef CONFIG_NAND_ATMEL
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += get_nand_dev_by_index(i)->size;
#ifdef CONFIG_DM_VIDEO
at91_video_show_board_info();
#endif
lcd_printf("%ld MB SDRAM, %ld MB NAND\n",
dram_size >> 20, nand_size >> 20);
return 0;
}
#endif /* CONFIG_LCD_INFO */
#endif /* CONFIG_LCD */
#endif
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
static void sama5d4_xplained_serial3_hw_init(void)
@ -212,9 +125,6 @@ int board_init(void)
#ifdef CONFIG_NAND_ATMEL
sama5d4_xplained_nand_hw_init();
#endif
#ifdef CONFIG_LCD
sama5d4_xplained_lcd_hw_init();
#endif
#ifdef CONFIG_CMD_USB
sama5d4_xplained_usb_hw_init();
#endif

97
board/atmel/sama5d4ek/sama5d4ek.c
View File

@ -14,11 +14,7 @@
#include <asm/arch/clk.h>
#include <asm/arch/sama5d3_smc.h>
#include <asm/arch/sama5d4.h>
#include <atmel_hlcdc.h>
#include <debug_uart.h>
#include <lcd.h>
#include <nand.h>
#include <version.h>
DECLARE_GLOBAL_DATA_PTR;
@ -74,93 +70,15 @@ static void sama5d4ek_usb_hw_init(void)
}
#endif
#ifdef CONFIG_LCD
vidinfo_t panel_info = {
.vl_col = 800,
.vl_row = 480,
.vl_clk = 33260000,
.vl_bpix = LCD_BPP,
.vl_tft = 1,
.vl_hsync_len = 5,
.vl_left_margin = 128,
.vl_right_margin = 0,
.vl_vsync_len = 5,
.vl_upper_margin = 23,
.vl_lower_margin = 22,
.mmio = ATMEL_BASE_LCDC,
};
/* No power up/down pin for the LCD pannel */
void lcd_enable(void) { /* Empty! */ }
void lcd_disable(void) { /* Empty! */ }
unsigned int has_lcdc(void)
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
return 1;
}
static void sama5d4ek_lcd_hw_init(void)
{
at91_pio3_set_a_periph(AT91_PIO_PORTA, 24, 0); /* LCDPWM */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 25, 0); /* LCDDISP */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 26, 0); /* LCDVSYNC */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 27, 0); /* LCDHSYNC */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 28, 0); /* LCDDOTCK */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 29, 0); /* LCDDEN */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 2, 0); /* LCDD2 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 3, 0); /* LCDD3 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 4, 0); /* LCDD4 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 5, 0); /* LCDD5 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 6, 0); /* LCDD6 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 7, 0); /* LCDD7 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 10, 0); /* LCDD10 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 11, 0); /* LCDD11 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 12, 0); /* LCDD12 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 13, 0); /* LCDD13 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 14, 0); /* LCDD14 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 15, 0); /* LCDD15 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 18, 0); /* LCDD18 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 19, 0); /* LCDD19 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 20, 0); /* LCDD20 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 21, 0); /* LCDD21 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 22, 0); /* LCDD22 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 23, 0); /* LCDD23 */
/* Enable clock */
at91_periph_clk_enable(ATMEL_ID_LCDC);
}
#ifdef CONFIG_LCD_INFO
void lcd_show_board_info(void)
{
ulong dram_size, nand_size;
int i;
char temp[32];
lcd_printf("%s\n", U_BOOT_VERSION);
lcd_printf("2014 ATMEL Corp\n");
lcd_printf("at91@atmel.com\n");
lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),
strmhz(temp, get_cpu_clk_rate()));
dram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
dram_size += gd->bd->bi_dram[i].size;
nand_size = 0;
#ifdef CONFIG_NAND_ATMEL
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += get_nand_dev_by_index(i)->size;
#ifdef CONFIG_DM_VIDEO
at91_video_show_board_info();
#endif
lcd_printf("%ld MB SDRAM, %ld MB NAND\n",
dram_size >> 20, nand_size >> 20);
return 0;
}
#endif /* CONFIG_LCD_INFO */
#endif /* CONFIG_LCD */
#endif
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
static void sama5d4ek_serial3_hw_init(void)
@ -196,9 +114,6 @@ int board_init(void)
#ifdef CONFIG_NAND_ATMEL
sama5d4ek_nand_hw_init();
#endif
#ifdef CONFIG_LCD
sama5d4ek_lcd_hw_init();
#endif
#ifdef CONFIG_CMD_USB
sama5d4ek_usb_hw_init();
#endif

3
configs/at91sam9x5ek_dataflash_defconfig
View File

@ -60,4 +60,5 @@ CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y

3
configs/at91sam9x5ek_mmc_defconfig
View File

@ -60,4 +60,5 @@ CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y

3
configs/at91sam9x5ek_nandflash_defconfig
View File

@ -60,4 +60,5 @@ CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y

3
configs/at91sam9x5ek_spiflash_defconfig
View File

@ -60,4 +60,5 @@ CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y

2
configs/sama5d2_xplained_mmc_defconfig
View File

@ -82,3 +82,5 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y

2
configs/sama5d2_xplained_spiflash_defconfig
View File

@ -79,3 +79,5 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y

3
configs/sama5d36ek_cmp_mmc_defconfig
View File

@ -55,4 +55,5 @@ CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_LCD=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y

3
configs/sama5d36ek_cmp_nandflash_defconfig
View File

@ -55,5 +55,6 @@ CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_LCD=y
CONFIG_FAT_WRITE=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y

3
configs/sama5d36ek_cmp_spiflash_defconfig
View File

@ -55,5 +55,6 @@ CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_LCD=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y
CONFIG_FAT_WRITE=y

3
configs/sama5d3xek_mmc_defconfig
View File

@ -81,4 +81,5 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_LCD=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y

3
configs/sama5d3xek_nandflash_defconfig
View File

@ -76,5 +76,6 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_LCD=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y
CONFIG_FAT_WRITE=y

3
configs/sama5d3xek_spiflash_defconfig
View File

@ -77,5 +77,6 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_LCD=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y
CONFIG_FAT_WRITE=y

2
configs/sama5d4_xplained_mmc_defconfig
View File

@ -78,3 +78,5 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y

2
configs/sama5d4_xplained_nandflash_defconfig
View File

@ -75,3 +75,5 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y

2
configs/sama5d4_xplained_spiflash_defconfig
View File

@ -77,3 +77,5 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y

3
configs/sama5d4ek_mmc_defconfig
View File

@ -78,4 +78,5 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_LCD=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y

3
configs/sama5d4ek_nandflash_defconfig
View File

@ -75,4 +75,5 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_LCD=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y

3
configs/sama5d4ek_spiflash_defconfig
View File

@ -74,4 +74,5 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_LCD=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y

8
drivers/video/Kconfig
View File

@ -65,6 +65,14 @@ config VIDEO_BPP32
this option, such displays will not be supported and console output
will be empty.
config VIDEO_ANSI
bool "Support ANSI escape sequences in video console"
depends on DM_VIDEO
default y if DM_VIDEO
help
Enable ANSI escape sequence decoding for a more fully functional
console.
config CONSOLE_NORMAL
bool "Support a simple text console"
depends on DM_VIDEO

205
drivers/video/vidconsole-uclass.c
View File

@ -9,6 +9,7 @@
*/
#include <common.h>
#include <linux/ctype.h>
#include <dm.h>
#include <video.h>
#include <video_console.h>
@ -107,12 +108,213 @@ static void vidconsole_newline(struct udevice *dev)
video_sync(dev->parent);
}
static const struct {
unsigned r;
unsigned g;
unsigned b;
} colors[] = {
{ 0x00, 0x00, 0x00 }, /* black */
{ 0xff, 0x00, 0x00 }, /* red */
{ 0x00, 0xff, 0x00 }, /* green */
{ 0xff, 0xff, 0x00 }, /* yellow */
{ 0x00, 0x00, 0xff }, /* blue */
{ 0xff, 0x00, 0xff }, /* magenta */
{ 0x00, 0xff, 0xff }, /* cyan */
{ 0xff, 0xff, 0xff }, /* white */
};
static void set_color(struct video_priv *priv, unsigned idx, unsigned *c)
{
switch (priv->bpix) {
case VIDEO_BPP16:
*c = ((colors[idx].r >> 3) << 0) |
((colors[idx].g >> 2) << 5) |
((colors[idx].b >> 3) << 11);
break;
case VIDEO_BPP32:
*c = 0xff000000 |
(colors[idx].r << 0) |
(colors[idx].g << 8) |
(colors[idx].b << 16);
break;
default:
/* unsupported, leave current color in place */
break;
}
}
static char *parsenum(char *s, int *num)
{
char *end;
*num = simple_strtol(s, &end, 10);
return end;
}
/*
* Process a character while accumulating an escape string. Chars are
* accumulated into escape_buf until the end of escape sequence is
* found, at which point the sequence is parsed and processed.
*/
static void vidconsole_escape_char(struct udevice *dev, char ch)
{
struct vidconsole_priv *priv = dev_get_uclass_priv(dev);
if (!IS_ENABLED(CONFIG_VIDEO_ANSI))
goto error;
/* Sanity checking for bogus ESC sequences: */
if (priv->escape_len >= sizeof(priv->escape_buf))
goto error;
if (priv->escape_len == 0 && ch != '[')
goto error;
priv->escape_buf[priv->escape_len++] = ch;
/*
* Escape sequences are terminated by a letter, so keep
* accumulating until we get one:
*/
if (!isalpha(ch))
return;
/*
* clear escape mode first, otherwise things will get highly
* surprising if you hit any debug prints that come back to
* this console.
*/
priv->escape = 0;
switch (ch) {
case 'H':
case 'f': {
int row, col;
char *s = priv->escape_buf;
/*
* Set cursor position: [%d;%df or [%d;%dH
*/
s++; /* [ */
s = parsenum(s, &row);
s++; /* ; */
s = parsenum(s, &col);
priv->ycur = row * priv->y_charsize;
priv->xcur_frac = priv->xstart_frac +
VID_TO_POS(col * priv->x_charsize);
break;
}
case 'J': {
int mode;
/*
* Clear part/all screen:
* [J or [0J - clear screen from cursor down
* [1J - clear screen from cursor up
* [2J - clear entire screen
*
* TODO we really only handle entire-screen case, others
* probably require some additions to video-uclass (and
* are not really needed yet by efi_console)
*/
parsenum(priv->escape_buf + 1, &mode);
if (mode == 2) {
video_clear(dev->parent);
video_sync(dev->parent);
priv->ycur = 0;
priv->xcur_frac = priv->xstart_frac;
} else {
debug("unsupported clear mode: %d\n", mode);
}
break;
}
case 'm': {
struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent);
char *s = priv->escape_buf;
char *end = &priv->escape_buf[priv->escape_len];
/*
* Set graphics mode: [%d;...;%dm
*
* Currently only supports the color attributes:
*
* Foreground Colors:
*
* 30 Black
* 31 Red
* 32 Green
* 33 Yellow
* 34 Blue
* 35 Magenta
* 36 Cyan
* 37 White
*
* Background Colors:
*
* 40 Black
* 41 Red
* 42 Green
* 43 Yellow
* 44 Blue
* 45 Magenta
* 46 Cyan
* 47 White
*/
s++; /* [ */
while (s < end) {
int val;
s = parsenum(s, &val);
s++;
switch (val) {
case 30 ... 37:
/* fg color */
set_color(vid_priv, val - 30,
(unsigned *)&vid_priv->colour_fg);
break;
case 40 ... 47:
/* bg color */
set_color(vid_priv, val - 40,
(unsigned *)&vid_priv->colour_bg);
break;
default:
/* unknown/unsupported */
break;
}
}
break;
}
default:
debug("unrecognized escape sequence: %*s\n",
priv->escape_len, priv->escape_buf);
}
return;
error:
/* something went wrong, just revert to normal mode: */
priv->escape = 0;
}
int vidconsole_put_char(struct udevice *dev, char ch)
{
struct vidconsole_priv *priv = dev_get_uclass_priv(dev);
int ret;
if (priv->escape) {
vidconsole_escape_char(dev, ch);
return 0;
}
switch (ch) {
case '\x1b':
priv->escape_len = 0;
priv->escape = 1;
break;
case '\a':
/* beep */
break;
@ -163,6 +365,7 @@ static void vidconsole_putc(struct stdio_dev *sdev, const char ch)
struct udevice *dev = sdev->priv;
vidconsole_put_char(dev, ch);
video_sync(dev->parent);
}
static void vidconsole_puts(struct stdio_dev *sdev, const char *s)
@ -260,6 +463,8 @@ static int do_video_puts(cmd_tbl_t *cmdtp, int flag, int argc,
for (s = argv[1]; *s; s++)
vidconsole_put_char(dev, *s);
video_sync(dev->parent);
return 0;
}

4
drivers/video/video-uclass.c
View File

@ -87,7 +87,7 @@ int video_reserve(ulong *addrp)
return 0;
}
static int video_clear(struct udevice *dev)
void video_clear(struct udevice *dev)
{
struct video_priv *priv = dev_get_uclass_priv(dev);
@ -100,8 +100,6 @@ static int video_clear(struct udevice *dev)
} else {
memset(priv->fb, priv->colour_bg, priv->fb_size);
}
return 0;
}
/* Flush video activity to the caches */

10
include/configs/at91sam9x5ek.h
View File

@ -23,16 +23,6 @@
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
/* LCD */
#define LCD_BPP LCD_COLOR16
#define LCD_OUTPUT_BPP 24
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565
/*
* BOOTP options
*/

12
include/configs/sama5d2_xplained.h
View File

@ -35,18 +35,6 @@
#define CONFIG_SF_DEFAULT_SPEED 30000000
#endif
/* LCD */
#ifdef CONFIG_LCD
#define LCD_BPP LCD_COLOR16
#define LCD_OUTPUT_BPP 24
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565
#endif
#ifdef CONFIG_SD_BOOT
/* bootstrap + u-boot + env in sd card */

9
include/configs/sama5d3xek.h
View File

@ -28,15 +28,6 @@
*/
#define ATMEL_PMC_UHP (1 << 6)
/* LCD */
#define LCD_BPP LCD_COLOR16
#define LCD_OUTPUT_BPP 24
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565
/* board specific (not enough SRAM) */
#define CONFIG_SAMA5D3_LCD_BASE 0x23E00000

11
include/configs/sama5d4_xplained.h
View File

@ -47,17 +47,6 @@
#define CONFIG_ATMEL_NAND_HW_PMECC
#endif
/* LCD */
#ifdef CONFIG_LCD
#define LCD_BPP LCD_COLOR16
#define LCD_OUTPUT_BPP 24
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565
#endif
/* SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x200000

9
include/configs/sama5d4ek.h
View File

@ -45,15 +45,6 @@
#define CONFIG_ATMEL_NAND_HW_PMECC
#endif
/* LCD */
#define LCD_BPP LCD_COLOR16
#define LCD_OUTPUT_BPP 18
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565
/* SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x200000

7
include/video.h
View File

@ -114,6 +114,13 @@ struct video_ops {
*/
int video_reserve(ulong *addrp);
/**
* video_clear() - Clear a device's frame buffer to background color.
*
* @dev: Device to clear
*/
void video_clear(struct udevice *dev);
/**
* video_sync() - Sync a device's frame buffer with its hardware
*

11
include/video_console.h
View File

@ -29,6 +29,9 @@
* @xsize_frac: Width of the display in fractional units
* @xstart_frac: Left margin for the text console in fractional units
* @last_ch: Last character written to the text console on this line
* @escape: TRUE if currently accumulating an ANSI escape sequence
* @escape_len: Length of accumulated escape sequence so far
* @escape_buf: Buffer to accumulate escape sequence
*/
struct vidconsole_priv {
struct stdio_dev sdev;
@ -42,6 +45,14 @@ struct vidconsole_priv {
int xsize_frac;
int xstart_frac;
int last_ch;
/*
* ANSI escape sequences are accumulated character by character,
* starting after the ESC char (0x1b) until the entire sequence
* is consumed at which point it is acted upon.
*/
int escape;
int escape_len;
char escape_buf[32];
};
/**

58
test/dm/video.c
View File

@ -100,6 +100,14 @@ static int select_vidconsole(struct unit_test_state *uts, const char *drv_name)
return 0;
}
static void vidconsole_put_string(struct udevice *dev, const char *str)
{
const char *s;
for (s = str; *s; s++)
vidconsole_put_char(dev, *s);
}
/* Test text output works on the video console */
static int dm_test_video_text(struct unit_test_state *uts)
{
@ -140,19 +148,51 @@ static int dm_test_video_chars(struct unit_test_state *uts)
{
struct udevice *dev, *con;
const char *test_string = "Well\b\b\b\bxhe is\r \n\ta very \amodest \bman\n\t\tand Has much to\b\bto be modest about.";
const char *s;
ut_assertok(select_vidconsole(uts, "vidconsole0"));
ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev));
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
for (s = test_string; *s; s++)
vidconsole_put_char(con, *s);
vidconsole_put_string(con, test_string);
ut_asserteq(466, compress_frame_buffer(dev));
return 0;
}
DM_TEST(dm_test_video_chars, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
#ifdef CONFIG_VIDEO_ANSI
#define ANSI_ESC "\x1b"
/* Test handling of ANSI escape sequences */
static int dm_test_video_ansi(struct unit_test_state *uts)
{
struct udevice *dev, *con;
ut_assertok(select_vidconsole(uts, "vidconsole0"));
ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev));
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
/* reference clear: */
video_clear(con->parent);
video_sync(con->parent);
ut_asserteq(46, compress_frame_buffer(dev));
/* test clear escape sequence: [2J */
vidconsole_put_string(con, "A\tB\tC"ANSI_ESC"[2J");
ut_asserteq(46, compress_frame_buffer(dev));
/* test set-cursor: [%d;%df */
vidconsole_put_string(con, "abc"ANSI_ESC"[2;2fab"ANSI_ESC"[4;4fcd");
ut_asserteq(142, compress_frame_buffer(dev));
/* test colors (30-37 fg color, 40-47 bg color) */
vidconsole_put_string(con, ANSI_ESC"[30;41mfoo"); /* black on red */
vidconsole_put_string(con, ANSI_ESC"[33;44mbar"); /* yellow on blue */
ut_asserteq(268, compress_frame_buffer(dev));
return 0;
}
DM_TEST(dm_test_video_ansi, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
#endif
/**
* check_vidconsole_output() - Run a text console test
*
@ -294,12 +334,10 @@ static int dm_test_video_truetype(struct unit_test_state *uts)
{
struct udevice *dev, *con;
const char *test_string = "Criticism may not be agreeable, but it is necessary. It fulfils the same function as pain in the human body. It calls attention to an unhealthy state of things. Some see private enterprise as a predatory target to be shot, others as a cow to be milked, but few are those who see it as a sturdy horse pulling the wagon. The \aprice OF\b\bof greatness\n\tis responsibility.\n\nBye";
const char *s;
ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev));
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
for (s = test_string; *s; s++)
vidconsole_put_char(con, *s);
vidconsole_put_string(con, test_string);
ut_asserteq(12619, compress_frame_buffer(dev));
return 0;
@ -312,7 +350,6 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts)
struct sandbox_sdl_plat *plat;
struct udevice *dev, *con;
const char *test_string = "Criticism may not be agreeable, but it is necessary. It fulfils the same function as pain in the human body. It calls attention to an unhealthy state of things. Some see private enterprise as a predatory target to be shot, others as a cow to be milked, but few are those who see it as a sturdy horse pulling the wagon. The \aprice OF\b\bof greatness\n\tis responsibility.\n\nBye";
const char *s;
ut_assertok(uclass_find_device(UCLASS_VIDEO, 0, &dev));
ut_assert(!device_active(dev));
@ -321,8 +358,7 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts)
ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev));
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
for (s = test_string; *s; s++)
vidconsole_put_char(con, *s);
vidconsole_put_string(con, test_string);
ut_asserteq(33849, compress_frame_buffer(dev));
return 0;
@ -335,7 +371,6 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts)
struct sandbox_sdl_plat *plat;
struct udevice *dev, *con;
const char *test_string = "...Criticism may or may\b\b\b\b\b\bnot be agreeable, but seldom it is necessary\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\bit is necessary. It fulfils the same function as pain in the human body. It calls attention to an unhealthy state of things.";
const char *s;
ut_assertok(uclass_find_device(UCLASS_VIDEO, 0, &dev));
ut_assert(!device_active(dev));
@ -344,8 +379,7 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts)
ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev));
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
for (s = test_string; *s; s++)
vidconsole_put_char(con, *s);
vidconsole_put_string(con, test_string);
ut_asserteq(34871, compress_frame_buffer(dev));
return 0;