stm32mp: stpmic1: remove the debug unit request by debugger
Depending on backup register value, U-Boot SPL maintains the debug unit powered-on for debugging purpose; only BUCK1 is required for powering the debug unit, so revert the setting for all the other power lanes, except BUCK3 that has to be always on. To be functional this patch requires a modification in the debugger ,openocd for example, to update the STM32MP15 backup register when it is required to debug SPL after reset. After deeper analysis this behavior will be never supported in tools so the associated code, will be never used and the associated code can be removed. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
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@ -135,7 +135,6 @@ enum boot_device {
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#define TAMP_BOOT_DEVICE_MASK GENMASK(7, 4)
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#define TAMP_BOOT_INSTANCE_MASK GENMASK(3, 0)
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#define TAMP_BOOT_FORCED_MASK GENMASK(7, 0)
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#define TAMP_BOOT_DEBUG_ON BIT(16)
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enum forced_boot_mode {
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BOOT_NORMAL = 0x00,
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@ -202,18 +202,4 @@ void stpmic1_init(u32 voltage_mv)
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STPMIC1_BUCKS_MRST_CR,
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STPMIC1_MRST_BUCK(STPMIC1_BUCK3),
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STPMIC1_MRST_BUCK(STPMIC1_BUCK3));
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/* Check if debug is enabled to program PMIC according to the bit */
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if (readl(TAMP_BOOT_CONTEXT) & TAMP_BOOT_DEBUG_ON) {
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log_info("Keep debug unit ON\n");
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pmic_clrsetbits(dev, STPMIC1_BUCKS_MRST_CR,
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STPMIC1_MRST_BUCK_DEBUG,
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STPMIC1_MRST_BUCK_DEBUG);
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if (STPMIC1_MRST_LDO_DEBUG)
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pmic_clrsetbits(dev, STPMIC1_LDOS_MRST_CR,
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STPMIC1_MRST_LDO_DEBUG,
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STPMIC1_MRST_LDO_DEBUG);
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}
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}
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@ -23,12 +23,9 @@
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/* BUCKS_MRST_CR */
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#define STPMIC1_MRST_BUCK(buck) BIT(buck)
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#define STPMIC1_MRST_BUCK_DEBUG (STPMIC1_MRST_BUCK(STPMIC1_BUCK1) | \
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STPMIC1_MRST_BUCK(STPMIC1_BUCK3))
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/* LDOS_MRST_CR */
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#define STPMIC1_MRST_LDO(ldo) BIT(ldo)
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#define STPMIC1_MRST_LDO_DEBUG 0
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/* BUCKx_MAIN_CR (x=1...4) */
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#define STPMIC1_BUCK_ENA BIT(0)
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