arm64: fsl-layerscape: add get_svr and IS_SVR_REV helper
Adds get_svr and IS_SVR_REV helpers for ARMv8 platforms, similar to PPC and ARMv7. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
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@ -528,6 +528,13 @@ u32 fsl_qoriq_core_to_type(unsigned int core)
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return -1; /* cannot identify the cluster */
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}
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uint get_svr(void)
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{
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struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
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return gur_in32(&gur->svr);
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}
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#ifdef CONFIG_DISPLAY_CPUINFO
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int print_cpuinfo(void)
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{
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@ -596,4 +596,6 @@ struct ccsr_cci400 {
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#define SCR0_CLIENTPD_MASK 0x00000001
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#define SCR0_USFCFG_MASK 0x00000400
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uint get_svr(void);
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#endif /* __ARCH_FSL_LSCH2_IMMAP_H__*/
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@ -319,4 +319,7 @@ struct ccsr_reset {
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u32 ip_rev1; /* 0xbf8 */
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u32 ip_rev2; /* 0xbfc */
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};
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uint get_svr(void);
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#endif /* __ARCH_FSL_LSCH3_IMMAP_H_ */
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@ -53,6 +53,8 @@ struct cpu_type {
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#define SVR_MIN(svr) (((svr) >> 0) & 0xf)
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#define SVR_SOC_VER(svr) (((svr) >> 8) & SVR_WO_E)
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#define IS_E_PROCESSOR(svr) (!((svr >> 8) & 0x1))
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#define IS_SVR_REV(svr, maj, min) \
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((SVR_MAJ(svr) == (maj)) && (SVR_MIN(svr) == (min)))
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/* ahci port register default value */
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#define AHCI_PORT_PHY_1_CFG 0xa003fffe
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