leandrof/u-boot
1
0
Fork 1
Code Issues Pull Requests Packages Projects Releases Wiki Activity

ARM: rmobile: Remove TMU0/TMU1 settings on Gen3

Browse Source 
U-Boot uses ARM generic timer, TMU0 and TMU1 are not used, remove them.

Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
This commit is contained in:
Hiroyuki Yokoyama 2016-03-30 10:56:21 +09:00 committed by Marek Vasut
parent 44c56bf824
commit 6f56582198
5 changed files with 0 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
board/renesas/draak/draak.c
View File

@ -44,17 +44,12 @@ void s_init(void)
}
#define GSX_MSTP112 BIT(12) /* 3DG */
#define TMU0_MSTP125 BIT(25) /* secure */
#define TMU1_MSTP124 BIT(24) /* non-secure */
#define SCIF2_MSTP310 BIT(10) /* SCIF2 */
#define DVFS_MSTP926 BIT(26)
#define HSUSB_MSTP704 BIT(4) /* HSUSB */
int board_early_init_f(void)
{
/* TMU0,1 */ /* which use ? */
mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124);
#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */
mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926);

5
board/renesas/eagle/eagle.c
View File

@ -50,17 +50,12 @@ void s_init(void)
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
}
#define TMU0_MSTP125 BIT(25) /* secure */
int board_early_init_f(void)
{
/* Unlock CPG access */
writel(0xA5A5FFFF, CPGWPR);
writel(0x5A5A0000, CPGWPCR);
/* TMU0 */
mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
return 0;
}

5
board/renesas/ebisu/ebisu.c
View File

@ -30,13 +30,8 @@ void s_init(void)
{
}
#define TMU0_MSTP125 BIT(25) /* secure */
int board_early_init_f(void)
{
/* TMU0 */
mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
return 0;
}

5
board/renesas/salvator-x/salvator-x.c
View File

@ -45,17 +45,12 @@ void s_init(void)
}
#define GSX_MSTP112 BIT(12) /* 3DG */
#define TMU0_MSTP125 BIT(25) /* secure */
#define TMU1_MSTP124 BIT(24) /* non-secure */
#define SCIF2_MSTP310 BIT(10) /* SCIF2 */
#define DVFS_MSTP926 BIT(26)
#define HSUSB_MSTP704 BIT(4) /* HSUSB */
int board_early_init_f(void)
{
/* TMU0,1 */ /* which use ? */
mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124);
#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */
mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926);

5
board/renesas/ulcb/ulcb.c
View File

@ -44,17 +44,12 @@ void s_init(void)
}
#define GSX_MSTP112 BIT(12) /* 3DG */
#define TMU0_MSTP125 BIT(25) /* secure */
#define TMU1_MSTP124 BIT(24) /* non-secure */
#define SCIF2_MSTP310 BIT(10) /* SCIF2 */
#define DVFS_MSTP926 BIT(26)
#define HSUSB_MSTP704 BIT(4) /* HSUSB */
int board_early_init_f(void)
{
/* TMU0,1 */ /* which use ? */
mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124);
#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */
mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926);