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arm: powerpc: Tidy up code style for cache functions

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Remove the unwanted space before the bracket.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Simon Glass 2019-11-14 12:57:36 -07:00 committed by Tom Rini
parent 62270f4395
commit 6cc915b5fb
6 changed files with 28 additions and 24 deletions
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12
arch/arm/lib/cache-cp15.c
View File

@ -253,17 +253,17 @@ static void cache_disable(uint32_t cache_bit)
#endif
#if CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
void icache_enable (void)
void icache_enable(void)
{
return;
}
void icache_disable (void)
void icache_disable(void)
{
return;
}
int icache_status (void)
int icache_status(void)
{
return 0; /* always off */
}
@ -285,17 +285,17 @@ int icache_status(void)
#endif
#if CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
void dcache_enable (void)
void dcache_enable(void)
{
return;
}
void dcache_disable (void)
void dcache_disable(void)
{
return;
}
int dcache_status (void)
int dcache_status(void)
{
return 0; /* always off */
}

18
arch/microblaze/cpu/cache.c
View File

@ -8,7 +8,7 @@
#include <common.h>
#include <asm/asm.h>
int dcache_status (void)
int dcache_status(void)
{
int i = 0;
int mask = 0x80;
@ -18,7 +18,7 @@ int dcache_status (void)
return i;
}
int icache_status (void)
int icache_status(void)
{
int i = 0;
int mask = 0x20;
@ -28,28 +28,32 @@ int icache_status (void)
return i;
}
void icache_enable (void) {
void icache_enable(void)
{
MSRSET(0x20);
}
void icache_disable(void) {
void icache_disable(void)
{
/* we are not generate ICACHE size -> flush whole cache */
flush_cache(0, 32768);
MSRCLR(0x20);
}
void dcache_enable (void) {
void dcache_enable(void)
{
MSRSET(0x80);
}
void dcache_disable(void) {
void dcache_disable(void)
{
#ifdef XILINX_USE_DCACHE
flush_cache(0, XILINX_DCACHE_BYTE_SIZE);
#endif
MSRCLR(0x80);
}
void flush_cache (ulong addr, ulong size)
void flush_cache(ulong addr, ulong size)
{
int i;
for (i = 0; i < size; i += 4)

2
board/armltd/integrator/integrator.c
View File

@ -109,7 +109,7 @@ extern void cm_remap(void);
writel(SC_CTRL_FLASHVPP | SC_CTRL_FLASHWP, SC_CTRLS);
#endif
icache_enable ();
icache_enable();
return 0;
}

12
board/cobra5272/flash.c
View File

@ -164,8 +164,8 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
* chip is in programming mode.
*/
cflag = icache_status ();
icache_disable ();
cflag = icache_status();
icache_disable();
iflag = disable_interrupts ();
printf ("\n");
@ -237,7 +237,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
enable_interrupts ();
if (cflag)
icache_enable ();
icache_enable();
return rc;
}
@ -267,8 +267,8 @@ static int write_word (flash_info_t * info, ulong dest, ulong data)
* chip is in programming mode.
*/
cflag = icache_status ();
icache_disable ();
cflag = icache_status();
icache_disable();
iflag = disable_interrupts ();
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
@ -303,7 +303,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data)
enable_interrupts ();
if (cflag)
icache_enable ();
icache_enable();
return rc;
}

2
include/common.h
View File

@ -189,7 +189,7 @@ int testdram(void);
int icache_status (void);
void icache_enable (void);
void icache_disable(void);
int dcache_status (void);
int dcache_status(void);
void dcache_enable (void);
void dcache_disable(void);
void mmu_disable(void);

6
post/lib_powerpc/cpu.c
View File

@ -57,12 +57,12 @@ ulong cpu_post_makecr (long v)
int cpu_post_test (int flags)
{
int ic = icache_status ();
int ic = icache_status();
int ret = 0;
WATCHDOG_RESET();
if (ic)
icache_disable ();
icache_disable();
if (ret == 0)
ret = cpu_post_test_cmp ();
@ -110,7 +110,7 @@ int cpu_post_test (int flags)
WATCHDOG_RESET();
if (ic)
icache_enable ();
icache_enable();
WATCHDOG_RESET();