MIPS: qemu_mips.h: cleanup coding style and checkpatch.pl issues
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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@ -28,14 +28,10 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_MIPS32 1 /* MIPS32 CPU core */
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#define CONFIG_QEMU_MIPS 1
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#define CONFIG_MIPS32 /* MIPS32 CPU core */
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#define CONFIG_QEMU_MIPS
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#define CONFIG_MISC_INIT_R
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/*IP address is default used by Qemu*/
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#define CONFIG_IPADDR 10.0.2.15 /* Our IP address */
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#define CONFIG_SERVERIP 10.0.2.2 /* Server IP address */
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#define CONFIG_BOOTDELAY 10 /* autoboot after 10 seconds */
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#define CONFIG_BAUDRATE 115200
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@ -74,31 +70,31 @@
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#define CONFIG_CMD_DHCP
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#define CONFIG_DRIVER_NE2000
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#define CONFIG_DRIVER_NE2000_BASE (0xb4000300)
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#define CONFIG_DRIVER_NE2000_BASE 0xb4000300
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE 1
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#define CONFIG_SYS_NS16550_CLK 115200
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#define CONFIG_SYS_NS16550_COM1 (0xb40003f8)
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_SYS_NS16550_COM1 0xb40003f8
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_CMD_IDE
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#define CONFIG_DOS_PARTITION
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#define CONFIG_SYS_IDE_MAXBUS 2
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#define CONFIG_SYS_ATA_IDE0_OFFSET (0x1f0)
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#define CONFIG_SYS_ATA_IDE1_OFFSET (0x170)
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#define CONFIG_SYS_ATA_DATA_OFFSET (0)
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#define CONFIG_SYS_ATA_REG_OFFSET (0)
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#define CONFIG_SYS_ATA_BASE_ADDR (0xb4000000)
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#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0
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#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170
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#define CONFIG_SYS_ATA_DATA_OFFSET 0
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#define CONFIG_SYS_ATA_REG_OFFSET 0
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#define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000
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#define CONFIG_SYS_IDE_MAXDEVICE (4)
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#define CONFIG_SYS_IDE_MAXDEVICE 4
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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/* Monitor Command Prompt */
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#if defined(CONFIG_SYS_LITTLE_ENDIAN)
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@ -111,9 +107,12 @@
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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/* Console I/O Buffer Size */
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#define CONFIG_SYS_CBSIZE 256
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
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/* max number of command args */
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_MALLOC_LEN 128*1024
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@ -125,9 +124,11 @@
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
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/* Cached addr */
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
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/* default load address */
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#define CONFIG_SYS_LOAD_ADDR 0x81000000
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#define CONFIG_SYS_MEMTEST_START 0x80100000
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#define CONFIG_SYS_MEMTEST_END 0x80800000
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@ -135,7 +136,6 @@
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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/* The following #defines are needed to get flash environment right */
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#define CONFIG_SYS_TEXT_BASE 0xbfc00000 /* Rom version */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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@ -147,11 +147,11 @@
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#define CONFIG_SYS_FLASH_BASE 0xbfc00000
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 128
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#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
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#define CONFIG_FLASH_CFI_DRIVER 1
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
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#define CONFIG_ENV_IS_IN_FLASH 1
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#define CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
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/* Address and size of Primary Environment Sector */
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@ -161,8 +161,6 @@
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#define MEM_SIZE 128
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#undef CONFIG_MEMSIZE_IN_BYTES
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#define CONFIG_LZMA
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/*-----------------------------------------------------------------------
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