diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h index db76066c80..f46f1d866a 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h @@ -6,6 +6,7 @@ #ifndef __FSL_NS_ACCESS_H_ #define __FSL_NS_ACCESS_H_ +#include enum csu_cslx_ind { CSU_CSLX_PCIE2_IO = 0, diff --git a/board/freescale/common/ns_access.c b/board/freescale/common/ns_access.c index c3d7a5e907..81c921122e 100644 --- a/board/freescale/common/ns_access.c +++ b/board/freescale/common/ns_access.c @@ -8,6 +8,7 @@ #include #include #include +#include void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val) { @@ -40,3 +41,30 @@ void enable_layerscape_ns_access(void) { enable_devices_ns_access(ns_dev, ARRAY_SIZE(ns_dev)); } + +void set_pcie_ns_access(int pcie, u16 val) +{ + switch (pcie) { +#ifdef CONFIG_PCIE1 + case PCIE1: + set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE1], val); + set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE1_IO], val); + return; +#endif +#ifdef CONFIG_PCIE2 + case PCIE2: + set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE2], val); + set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE2_IO], val); + return; +#endif +#ifdef CONFIG_PCIE3 + case PCIE3: + set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE3], val); + set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE3_IO], val); + return; +#endif + default: + debug("The PCIE%d doesn't exist!\n", pcie); + return; + } +} diff --git a/include/fsl_csu.h b/include/fsl_csu.h index 57a99859ee..8582ac0774 100644 --- a/include/fsl_csu.h +++ b/include/fsl_csu.h @@ -31,5 +31,6 @@ struct csu_ns_dev { void enable_layerscape_ns_access(void); void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val); +void set_pcie_ns_access(int pcie, u16 val); #endif