arm, da85x: update for the ipam390 board
- switch to correct ecc layout used by the RBL enable CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC - update default environment - change A2CR to correct value for UART boot mode - adapt cs3cfg timings for nand - change LED bootmode signalization Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
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2fff63c2a5
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660a2e650d
@ -109,7 +109,7 @@ CLK2XSRC = 0x00000000
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;NANDFCR = 0x00000000
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;NANDFCR = 0x00000000
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[EMIF25ASYNC]
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[EMIF25ASYNC]
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A1CR = 0x00000000
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A1CR = 0x00000000
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A2CR = 0x3FFFFFFE
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A2CR = 0x04202110
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A3CR = 0x00000000
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A3CR = 0x00000000
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A4CR = 0x00000000
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A4CR = 0x00000000
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NANDFCR = 0x00000012
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NANDFCR = 0x00000012
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@ -264,7 +264,7 @@ void show_boot_progress(int status)
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static int green;
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static int green;
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if (red == 0)
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if (red == 0)
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red = init_led(CONFIG_IPAM390_GPIO_LED_RED, "red", LED_OFF);
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red = init_led(CONFIG_IPAM390_GPIO_LED_RED, "red", LED_ON);
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if (red != CONFIG_IPAM390_GPIO_LED_RED)
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if (red != CONFIG_IPAM390_GPIO_LED_RED)
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return;
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return;
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if (green == 0)
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if (green == 0)
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@ -277,10 +277,10 @@ void show_boot_progress(int status)
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case BOOTSTAGE_ID_RUN_OS:
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case BOOTSTAGE_ID_RUN_OS:
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/*
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/*
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* set normal state
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* set normal state
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* LED Red : off
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* LED Red : on
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* LED green: off
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* LED green: off
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*/
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*/
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gpio_set_value(red, LED_OFF);
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gpio_set_value(red, LED_ON);
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gpio_set_value(green, LED_OFF);
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gpio_set_value(green, LED_OFF);
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break;
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break;
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case BOOTSTAGE_ID_MAIN_LOOP:
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case BOOTSTAGE_ID_MAIN_LOOP:
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@ -326,23 +326,12 @@ int spl_start_uboot(void)
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if (!bootmode)
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if (!bootmode)
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if (ret == 0)
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if (ret == 0)
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bootmode = 1;
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bootmode = 1;
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if (bootmode) {
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/*
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/*
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* Booting U-Boot
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* LED red : on
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* LED Red : on
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* LED green: off
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* LED green: off
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*/
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*/
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init_led(CONFIG_IPAM390_GPIO_LED_RED, "red", LED_ON);
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init_led(CONFIG_IPAM390_GPIO_LED_RED, "red", LED_ON);
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init_led(CONFIG_IPAM390_GPIO_LED_GREEN, "green", LED_OFF);
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init_led(CONFIG_IPAM390_GPIO_LED_GREEN, "green", LED_OFF);
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} else {
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/*
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* Booting Linux
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* LED Red : off
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* LED green: off
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*/
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init_led(CONFIG_IPAM390_GPIO_LED_RED, "red", LED_OFF);
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init_led(CONFIG_IPAM390_GPIO_LED_GREEN, "green", LED_OFF);
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}
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return bootmode;
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return bootmode;
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}
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}
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#endif
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#endif
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@ -122,13 +122,13 @@
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(3 << DV_DDR_SDCR_IBANK_SHIFT) | \
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(3 << DV_DDR_SDCR_IBANK_SHIFT) | \
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(2 << DV_DDR_SDCR_PAGESIZE_SHIFT))
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(2 << DV_DDR_SDCR_PAGESIZE_SHIFT))
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#define CONFIG_SYS_DA850_CS3CFG (DAVINCI_ABCR_WSETUP(2) | \
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#define CONFIG_SYS_DA850_CS3CFG (DAVINCI_ABCR_WSETUP(1) | \
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DAVINCI_ABCR_WSTROBE(2) | \
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DAVINCI_ABCR_WSTROBE(2) | \
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DAVINCI_ABCR_WHOLD(1) | \
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DAVINCI_ABCR_WHOLD(0) | \
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DAVINCI_ABCR_RSETUP(1) | \
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DAVINCI_ABCR_RSETUP(1) | \
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DAVINCI_ABCR_RSTROBE(4) | \
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DAVINCI_ABCR_RSTROBE(2) | \
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DAVINCI_ABCR_RHOLD(0) | \
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DAVINCI_ABCR_RHOLD(1) | \
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DAVINCI_ABCR_TA(1) | \
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DAVINCI_ABCR_TA(0) | \
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DAVINCI_ABCR_ASIZE_8BIT)
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DAVINCI_ABCR_ASIZE_8BIT)
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@ -161,6 +161,7 @@
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#undef CONFIG_SYS_NAND_HW_ECC
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#undef CONFIG_SYS_NAND_HW_ECC
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
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#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST
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#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST
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#define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10)
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#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10)
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#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
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#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
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@ -173,11 +174,10 @@
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CONFIG_SYS_MALLOC_LEN - \
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CONFIG_SYS_MALLOC_LEN - \
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GENERATED_GBL_DATA_SIZE)
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_NAND_ECCPOS { \
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#define CONFIG_SYS_NAND_ECCPOS { \
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24, 25, 26, 27, 28, \
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6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \
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29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \
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22, 23, 24, 25, 26, 27, 28, 29, 30, 31, \
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39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \
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38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \
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49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \
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54, 55, 56, 57, 58, 59, 60, 61, 62, 63}
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59, 60, 61, 62, 63 }
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#define CONFIG_SYS_NAND_PAGE_COUNT 64
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#define CONFIG_SYS_NAND_PAGE_COUNT 64
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
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#define CONFIG_SYS_NAND_ECCSIZE 512
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#define CONFIG_SYS_NAND_ECCSIZE 512
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@ -230,15 +230,24 @@
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_REVISION_TAG
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#define CONFIG_REVISION_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_BOOTARGS \
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#define CONFIG_BOOTDELAY 2
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"mem=128M console=ttyS0,115200n8 root=/dev/mtdblock0p4 rw noinitrd ip=dhcp"
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_EXTRA_ENV_SETTINGS \
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"defbootargs=setenv bootargs mem=128M console=ttyS0,115200n8 " \
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"root=/dev/mtdblock5 rw noinitrd " \
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"rootfstype=jffs2 noinitrd\0" \
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"hwconfig=dsp:wake=yes\0" \
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"hwconfig=dsp:wake=yes\0" \
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"bootcmd=nboot kernel;run defbootargs addmtd;bootm 0xc0700000\0" \
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"bootfile=uImage\0" \
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"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
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"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
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"mtddevname=uboot-env\0" \
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"mtddevnum=0\0" \
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"mtdids=" MTDIDS_DEFAULT "\0" \
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"mtdids=" MTDIDS_DEFAULT "\0" \
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"mtdparts=" MTDPARTS_DEFAULT "\0" \
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"mtdparts=" MTDPARTS_DEFAULT "\0" \
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"u-boot=/tftpboot/ipam390/u-boot.ais\0" \
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"upd_uboot=tftp c0000000 ${u-boot};nand erase.part u-boot;" \
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"nand write c0000000 20000 ${filesize}\0" \
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"setbootparms=nand read c0100000 200000 400000;" \
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"setbootparms=nand read c0100000 200000 400000;" \
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"run defbootargs addmtd;" \
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"spl export atags c0100000;" \
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"spl export atags c0100000;" \
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"nand erase.part bootparms;" \
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"nand erase.part bootparms;" \
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"nand write c0000100 180000 20000\0" \
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"nand write c0000100 180000 20000\0" \
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