dts: mvebu: a80x0: Enable SD/eMMC interfaces
Enable SDHCI interface on AP and CP0 in A80x0 DTS files Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Evan Wang <xswang@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
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@ -81,6 +81,13 @@
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1 3 0 0 0 0 0 0 0 3 >;
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1 3 0 0 0 0 0 0 0 3 >;
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};
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};
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&ap_sdhci0 {
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pinctrl-names = "default";
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pinctrl-0 = <&ap_emmc_pins>;
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bus-width = <8>;
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status = "okay";
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};
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&cpm_pinctl {
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&cpm_pinctl {
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/* MPP Bus:
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/* MPP Bus:
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* [0-31] = 0xff: Keep default CP0_shared_pins
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* [0-31] = 0xff: Keep default CP0_shared_pins
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@ -182,6 +189,13 @@
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status = "okay";
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status = "okay";
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};
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};
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&cpm_sdhci0 {
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pinctrl-names = "default";
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pinctrl-0 = <&cpm_sdhci_pins>;
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bus-width = <4>;
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status = "okay";
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};
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&cps_pinctl {
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&cps_pinctl {
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/* MPP Bus:
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/* MPP Bus:
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* [0-11] RGMII0
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* [0-11] RGMII0
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@ -154,6 +154,14 @@
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status = "okay";
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status = "okay";
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};
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};
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/* uSD slot */
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&cpm_sdhci0 {
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pinctrl-names = "default";
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pinctrl-0 = <&cpm_sdhci_pins>;
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bus-width = <4>;
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status = "okay";
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};
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&cpm_comphy {
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&cpm_comphy {
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/*
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/*
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* CP0 Serdes Configuration:
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* CP0 Serdes Configuration:
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