ppc: m68k: Move i2c1_clk, i2c2_clk to arch_global_data
Move these fields into arch_global_data and tidy up. This is needed for both ppc and m68k since they share the i2c driver. Signed-off-by: Simon Glass <sjg@chromium.org>
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@ -135,7 +135,7 @@ int get_clocks(void)
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}
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#ifdef CONFIG_FSL_I2C
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gd->i2c1_clk = gd->bus_clk;
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gd->arch.i2c1_clk = gd->bus_clk;
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#endif
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return (0);
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@ -48,7 +48,7 @@ int get_clocks(void)
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gd->cpu_clk = (gd->bus_clk * 2);
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#ifdef CONFIG_FSL_I2C
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gd->i2c1_clk = gd->bus_clk;
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gd->arch.i2c1_clk = gd->bus_clk;
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#endif
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return (0);
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@ -91,9 +91,9 @@ int get_clocks (void)
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#endif
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#ifdef CONFIG_FSL_I2C
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gd->i2c1_clk = gd->bus_clk;
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gd->arch.i2c1_clk = gd->bus_clk;
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#ifdef CONFIG_SYS_I2C2_OFFSET
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gd->i2c2_clk = gd->bus_clk;
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gd->arch.i2c2_clk = gd->bus_clk;
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#endif
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#endif
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@ -271,7 +271,7 @@ int get_clocks(void)
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gd->cpu_clk = (gd->bus_clk * 3);
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#ifdef CONFIG_FSL_I2C
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gd->i2c1_clk = gd->bus_clk;
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gd->arch.i2c1_clk = gd->bus_clk;
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#endif
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return (0);
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@ -274,7 +274,7 @@ void setup_5445x_clocks(void)
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}
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#ifdef CONFIG_FSL_I2C
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gd->i2c1_clk = gd->bus_clk;
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gd->arch.i2c1_clk = gd->bus_clk;
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#endif
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}
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#endif
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@ -290,7 +290,7 @@ int get_clocks(void)
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#endif
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#ifdef CONFIG_FSL_I2C
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gd->i2c1_clk = gd->bus_clk;
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gd->arch.i2c1_clk = gd->bus_clk;
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#endif
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return (0);
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@ -41,7 +41,7 @@ int get_clocks(void)
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gd->cpu_clk = (gd->bus_clk * 2);
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#ifdef CONFIG_FSL_I2C
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gd->i2c1_clk = gd->bus_clk;
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gd->arch.i2c1_clk = gd->bus_clk;
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#endif
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return (0);
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@ -26,6 +26,10 @@
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/* Architecture-specific global data */
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struct arch_global_data {
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#ifdef CONFIG_FSL_I2C
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unsigned long i2c1_clk;
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unsigned long i2c2_clk;
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#endif
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};
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/*
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@ -49,10 +53,6 @@ typedef struct global_data {
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unsigned long inp_clk;
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unsigned long vco_clk;
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unsigned long flb_clk;
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#endif
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#ifdef CONFIG_FSL_I2C
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unsigned long i2c1_clk;
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unsigned long i2c2_clk;
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#endif
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phys_size_t ram_size; /* RAM size */
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unsigned long reloc_off; /* Relocation Offset */
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@ -481,9 +481,9 @@ int get_clocks(void)
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gd->sdhc_clk = sdhc_clk;
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#endif
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gd->arch.core_clk = core_clk;
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gd->i2c1_clk = i2c1_clk;
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gd->arch.i2c1_clk = i2c1_clk;
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#if !defined(CONFIG_MPC832x)
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gd->i2c2_clk = i2c2_clk;
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gd->arch.i2c2_clk = i2c2_clk;
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#endif
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#if !defined(CONFIG_MPC8309)
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gd->arch.enc_clk = enc_clk;
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@ -558,9 +558,11 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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printf(" SEC: %-4s MHz\n",
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strmhz(buf, gd->arch.enc_clk));
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#endif
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printf(" I2C1: %-4s MHz\n", strmhz(buf, gd->i2c1_clk));
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printf(" I2C1: %-4s MHz\n",
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strmhz(buf, gd->arch.i2c1_clk));
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#if !defined(CONFIG_MPC832x)
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printf(" I2C2: %-4s MHz\n", strmhz(buf, gd->i2c2_clk));
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printf(" I2C2: %-4s MHz\n",
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strmhz(buf, gd->arch.i2c2_clk));
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#endif
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#if defined(CONFIG_MPC8315)
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printf(" TDM: %-4s MHz\n",
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@ -406,7 +406,7 @@ int get_clocks (void)
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*/
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#if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
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defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555)
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gd->i2c1_clk = sys_info.freqSystemBus;
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gd->arch.i2c1_clk = sys_info.freqSystemBus;
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#elif defined(CONFIG_MPC8544)
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/*
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* On the 8544, the I2C clock is the same as the SEC clock. This can be
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@ -416,14 +416,14 @@ int get_clocks (void)
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* PORDEVSR2_SEC_CFG bit is 0 on all 85xx boards that are not an 8544.
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*/
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if (gur->pordevsr2 & MPC85xx_PORDEVSR2_SEC_CFG)
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gd->i2c1_clk = sys_info.freqSystemBus / 3;
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gd->arch.i2c1_clk = sys_info.freqSystemBus / 3;
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else
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gd->i2c1_clk = sys_info.freqSystemBus / 2;
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gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
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#else
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/* Most 85xx SOCs use CCB/2, so this is the default behavior. */
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gd->i2c1_clk = sys_info.freqSystemBus / 2;
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gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
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#endif
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gd->i2c2_clk = gd->i2c1_clk;
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gd->arch.i2c2_clk = gd->arch.i2c1_clk;
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#if defined(CONFIG_FSL_ESDHC)
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#if defined(CONFIG_MPC8569) || defined(CONFIG_P1010) ||\
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@ -130,11 +130,11 @@ int get_clocks(void)
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* AN2919.
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*/
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#ifdef CONFIG_MPC8610
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gd->i2c1_clk = sys_info.freqSystemBus;
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gd->arch.i2c1_clk = sys_info.freqSystemBus;
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#else
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gd->i2c1_clk = sys_info.freqSystemBus / 2;
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gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
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#endif
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gd->i2c2_clk = gd->i2c1_clk;
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gd->arch.i2c2_clk = gd->arch.i2c1_clk;
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if (gd->cpu_clk != 0)
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return 0;
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@ -80,6 +80,11 @@ struct arch_global_data {
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u32 lbc_clk;
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void *cpu;
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#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
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#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \
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defined(CONFIG_MPC86xx)
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u32 i2c1_clk;
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u32 i2c2_clk;
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#endif
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};
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/*
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@ -102,10 +107,6 @@ typedef struct global_data {
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#if defined(CONFIG_FSL_ESDHC)
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u32 sdhc_clk;
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#endif
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#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
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u32 i2c1_clk;
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u32 i2c2_clk;
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#endif
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#if defined(CONFIG_QE)
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u32 qe_clk;
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uint mp_alloc_base;
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@ -217,9 +217,9 @@ static unsigned int set_i2c_bus_speed(const struct fsl_i2c *dev,
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static unsigned int get_i2c_clock(int bus)
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{
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if (bus)
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return gd->i2c2_clk; /* I2C2 clock */
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return gd->arch.i2c2_clk; /* I2C2 clock */
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else
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return gd->i2c1_clk; /* I2C1 clock */
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return gd->arch.i2c1_clk; /* I2C1 clock */
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}
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void
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@ -468,7 +468,8 @@ int i2c_set_bus_num(unsigned int bus)
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int i2c_set_bus_speed(unsigned int speed)
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{
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unsigned int i2c_clk = (i2c_bus_num == 1) ? gd->i2c2_clk : gd->i2c1_clk;
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unsigned int i2c_clk = (i2c_bus_num == 1)
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? gd->arch.i2c2_clk : gd->arch.i2c1_clk;
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writeb(0, &i2c_dev[i2c_bus_num]->cr); /* stop controller */
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i2c_bus_speed[i2c_bus_num] =
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