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mpc83xx: Normalize BR/OR option lines

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All BR/OR option lines should have the same layout to make them easier
to migrate to Kconfig. This includes using the same option macros
everywhere.

The normalize the lines,
* replace function macros with their results, and
* replace hardcoded hex values with standard macros

Signed-off-by: Mario Six <mario.six@gdsys.cc>
This commit is contained in:
Mario Six 2019-01-21 09:17:59 +01:00
parent 9c5df7a2a9
commit 5d2f4c9641
27 changed files with 69 additions and 69 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
include/configs/MPC8308RDB.h
View File

@ -180,7 +180,7 @@
| BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \
| BR_V) /* valid */
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_8MB \
| OR_UPM_XAM \
| OR_GPCM_CSNT \
| OR_GPCM_ACS_DIV2 \
@ -206,7 +206,7 @@
| BR_PS_8 /* 8 bit Port */ \
| BR_MS_FCM /* MSEL = FCM */ \
| BR_V) /* valid */
#define CONFIG_SYS_OR1_PRELIM (P2SZ_TO_AM(CONFIG_SYS_NAND_WINDOW_SIZE) \
#define CONFIG_SYS_OR1_PRELIM (OR_AM_32KB \
| OR_FCM_CSCT \
| OR_FCM_CST \
| OR_FCM_CHT \
@ -225,7 +225,7 @@
| BR_MS_GPCM /* MSEL = GPCM */ \
| BR_V) /* valid */
/* 0xF0000801 */
#define CONFIG_SYS_OR2_PRELIM (P2SZ_TO_AM(CONFIG_SYS_VSC7385_SIZE) \
#define CONFIG_SYS_OR2_PRELIM (OR_AM_128KB \
| OR_GPCM_CSNT \
| OR_GPCM_XACS \
| OR_GPCM_SCY_15 \

4
include/configs/MPC8313ERDB_NAND.h
View File

@ -258,7 +258,7 @@
| BR_MS_GPCM /* MSEL = GPCM */ \
| BR_V) /* valid */
/* 0xFA000801 */
#define CONFIG_SYS_OR3_PRELIM (P2SZ_TO_AM(CONFIG_SYS_BCSR_SIZE) \
#define CONFIG_SYS_OR3_PRELIM (OR_AM_32KB \
| OR_GPCM_CSNT \
| OR_GPCM_ACS_DIV2 \
| OR_GPCM_XACS \
@ -279,7 +279,7 @@
| BR_PS_8 /* 8 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \
| BR_V) /* valid */
#define CONFIG_SYS_OR2_PRELIM (P2SZ_TO_AM(CONFIG_SYS_VSC7385_SIZE) \
#define CONFIG_SYS_OR2_PRELIM (OR_AM_128KB \
| OR_GPCM_CSNT \
| OR_GPCM_XACS \
| OR_GPCM_SCY_15 \

4
include/configs/MPC8313ERDB_NOR.h
View File

@ -227,7 +227,7 @@
| BR_MS_GPCM /* MSEL = GPCM */ \
| BR_V) /* valid */
/* 0xFA000801 */
#define CONFIG_SYS_OR3_PRELIM (P2SZ_TO_AM(CONFIG_SYS_BCSR_SIZE) \
#define CONFIG_SYS_OR3_PRELIM (OR_AM_32KB \
| OR_GPCM_CSNT \
| OR_GPCM_ACS_DIV2 \
| OR_GPCM_XACS \
@ -248,7 +248,7 @@
| BR_PS_8 /* 8 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \
| BR_V) /* valid */
#define CONFIG_SYS_OR2_PRELIM (P2SZ_TO_AM(CONFIG_SYS_VSC7385_SIZE) \
#define CONFIG_SYS_OR2_PRELIM (OR_AM_128KB \
| OR_GPCM_CSNT \
| OR_GPCM_XACS \
| OR_GPCM_SCY_15 \

2
include/configs/MPC8323ERDB.h
View File

@ -146,7 +146,7 @@
| BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \
| BR_V) /* valid */
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_16MB \
| OR_GPCM_XAM \
| OR_GPCM_CSNT \
| OR_GPCM_ACS_DIV2 \

6
include/configs/MPC832XEMDS.h
View File

@ -137,7 +137,7 @@
| BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \
| BR_V) /* valid */
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_16MB \
| OR_GPCM_XAM \
| OR_GPCM_CSNT \
| OR_GPCM_ACS_DIV2 \
@ -188,7 +188,7 @@
| BR_MS_GPCM \
| BR_V)
/* 0xF8008801 */
#define CONFIG_SYS_OR2_PRELIM (P2SZ_TO_AM(CONFIG_SYS_PIB_WINDOW_SIZE) \
#define CONFIG_SYS_OR2_PRELIM (OR_AM_32KB \
| OR_GPCM_XAM \
| OR_GPCM_CSNT \
| OR_GPCM_XACS \
@ -207,7 +207,7 @@
| BR_MS_GPCM \
| BR_V)
/* 0xF8010801 */
#define CONFIG_SYS_OR3_PRELIM (P2SZ_TO_AM(CONFIG_SYS_PIB_WINDOW_SIZE) \
#define CONFIG_SYS_OR3_PRELIM (OR_AM_32KB \
| OR_GPCM_XAM \
| OR_GPCM_CSNT \
| OR_GPCM_XACS \

2
include/configs/MPC8349EMDS.h
View File

@ -127,7 +127,7 @@
| BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \
| BR_V) /* valid */
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_32MB \
| OR_UPM_XAM \
| OR_GPCM_CSNT \
| OR_GPCM_ACS_DIV2 \

2
include/configs/MPC8349EMDS_SDRAM.h
View File

@ -127,7 +127,7 @@
| BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \
| BR_V) /* valid */
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_32MB \
| OR_UPM_XAM \
| OR_GPCM_CSNT \
| OR_GPCM_ACS_DIV2 \

2
include/configs/MPC8349ITX.h
View File

@ -217,7 +217,7 @@ boards, we say we have two, but don't display a message if we find only one. */
| BR_PS_16 \
| BR_MS_GPCM \
| BR_V)
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_16MB \
| OR_UPM_XAM \
| OR_GPCM_CSNT \
| OR_GPCM_ACS_DIV2 \

2
include/configs/MPC837XEMDS.h
View File

@ -166,7 +166,7 @@
| BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \
| BR_V) /* valid */
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_32MB \
| OR_UPM_XAM \
| OR_GPCM_CSNT \
| OR_GPCM_ACS_DIV2 \

2
include/configs/MPC837XERDB.h
View File

@ -192,7 +192,7 @@
| BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \
| BR_V) /* valid */
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_8MB \
| OR_GPCM_XACS \
| OR_GPCM_SCY_9 \
| OR_GPCM_EHTR_SET \

2
include/configs/caddy2.h
View File

@ -74,7 +74,7 @@
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V) /* valid */
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_4MB \
| OR_GPCM_XAM \
| OR_GPCM_CSNT \
| OR_GPCM_ACS_DIV2 \

4
include/configs/hrcon.h
View File

@ -174,7 +174,7 @@
| BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \
| BR_V) /* valid */
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_8MB \
| OR_UPM_XAM \
| OR_GPCM_CSNT \
| OR_GPCM_ACS_DIV2 \
@ -200,7 +200,7 @@
| BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \
| BR_V) /* valid */
#define CONFIG_SYS_OR1_PRELIM (MEG_TO_AM(CONFIG_SYS_FPGA0_SIZE) \
#define CONFIG_SYS_OR1_PRELIM (OR_AM_1MB \
| OR_UPM_XAM \
| OR_GPCM_CSNT \
| OR_GPCM_ACS_DIV2 \

10
include/configs/ids8313.h
View File

@ -147,7 +147,7 @@
BR_MS_GPCM |\
BR_V)
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) |\
#define CONFIG_SYS_OR0_PRELIM (OR_AM_8MB |\
OR_GPCM_SCY_10 |\
OR_GPCM_EHTR |\
OR_GPCM_TRLX |\
@ -171,12 +171,12 @@
#define NAND_CACHE_PAGES 64
#define CONFIG_SYS_BR1_PRELIM ((CONFIG_SYS_NAND_BASE) |\
(2<<BR_DECC_SHIFT) |\
BR_DECC_CHK_GEN |\
BR_PS_8 |\
BR_MS_FCM |\
BR_V)
#define CONFIG_SYS_OR1_PRELIM (0xFFFF8000 |\
#define CONFIG_SYS_OR1_PRELIM (OR_AM_32KB |\
OR_FCM_PGS |\
OR_FCM_CSCT |\
OR_FCM_CST |\
@ -199,7 +199,7 @@
BR_MS_GPCM |\
BR_V)
#define CONFIG_SYS_OR2_PRELIM 0xFFFE0C74
#define CONFIG_SYS_OR2_PRELIM (OR_AM_128KB | OR_GPCM_CSNT | OR_GPCM_ACS_DIV4 | OR_GPCM_SCY_7 | OR_GPCM_TRLX_SET)
/*
* CPLD setup
@ -214,7 +214,7 @@
BR_MS_GPCM |\
BR_V)
#define CONFIG_SYS_OR3_PRELIM 0xFFFF8814
#define CONFIG_SYS_OR3_PRELIM (OR_AM_32KB | OR_GPCM_CSNT | OR_GPCM_SCY_1 | OR_GPCM_TRLX_SET)
/*
* HW-Watchdog

12
include/configs/kmcoge5ne.h
View File

@ -113,7 +113,7 @@
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_256MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_5 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -130,7 +130,7 @@
BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR1_PRELIM (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
#define CONFIG_SYS_OR1_PRELIM (OR_AM_64MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_2 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -349,11 +349,11 @@
#define CONFIG_SYS_BR3_PRELIM (\
CONFIG_SYS_PAXE_BASE | \
(1 << BR_PS_SHIFT) | \
BR_PS_8 | \
BR_V)
#define CONFIG_SYS_OR3_PRELIM (\
MEG_TO_AM(CONFIG_SYS_PAXE_SIZE) | \
OR_AM_256MB | \
OR_GPCM_CSNT | \
OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_2 | \
@ -368,11 +368,11 @@
#define CONFIG_SYS_BR4_PRELIM (\
CONFIG_SYS_BFTIC3_BASE |\
(1 << BR_PS_SHIFT) | \
BR_PS_8 | \
BR_V)
#define CONFIG_SYS_OR4_PRELIM (\
MEG_TO_AM(CONFIG_SYS_BFTIC3_SIZE) |\
OR_AM_256MB|\
OR_GPCM_CSNT | \
OR_GPCM_ACS_DIV2 |\
OR_GPCM_SCY_2 |\

8
include/configs/kmeter1.h
View File

@ -98,7 +98,7 @@
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_256MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_5 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -115,7 +115,7 @@
BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR1_PRELIM (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
#define CONFIG_SYS_OR1_PRELIM (OR_AM_64MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_2 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -329,11 +329,11 @@
#define CONFIG_SYS_BR3_PRELIM (\
CONFIG_SYS_PAXE_BASE | \
(1 << BR_PS_SHIFT) | \
BR_PS_8 | \
BR_V)
#define CONFIG_SYS_OR3_PRELIM (\
MEG_TO_AM(CONFIG_SYS_PAXE_SIZE) | \
OR_AM_256MB | \
OR_GPCM_CSNT | \
OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_2 | \

8
include/configs/kmopti2.h
View File

@ -118,7 +118,7 @@
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_256MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_5 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -135,7 +135,7 @@
BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR1_PRELIM (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
#define CONFIG_SYS_OR1_PRELIM (OR_AM_128MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_2 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -366,7 +366,7 @@
BR_MS_GPCM | \
BR_V)
#define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_APP1_SIZE) | \
#define CONFIG_SYS_OR2_PRELIM (OR_AM_256MB | \
OR_GPCM_CSNT | \
OR_GPCM_ACS_DIV4 | \
OR_GPCM_SCY_2 | \
@ -381,7 +381,7 @@
BR_PS_16 | \
BR_MS_GPCM | \
BR_V)
#define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
#define CONFIG_SYS_OR3_PRELIM (OR_AM_256MB | \
OR_GPCM_SCY_4 | \
OR_GPCM_TRLX_CLEAR | \
OR_GPCM_EHTR_CLEAR)

6
include/configs/kmsupx5.h
View File

@ -118,7 +118,7 @@
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_256MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_5 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -135,7 +135,7 @@
BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR1_PRELIM (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
#define CONFIG_SYS_OR1_PRELIM (OR_AM_128MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_2 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -364,7 +364,7 @@
BR_MS_GPCM | \
BR_V)
#define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_APP1_SIZE) | \
#define CONFIG_SYS_OR2_PRELIM (OR_AM_256MB | \
OR_GPCM_CSNT | \
OR_GPCM_ACS_DIV4 | \
OR_GPCM_SCY_2 | \

6
include/configs/kmtegr1.h
View File

@ -125,7 +125,7 @@
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_256MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_5 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -142,7 +142,7 @@
BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR1_PRELIM (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
#define CONFIG_SYS_OR1_PRELIM (OR_AM_128MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_2 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -416,7 +416,7 @@
BR_MS_GPCM | \
BR_V)
#define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
#define CONFIG_SYS_OR3_PRELIM (OR_AM_256MB | \
OR_GPCM_SCY_5 | \
OR_GPCM_TRLX_CLEAR | \
OR_GPCM_EHTR_CLEAR)

8
include/configs/kmtepr2.h
View File

@ -118,7 +118,7 @@
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_256MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_5 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -135,7 +135,7 @@
BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR1_PRELIM (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
#define CONFIG_SYS_OR1_PRELIM (OR_AM_128MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_2 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -366,7 +366,7 @@
BR_MS_GPCM | \
BR_V)
#define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_APP1_SIZE) | \
#define CONFIG_SYS_OR2_PRELIM (OR_AM_256MB | \
OR_GPCM_CSNT | \
OR_GPCM_ACS_DIV4 | \
OR_GPCM_SCY_2 | \
@ -381,7 +381,7 @@
BR_PS_16 | \
BR_MS_GPCM | \
BR_V)
#define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
#define CONFIG_SYS_OR3_PRELIM (OR_AM_256MB | \
OR_GPCM_SCY_4 | \
OR_GPCM_TRLX_CLEAR | \
OR_GPCM_EHTR_CLEAR)

8
include/configs/kmvect1.h
View File

@ -117,7 +117,7 @@
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_256MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_5 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -134,7 +134,7 @@
BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR1_PRELIM (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
#define CONFIG_SYS_OR1_PRELIM (OR_AM_128MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_2 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -407,13 +407,13 @@
BR_PS_16 | \
BR_MS_UPMA | \
BR_V)
#define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_APP1_SIZE))
#define CONFIG_SYS_OR2_PRELIM (OR_AM_256MB)
#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_APP2_BASE | \
BR_PS_16 | \
BR_V)
#define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
#define CONFIG_SYS_OR3_PRELIM (OR_AM_256MB | \
OR_GPCM_CSNT | \
OR_GPCM_ACS_DIV4 | \
OR_GPCM_SCY_3 | \

2
include/configs/mpc8308_p1m.h
View File

@ -184,7 +184,7 @@
| BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \
| BR_V) /* valid */
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_64MB \
| OR_UPM_XAM \
| OR_GPCM_CSNT \
| OR_GPCM_ACS_DIV2 \

4
include/configs/sbc8349.h
View File

@ -103,7 +103,7 @@
| BR_MS_GPCM /* MSEL = GPCM */ \
| BR_V) /* valid */
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_8MB \
| OR_GPCM_XAM \
| OR_GPCM_CSNT \
| OR_GPCM_ACS_DIV2 \
@ -190,7 +190,7 @@
* 1111 1100 0000 0000 0110 1001 0000 0001 = FC006901
*/
#define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_LBC_SDRAM_SIZE) \
#define CONFIG_SYS_OR2_PRELIM (OR_AM_64MB \
| OR_SDRAM_XAM \
| ((9 - OR_SDRAM_MIN_COLS) << OR_SDRAM_COLS_SHIFT) \
| ((13 - OR_SDRAM_MIN_ROWS) << OR_SDRAM_ROWS_SHIFT) \

4
include/configs/strider.h
View File

@ -172,7 +172,7 @@
| BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \
| BR_V) /* valid */
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_8MB \
| OR_UPM_XAM \
| OR_GPCM_CSNT \
| OR_GPCM_ACS_DIV2 \
@ -199,7 +199,7 @@
| BR_MS_GPCM /* MSEL = GPCM */ \
| BR_V) /* valid */
#define CONFIG_SYS_OR1_PRELIM (MEG_TO_AM(CONFIG_SYS_FPGA0_SIZE) \
#define CONFIG_SYS_OR1_PRELIM (OR_AM_1MB \
| OR_UPM_XAM \
| OR_GPCM_CSNT \
| OR_GPCM_SCY_5 \

8
include/configs/suvd3.h
View File

@ -115,7 +115,7 @@
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_256MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_5 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -132,7 +132,7 @@
BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR1_PRELIM (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
#define CONFIG_SYS_OR1_PRELIM (OR_AM_128MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_2 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -360,13 +360,13 @@
BR_PS_16 | \
BR_MS_UPMA | \
BR_V)
#define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_APP1_SIZE))
#define CONFIG_SYS_OR2_PRELIM (OR_AM_256MB)
#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_APP2_BASE | \
BR_PS_16 | \
BR_V)
#define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
#define CONFIG_SYS_OR3_PRELIM (OR_AM_256MB | \
OR_GPCM_CSNT | \
OR_GPCM_ACS_DIV4 | \
OR_GPCM_SCY_3 | \

6
include/configs/tuge1.h
View File

@ -118,7 +118,7 @@
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_256MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_5 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -135,7 +135,7 @@
BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR1_PRELIM (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
#define CONFIG_SYS_OR1_PRELIM (OR_AM_128MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_2 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -364,7 +364,7 @@
BR_MS_GPCM | \
BR_V)
#define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_APP1_SIZE) | \
#define CONFIG_SYS_OR2_PRELIM (OR_AM_256MB | \
OR_GPCM_CSNT | \
OR_GPCM_ACS_DIV4 | \
OR_GPCM_SCY_2 | \

8
include/configs/tuxx1.h
View File

@ -118,7 +118,7 @@
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_256MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_5 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -135,7 +135,7 @@
BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V)
#define CONFIG_SYS_OR1_PRELIM (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
#define CONFIG_SYS_OR1_PRELIM (OR_AM_128MB | \
OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_2 | \
OR_GPCM_TRLX_SET | OR_GPCM_EAD)
@ -366,7 +366,7 @@
BR_MS_GPCM | \
BR_V)
#define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_APP1_SIZE) | \
#define CONFIG_SYS_OR2_PRELIM (OR_AM_256MB | \
OR_GPCM_CSNT | \
OR_GPCM_ACS_DIV4 | \
OR_GPCM_SCY_2 | \
@ -382,7 +382,7 @@
BR_MS_GPCM | \
BR_V)
#define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
#define CONFIG_SYS_OR3_PRELIM (OR_AM_256MB | \
OR_GPCM_CSNT | \
OR_GPCM_ACS_DIV2 | \
OR_GPCM_SCY_2 | \

2
include/configs/vme8349.h
View File

@ -74,7 +74,7 @@
BR_MS_GPCM | /* MSEL = GPCM */ \
BR_V) /* valid */
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
#define CONFIG_SYS_OR0_PRELIM (OR_AM_128MB \
| OR_GPCM_XAM \
| OR_GPCM_CSNT \
| OR_GPCM_ACS_DIV2 \