pci: layerscape: Remove the shadow SVR definitions
This patch moves the SVR definitions to a new svr.h for Layerscape armv7 and armv8 platforms respectively, so that the PCIe driver can reuse them. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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@ -16,6 +16,7 @@
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#include <asm/arch/immap_lsch3.h>
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#endif
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#endif
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#include <asm/arch/svr.h>
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#ifdef CONFIG_SYS_FSL_CCSR_GUR_LE
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#define gur_in32(a) in_le32(a)
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@ -77,38 +78,6 @@ enum boot_src get_boot_src(void);
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#endif
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#endif
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#define SVR_WO_E 0xFFFFFE
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#define SVR_LS1012A 0x870400
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#define SVR_LS1043A 0x879200
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#define SVR_LS1023A 0x879208
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/* LS1043A/LS1023A 23x23 package silicon has different value of VAR_PER */
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#define SVR_LS1043A_P23 0x879202
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#define SVR_LS1023A_P23 0x87920A
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#define SVR_LS1017A 0x870B24
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#define SVR_LS1018A 0x870B20
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#define SVR_LS1027A 0x870B04
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#define SVR_LS1028A 0x870B00
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#define SVR_LS1046A 0x870700
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#define SVR_LS1026A 0x870708
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#define SVR_LS1048A 0x870320
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#define SVR_LS1084A 0x870302
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#define SVR_LS1088A 0x870300
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#define SVR_LS1044A 0x870322
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#define SVR_LS2045A 0x870120
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#define SVR_LS2080A 0x870110
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#define SVR_LS2085A 0x870100
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#define SVR_LS2040A 0x870130
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#define SVR_LS2088A 0x870900
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#define SVR_LS2084A 0x870910
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#define SVR_LS2048A 0x870920
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#define SVR_LS2044A 0x870930
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#define SVR_LS2081A 0x870918
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#define SVR_LS2041A 0x870914
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#define SVR_LX2160A 0x873600
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#define SVR_LX2120A 0x873620
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#define SVR_LX2080A 0x873602
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#define SVR_LX2162A 0x873608
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#define SVR_LX2122A 0x873628
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#define SVR_LX2082A 0x87360A
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#define SVR_MAJ(svr) (((svr) >> 4) & 0xf)
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#define SVR_MIN(svr) (((svr) >> 0) & 0xf)
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arch/arm/include/asm/arch-fsl-layerscape/svr.h
Normal file
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arch/arm/include/asm/arch-fsl-layerscape/svr.h
Normal file
@ -0,0 +1,42 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2021 NXP
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*/
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#ifndef _ASM_ARMV8_FSL_LAYERSCAPE_SVR_H_
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#define _ASM_ARMV8_FSL_LAYERSCAPE_SVR_H_
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#define SVR_LS1012A 0x870400
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#define SVR_LS1043A 0x879200
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#define SVR_LS1023A 0x879208
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/* LS1043A/LS1023A 23x23 package silicon has different value of VAR_PER */
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#define SVR_LS1043A_P23 0x879202
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#define SVR_LS1023A_P23 0x87920A
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#define SVR_LS1017A 0x870B24
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#define SVR_LS1018A 0x870B20
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#define SVR_LS1027A 0x870B04
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#define SVR_LS1028A 0x870B00
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#define SVR_LS1046A 0x870700
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#define SVR_LS1026A 0x870708
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#define SVR_LS1048A 0x870320
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#define SVR_LS1084A 0x870302
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#define SVR_LS1088A 0x870300
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#define SVR_LS1044A 0x870322
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#define SVR_LS2045A 0x870120
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#define SVR_LS2080A 0x870110
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#define SVR_LS2085A 0x870100
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#define SVR_LS2040A 0x870130
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#define SVR_LS2088A 0x870900
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#define SVR_LS2084A 0x870910
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#define SVR_LS2048A 0x870920
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#define SVR_LS2044A 0x870930
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#define SVR_LS2081A 0x870918
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#define SVR_LS2041A 0x870914
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#define SVR_LX2160A 0x873600
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#define SVR_LX2120A 0x873620
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#define SVR_LX2080A 0x873602
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#define SVR_LX2162A 0x873608
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#define SVR_LX2122A 0x873628
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#define SVR_LX2082A 0x87360A
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#endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SVR_H_ */
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arch/arm/include/asm/arch-ls102xa/svr.h
Normal file
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arch/arm/include/asm/arch-ls102xa/svr.h
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@ -0,0 +1,13 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2021 NXP
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*/
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#ifndef _ASM_LS102X_SVR_H_
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#define _ASM_LS102X_SVR_H_
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#define SVR_LS102XA 0
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#define SVR_VAR_PER_SHIFT 8
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#define SVR_LS102XA_MASK 0x700
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#endif /* _ASM_LS102X_SVR_H_ */
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@ -10,6 +10,8 @@
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#include <pci.h>
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#include <linux/sizes.h>
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#include <asm/arch-fsl-layerscape/svr.h>
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#include <asm/arch-ls102xa/svr.h>
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#ifndef CONFIG_SYS_PCI_MEMORY_BUS
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#define CONFIG_SYS_PCI_MEMORY_BUS CONFIG_SYS_SDRAM_BASE
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@ -121,16 +123,6 @@
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/* CS2 */
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#define PCIE_CS2_OFFSET 0x1000 /* For PCIe without SR-IOV */
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#define SVR_LS102XA 0
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#define SVR_VAR_PER_SHIFT 8
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#define SVR_LS102XA_MASK 0x700
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#define SVR_LS2088A 0x870900
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#define SVR_LS2084A 0x870910
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#define SVR_LS2048A 0x870920
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#define SVR_LS2044A 0x870930
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#define SVR_LS2081A 0x870918
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#define SVR_LS2041A 0x870914
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/* LS1021a PCIE space */
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#define LS1021_PCIE_SPACE_OFFSET 0x4000000000ULL
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#define LS1021_PCIE_SPACE_SIZE 0x0800000000ULL
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