arm: Remove edminiv2 board

This board is not converted to use CONFIG_DM, well passed the migration
deadline.  Remove it.

Cc: Simon Guinot <simon.guinot@sequanux.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Tom Rini 2022-08-02 07:33:31 -04:00
parent 30da76be5c
commit 5663b137e6
7 changed files with 0 additions and 304 deletions

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@ -6,21 +6,8 @@ config 88F5182
config FEROCEON
bool
choice
prompt "Marvell Orion board select"
optional
config TARGET_EDMINIV2
bool "LaCie Ethernet Disk mini V2"
select 88F5182
select FEROCEON
select SUPPORT_SPL
endchoice
config SYS_SOC
default "orion5x"
source "board/LaCie/edminiv2/Kconfig"
endif

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@ -1,12 +0,0 @@
if TARGET_EDMINIV2
config SYS_BOARD
default "edminiv2"
config SYS_VENDOR
default "LaCie"
config SYS_CONFIG_NAME
default "edminiv2"
endif

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@ -1,6 +0,0 @@
EDMINIV2 BOARD
M: Simon Guinot <simon.guinot@sequanux.org>
S: Maintained
F: board/LaCie/edminiv2/
F: include/configs/edminiv2.h
F: configs/edminiv2_defconfig

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@ -1,10 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
#
# Based on original Kirkwood support which is
# (C) Copyright 2009
# Marvell Semiconductor <www.marvell.com>
# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
obj-y := edminiv2.o ../common/common.o

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@ -1,57 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
*
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*/
#include <common.h>
#include <miiphy.h>
#include <net.h>
#include <asm/arch/orion5x.h>
#include <asm/global_data.h>
#include "../common/common.h"
#include <spl.h>
#include <ns16550.h>
#include <asm/mach-types.h>
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
/* arch number of board */
gd->bd->bi_arch_number = MACH_TYPE_EDMINI_V2;
/* boot parameter start at 256th byte of RAM base */
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
return 0;
}
#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
/* Configure and enable MV88E1116 PHY */
void reset_phy(void)
{
mv_phy_88e1116_init("egiga0", 8);
}
#endif /* CONFIG_RESET_PHY_R */
/*
* SPL serial setup and NOR boot device selection
*/
#ifdef CONFIG_SPL_BUILD
void spl_board_init(void)
{
preloader_console_init();
}
u32 spl_boot_device(void)
{
return BOOT_DEVICE_NOR;
}
#endif /* CONFIG_SPL_BUILD */

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@ -1,72 +0,0 @@
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_ORION5X=y
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_LDSCRIPT="arch/arm/mach-orion5x/u-boot-spl.lds"
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_SPL_TEXT_BASE=0xffff0000
CONFIG_TARGET_EDMINIV2=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_IDENT_STRING=" EDMiniV2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0xFFF84000
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xf40
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
CONFIG_RESET_PHY_R=y
CONFIG_SPL_MAX_SIZE=0xfff0
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x20000
CONFIG_SPL_BSS_MAX_SIZE=0x1ffff
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_STACK=0x20000
CONFIG_SYS_SPL_MALLOC=y
CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x40000
CONFIG_SYS_SPL_MALLOC_SIZE=0x1ffff
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="EDMiniV2> "
CONFIG_SYS_PBSIZE=1051
CONFIG_CMD_IMLS=y
CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_EXT2=y
CONFIG_ISO_PARTITION=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
CONFIG_SYS_IDE_MAXBUS=1
CONFIG_SYS_IDE_MAXDEVICE=1
CONFIG_SYS_ATA_BASE_ADDR=0xf1080000
CONFIG_SYS_ATA_STRIDE=4
CONFIG_SYS_ATA_DATA_OFFSET=0x100
CONFIG_SYS_ATA_REG_OFFSET=0x100
CONFIG_SYS_ATA_ALT_OFFSET=0x100
CONFIG_SYS_ATA_IDE0_OFFSET=0x4000
CONFIG_LBA48=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x0
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SYS_MAX_FLASH_SECT=11
CONFIG_MVGBE=y
CONFIG_MII=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y

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@ -1,134 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
*
* Based on original Kirkwood support which is
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*/
#ifndef _CONFIG_EDMINIV2_H
#define _CONFIG_EDMINIV2_H
/*
* SPL
*/
#define CONFIG_SYS_UBOOT_BASE 0xfff90000
#define CONFIG_SYS_UBOOT_START 0x00800000
/*
* High Level Configuration Options (easy to change)
*/
#include <asm/arch/orion5x.h>
/*
* CLKs configurations
*/
/*
* Board-specific values for Orion5x MPP low level init:
* - MPPs 12 to 15 are SATA LEDs (mode 5)
* - Others are GPIO/unused (mode 3 for MPP0, mode 5 for
* MPP16 to MPP19, mode 0 for others
*/
#define ORION5X_MPP0_7 0x00000003
#define ORION5X_MPP8_15 0x55550000
#define ORION5X_MPP16_23 0x00005555
/*
* Board-specific values for Orion5x GPIO low level init:
* - GPIO3 is input (RTC interrupt)
* - GPIO16 is Power LED control (0 = on, 1 = off)
* - GPIO17 is Power LED source select (0 = CPLD, 1 = GPIO16)
* - GPIO18 is Power Button status (0 = Released, 1 = Pressed)
* - GPIO19 is SATA disk power toggle (toggles on 0-to-1)
* - GPIO22 is SATA disk power status ()
* - GPIO23 is supply status for SATA disk ()
* - GPIO24 is supply control for board (write 1 to power off)
* Last GPIO is 25, further bits are supposed to be 0.
* Enable mask has ones for INPUT, 0 for OUTPUT.
* Default is LED ON, board ON :)
*/
#define ORION5X_GPIO_OUT_ENABLE 0xfef4f0ca
#define ORION5X_GPIO_OUT_VALUE 0x00000000
#define ORION5X_GPIO_IN_POLARITY 0x000000d0
/*
* NS16550 Configuration
*/
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
#define CONFIG_SYS_NS16550_COM1 ORION5X_UART0_BASE
/*
* Serial Port configuration
* The following definitions let you select what serial you want to use
* for your console driver.
*/
#define CONFIG_SYS_BAUDRATE_TABLE \
{ 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 }
/*
* FLASH configuration
*/
#define CONFIG_SYS_FLASH_BASE 0xfff80000
/* auto boot */
/*
* Network
*/
#ifdef CONFIG_CMD_NET
#define CONFIG_MVGBE_PORTS {1} /* enable port 0 only */
#define CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION /* don't randomize MAC */
#define CONFIG_PHY_BASE_ADR 0x8
#endif
/*
* IDE
*/
#ifdef CONFIG_IDE
#define __io
/* Data, registers and alternate blocks are at the same offset */
/* Each 8-bit ATA register is aligned to a 4-bytes address */
/* A single bus, a single device */
/* ATA registers base is at SATA controller base */
/* ATA bus 0 is orion5x port 1 on ED Mini V2 */
/* end of IDE defines */
#endif /* CMD_IDE */
/*
* Common USB/EHCI configuration
*/
#ifdef CONFIG_CMD_USB
#define ORION5X_USB20_HOST_PORT_BASE ORION5X_USB20_PORT0_BASE
#endif /* CONFIG_CMD_USB */
/*
* I2C related stuff
*/
#ifdef CONFIG_CMD_I2C
#define CONFIG_I2C_MVTWSI_BASE0 ORION5X_TWSI_BASE
#endif
/*
* Environment variables configurations
*/
/* Enable command line editing */
/* provide extensive help */
/* additions for new relocation code, must be added to all boards */
#define CONFIG_SYS_SDRAM_BASE 0
#endif /* _CONFIG_EDMINIV2_H */