freescale/layerscape: Rename the config CONFIG_SECURE_BOOT name
Rename CONFIG_SECURE_BOOT to CONFIG_NXP_ESBC to avoid conflict with UEFI secure boot. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
parent
56e6f810b0
commit
5536c3c9d0
@ -50,8 +50,8 @@ config MAX_CPUS
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cores, count the reserved ports. This will allocate enough memory
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in spin table to properly handle all cores.
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config SECURE_BOOT
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bool "Secure Boot"
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config NXP_ESBC
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bool "NXP_ESBC"
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help
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Enable Freescale Secure Boot feature. Normally selected
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by defconfig. If unsure, do not change.
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@ -376,8 +376,8 @@ config EMC2305
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Enable the EMC2305 fan controller for configuration of fan
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speed.
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config SECURE_BOOT
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bool "Secure Boot"
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config NXP_ESBC
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bool "NXP_ESBC"
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help
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Enable Freescale Secure Boot feature
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@ -34,7 +34,7 @@ u32 spl_boot_device(void)
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void spl_board_init(void)
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{
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#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_LSCH2)
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#if defined(CONFIG_NXP_ESBC) && defined(CONFIG_FSL_LSCH2)
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/*
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* In case of Secure Boot, the IBR configures the SMMU
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* to allow only Secure transactions.
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@ -1,5 +1,5 @@
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config CHAIN_OF_TRUST
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depends on !FIT_SIGNATURE && SECURE_BOOT
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depends on !FIT_SIGNATURE && NXP_ESBC
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imply CMD_BLOB
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imply CMD_HASH if ARM
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select FSL_CAAM
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@ -75,7 +75,7 @@ obj-$(CONFIG_TARGET_P5040DS) += p_corenet/
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obj-$(CONFIG_LAYERSCAPE_NS_ACCESS) += ns_access.o
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ifdef CONFIG_SECURE_BOOT
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ifdef CONFIG_NXP_ESBC
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obj-$(CONFIG_CMD_ESBC_VALIDATE) += fsl_validate.o cmd_esbc_validate.o
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endif
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obj-$(CONFIG_CHAIN_OF_TRUST) += fsl_chain_of_trust.o
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@ -196,7 +196,7 @@ int board_init(void)
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init_final_memctl_regs();
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#endif
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#ifdef CONFIG_SECURE_BOOT
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#ifdef CONFIG_NXP_ESBC
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/* In case of Secure Boot, the IBR configures the SMMU
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* to allow only Secure transactions.
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* SMMU must be reset in bypass mode.
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@ -126,7 +126,7 @@ int checkboard(void)
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int board_init(void)
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{
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#ifdef CONFIG_SECURE_BOOT
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#ifdef CONFIG_NXP_ESBC
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/*
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* In case of Secure Boot, the IBR configures the SMMU
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* to allow only Secure transactions.
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@ -407,7 +407,7 @@ int board_init(void)
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ppa_init();
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#endif
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#ifdef CONFIG_SECURE_BOOT
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#ifdef CONFIG_NXP_ESBC
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/*
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* In case of Secure Boot, the IBR configures the SMMU
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* to allow only Secure transactions.
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@ -69,7 +69,7 @@ int board_init(void)
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{
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struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
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#ifdef CONFIG_SECURE_BOOT
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#ifdef CONFIG_NXP_ESBC
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/*
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* In case of Secure Boot, the IBR configures the SMMU
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* to allow only Secure transactions.
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@ -1,7 +1,7 @@
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CONFIG_ARM=y
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CONFIG_TARGET_LS1012AFRWY=y
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CONFIG_SYS_TEXT_BASE=0x40100000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_FSL_LS_PPA=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_AHCI=y
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@ -2,7 +2,7 @@ CONFIG_ARM=y
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CONFIG_TARGET_LS1012AFRWY=y
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CONFIG_TFABOOT=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
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CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
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@ -2,7 +2,7 @@ CONFIG_ARM=y
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CONFIG_TARGET_LS1012AQDS=y
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CONFIG_TFABOOT=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_QSPI_AHB_INIT=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
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@ -1,7 +1,7 @@
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CONFIG_ARM=y
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CONFIG_TARGET_LS1012ARDB=y
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CONFIG_SYS_TEXT_BASE=0x40100000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_FSL_LS_PPA=y
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CONFIG_QSPI_AHB_INIT=y
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CONFIG_NR_DRAM_BANKS=2
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@ -2,7 +2,7 @@ CONFIG_ARM=y
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CONFIG_TARGET_LS1012ARDB=y
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CONFIG_TFABOOT=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_QSPI_AHB_INIT=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
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@ -1,7 +1,7 @@
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CONFIG_ARM=y
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CONFIG_TARGET_LS1021AQDS=y
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CONFIG_SYS_TEXT_BASE=0x60100000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_F is not set
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@ -1,7 +1,7 @@
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CONFIG_ARM=y
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CONFIG_TARGET_LS1021ATWR=y
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CONFIG_SYS_TEXT_BASE=0x60100000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_AHCI=y
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CONFIG_DISTRO_DEFAULTS=y
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@ -3,7 +3,7 @@ CONFIG_TARGET_LS1021ATWR=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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@ -2,7 +2,7 @@ CONFIG_ARM=y
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CONFIG_TARGET_LS1028AQDS=y
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CONFIG_TFABOOT=y
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CONFIG_SYS_MALLOC_F_LEN=0x6000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_SYS_FSL_SDHC_CLK_DIV=1
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
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@ -2,7 +2,7 @@ CONFIG_ARM=y
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CONFIG_TARGET_LS1028ARDB=y
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CONFIG_TFABOOT=y
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CONFIG_SYS_MALLOC_F_LEN=0x6000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_SYS_FSL_SDHC_CLK_DIV=1
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
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@ -2,7 +2,7 @@ CONFIG_ARM=y
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CONFIG_TARGET_LS1043AQDS=y
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CONFIG_TFABOOT=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
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CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
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@ -1,7 +1,7 @@
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CONFIG_ARM=y
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CONFIG_TARGET_LS1043ARDB=y
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CONFIG_SYS_TEXT_BASE=0x60100000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_FSL_LS_PPA=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_DISTRO_DEFAULTS=y
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@ -3,7 +3,7 @@ CONFIG_TARGET_LS1043ARDB=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_FSL_LS_PPA=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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@ -3,7 +3,7 @@ CONFIG_TARGET_LS1043ARDB=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_FSL_LS_PPA=y
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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@ -2,7 +2,7 @@ CONFIG_ARM=y
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CONFIG_TARGET_LS1043ARDB=y
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CONFIG_TFABOOT=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
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CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
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@ -1,7 +1,7 @@
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CONFIG_ARM=y
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CONFIG_TARGET_LS1046AQDS=y
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CONFIG_SYS_TEXT_BASE=0x60100000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_FSL_LS_PPA=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_AHCI=y
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@ -2,7 +2,7 @@ CONFIG_ARM=y
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CONFIG_TARGET_LS1046AQDS=y
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CONFIG_TFABOOT=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
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CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
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@ -1,7 +1,7 @@
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CONFIG_ARM=y
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CONFIG_TARGET_LS1046ARDB=y
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CONFIG_SYS_TEXT_BASE=0x40100000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_FSL_LS_PPA=y
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CONFIG_QSPI_AHB_INIT=y
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CONFIG_NR_DRAM_BANKS=2
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@ -3,7 +3,7 @@ CONFIG_TARGET_LS1046ARDB=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_FSL_LS_PPA=y
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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@ -2,7 +2,7 @@ CONFIG_ARM=y
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CONFIG_TARGET_LS1046ARDB=y
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CONFIG_TFABOOT=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_QSPI_AHB_INIT=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
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@ -1,7 +1,7 @@
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CONFIG_ARM=y
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CONFIG_TARGET_LS1088AQDS=y
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CONFIG_SYS_TEXT_BASE=0x20100000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_FSL_LS_PPA=y
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CONFIG_QSPI_AHB_INIT=y
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CONFIG_NR_DRAM_BANKS=2
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@ -1,7 +1,7 @@
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CONFIG_ARM=y
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CONFIG_TARGET_LS1088ARDB=y
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CONFIG_SYS_TEXT_BASE=0x20100000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_FSL_LS_PPA=y
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CONFIG_QSPI_AHB_INIT=y
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CONFIG_NR_DRAM_BANKS=2
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@ -3,7 +3,7 @@ CONFIG_TARGET_LS1088ARDB=y
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CONFIG_SYS_TEXT_BASE=0x80400000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_FSL_LS_PPA=y
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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@ -3,7 +3,7 @@ CONFIG_TARGET_LS1088ARDB=y
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CONFIG_TFABOOT=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SYS_MALLOC_F_LEN=0x6000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_QSPI_AHB_INIT=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
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@ -1,7 +1,7 @@
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CONFIG_ARM=y
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CONFIG_TARGET_LS2080AQDS=y
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CONFIG_SYS_TEXT_BASE=0x30100000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_FSL_LS_PPA=y
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CONFIG_NR_DRAM_BANKS=3
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CONFIG_AHCI=y
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@ -1,7 +1,7 @@
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CONFIG_ARM=y
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CONFIG_TARGET_LS2080ARDB=y
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CONFIG_SYS_TEXT_BASE=0x30100000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_FSL_LS_PPA=y
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CONFIG_NR_DRAM_BANKS=3
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CONFIG_AHCI=y
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@ -1,7 +1,7 @@
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CONFIG_ARM=y
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CONFIG_TARGET_LS2080ARDB=y
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CONFIG_SYS_TEXT_BASE=0x20100000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_FSL_LS_PPA=y
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CONFIG_QSPI_AHB_INIT=y
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CONFIG_NR_DRAM_BANKS=3
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CONFIG_TFABOOT=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SYS_MALLOC_F_LEN=0x6000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_QSPI_AHB_INIT=y
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CONFIG_NR_DRAM_BANKS=3
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CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
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@ -3,7 +3,7 @@ CONFIG_TARGET_LX2160AQDS=y
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CONFIG_TFABOOT=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SYS_MALLOC_F_LEN=0x6000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_NR_DRAM_BANKS=3
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CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
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CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
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@ -3,7 +3,7 @@ CONFIG_TARGET_LX2160ARDB=y
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CONFIG_TFABOOT=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SYS_MALLOC_F_LEN=0x6000
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CONFIG_SECURE_BOOT=y
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CONFIG_NXP_ESBC=y
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CONFIG_EMC2305=y
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CONFIG_NR_DRAM_BANKS=3
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CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
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@ -66,13 +66,13 @@
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board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg
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#endif
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#ifdef CONFIG_SECURE_BOOT
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#ifdef CONFIG_NXP_ESBC
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/*
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* HDR would be appended at end of image and copied to DDR along
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* with U-Boot image.
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*/
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#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
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#endif /* ifdef CONFIG_SECURE_BOOT */
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#endif /* ifdef CONFIG_NXP_ESBC */
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#define CONFIG_SPL_MAX_SIZE 0x1a000
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#define CONFIG_SPL_STACK 0x1001d000
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
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#ifdef CONFIG_SECURE_BOOT
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#ifdef CONFIG_NXP_ESBC
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#include <asm/fsl_secure_boot.h>
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#endif
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#define CONFIG_SPL_BSS_START_ADDR 0x8f000000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
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#ifdef CONFIG_SECURE_BOOT
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#ifdef CONFIG_NXP_ESBC
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#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
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/*
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* HDR would be appended at end of image and copied to DDR along
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@ -85,7 +85,7 @@
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#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
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#else
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#define CONFIG_SYS_MONITOR_LEN 0x100000
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#endif /* ifdef CONFIG_SECURE_BOOT */
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#endif /* ifdef CONFIG_NXP_ESBC */
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#endif
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/* NAND SPL */
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@ -100,9 +100,9 @@
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
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#ifdef CONFIG_SECURE_BOOT
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#ifdef CONFIG_NXP_ESBC
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#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
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#endif /* ifdef CONFIG_SECURE_BOOT */
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#endif /* ifdef CONFIG_NXP_ESBC */
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#ifdef CONFIG_U_BOOT_HDR_SIZE
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/*
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@ -73,7 +73,7 @@
|
||||
CONFIG_SPL_BSS_MAX_SIZE)
|
||||
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
|
||||
|
||||
#ifdef CONFIG_SECURE_BOOT
|
||||
#ifdef CONFIG_NXP_ESBC
|
||||
#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
|
||||
/*
|
||||
* HDR would be appended at end of image and copied to DDR along
|
||||
@ -84,7 +84,7 @@
|
||||
#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
|
||||
#else
|
||||
#define CONFIG_SYS_MONITOR_LEN 0x100000
|
||||
#endif /* ifdef CONFIG_SECURE_BOOT */
|
||||
#endif /* ifdef CONFIG_NXP_ESBC */
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL)
|
||||
|
@ -235,7 +235,7 @@ unsigned long long get_qixis_addr(void);
|
||||
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000
|
||||
#define CONFIG_SYS_SPL_MALLOC_START 0x80200000
|
||||
|
||||
#ifdef CONFIG_SECURE_BOOT
|
||||
#ifdef CONFIG_NXP_ESBC
|
||||
#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
|
||||
/*
|
||||
* HDR would be appended at end of image and copied to DDR along
|
||||
@ -246,7 +246,7 @@ unsigned long long get_qixis_addr(void);
|
||||
#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
|
||||
#else
|
||||
#define CONFIG_SYS_MONITOR_LEN 0x100000
|
||||
#endif /* ifdef CONFIG_SECURE_BOOT */
|
||||
#endif /* ifdef CONFIG_NXP_ESBC */
|
||||
|
||||
#endif
|
||||
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
|
||||
|
@ -407,7 +407,7 @@ unsigned long get_board_ddr_clk(void);
|
||||
QIXIS_SDID_MASK) != QIXIS_ESDHC_NO_ADAPTER)
|
||||
|
||||
/* Initial environment variables */
|
||||
#ifdef CONFIG_SECURE_BOOT
|
||||
#ifdef CONFIG_NXP_ESBC
|
||||
#undef CONFIG_EXTRA_ENV_SETTINGS
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
|
||||
@ -426,7 +426,7 @@ unsigned long get_board_ddr_clk(void);
|
||||
"sf read 0xa0740000 0x740000 0x4000;esbc_validate 0xa0740000;" \
|
||||
"fsl_mc start mc 0xa0a00000 0xa0e00000\0" \
|
||||
"mcmemsize=0x70000000 \0"
|
||||
#else /* if !(CONFIG_SECURE_BOOT) */
|
||||
#else /* if !(CONFIG_NXP_ESBC) */
|
||||
#ifdef CONFIG_TFABOOT
|
||||
#define QSPI_MC_INIT_CMD \
|
||||
"sf probe 0:0;sf read 0x80000000 0xA00000 0x100000;" \
|
||||
@ -522,7 +522,7 @@ unsigned long get_board_ddr_clk(void);
|
||||
"mcmemsize=0x70000000 \0"
|
||||
#endif
|
||||
#endif /* CONFIG_TFABOOT */
|
||||
#endif /* CONFIG_SECURE_BOOT */
|
||||
#endif /* CONFIG_NXP_ESBC */
|
||||
|
||||
#ifdef CONFIG_FSL_MC_ENET
|
||||
#define CONFIG_FSL_MEMAC
|
||||
|
@ -352,7 +352,7 @@ unsigned long get_board_ddr_clk(void);
|
||||
|
||||
/* Initial environment variables */
|
||||
#undef CONFIG_EXTRA_ENV_SETTINGS
|
||||
#ifdef CONFIG_SECURE_BOOT
|
||||
#ifdef CONFIG_NXP_ESBC
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
|
||||
"loadaddr=0x80100000\0" \
|
||||
@ -442,7 +442,7 @@ unsigned long get_board_ddr_clk(void);
|
||||
"mcinitcmd=fsl_mc start mc 0x580a00000" \
|
||||
" 0x580e00000 \0"
|
||||
#endif /* CONFIG_TFABOOT */
|
||||
#endif /* CONFIG_SECURE_BOOT */
|
||||
#endif /* CONFIG_NXP_ESBC */
|
||||
|
||||
#ifdef CONFIG_TFABOOT
|
||||
#define SD_BOOTCOMMAND \
|
||||
|
Loading…
Reference in New Issue
Block a user