arm: dts: rockchip: rk3399: Move U-Boot specific bits to rk3399-u-boot
There's some bits in the U-Boot rk3399.dtsi that aren't yet in the upstream Linux dtsi but are needed for early boot. This moves them to the u-boot.dtsi to make it easier to sync the rest of rk3399.dtsi with upstream. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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@ -2,19 +2,58 @@
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/*
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* Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
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*/
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#define USB_CLASS_HUB 9
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/ {
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aliases {
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mmc0 = &sdhci;
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mmc1 = &sdmmc;
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};
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cic: syscon@ff620000 {
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u-boot,dm-pre-reloc;
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compatible = "rockchip,rk3399-cic", "syscon";
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reg = <0x0 0xff620000 0x0 0x100>;
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};
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dfi: dfi@ff630000 {
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u-boot,dm-pre-reloc;
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reg = <0x00 0xff630000 0x00 0x4000>;
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compatible = "rockchip,rk3399-dfi";
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rockchip,pmu = <&pmugrf>;
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clocks = <&cru PCLK_DDR_MON>;
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clock-names = "pclk_ddr_mon";
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};
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dmc: dmc {
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u-boot,dm-pre-reloc;
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compatible = "rockchip,rk3399-dmc";
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devfreq-events = <&dfi>;
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interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&cru SCLK_DDRCLK>;
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clock-names = "dmc_clk";
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reg = <0x0 0xffa80000 0x0 0x0800
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0x0 0xffa80800 0x0 0x1800
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0x0 0xffa82000 0x0 0x2000
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0x0 0xffa84000 0x0 0x1000
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0x0 0xffa88000 0x0 0x0800
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0x0 0xffa88800 0x0 0x1800
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0x0 0xffa8a000 0x0 0x2000
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0x0 0xffa8c000 0x0 0x1000>;
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};
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pmusgrf: syscon@ff330000 {
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u-boot,dm-pre-reloc;
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compatible = "rockchip,rk3399-pmusgrf", "syscon";
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reg = <0x0 0xff330000 0x0 0xe3d4>;
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};
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&cic {
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u-boot,dm-pre-reloc;
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};
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&cru {
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u-boot,dm-pre-reloc;
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};
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&dmc {
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u-boot,dm-pre-reloc;
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};
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&grf {
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u-boot,dm-pre-reloc;
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};
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@ -39,10 +78,6 @@
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u-boot,dm-pre-reloc;
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};
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&pmusgrf {
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u-boot,dm-pre-reloc;
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};
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&sdhci {
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u-boot,dm-pre-reloc;
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};
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@ -10,7 +10,6 @@
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/power/rk3399-power.h>
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#include <dt-bindings/thermal/thermal.h>
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#define USB_CLASS_HUB 9
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/ {
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compatible = "rockchip,rk3399";
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@ -34,8 +33,6 @@
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serial2 = &uart2;
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serial3 = &uart3;
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serial4 = &uart4;
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mmc0 = &sdhci;
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mmc1 = &sdmmc;
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};
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cpus {
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@ -1080,11 +1077,6 @@
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};
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};
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pmusgrf: syscon@ff330000 {
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compatible = "rockchip,rk3399-pmusgrf", "syscon";
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reg = <0x0 0xff330000 0x0 0xe3d4>;
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};
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spi3: spi@ff350000 {
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compatible = "rockchip,rk3399-spi", "rockchip,rk3066-spi";
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reg = <0x0 0xff350000 0x0 0x1000>;
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@ -1200,36 +1192,6 @@
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status = "disabled";
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};
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cic: syscon@ff620000 {
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compatible = "rockchip,rk3399-cic", "syscon";
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reg = <0x0 0xff620000 0x0 0x100>;
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};
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dfi: dfi@ff630000 {
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reg = <0x00 0xff630000 0x00 0x4000>;
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compatible = "rockchip,rk3399-dfi";
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rockchip,pmu = <&pmugrf>;
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clocks = <&cru PCLK_DDR_MON>;
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clock-names = "pclk_ddr_mon";
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status = "disabled";
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};
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dmc: dmc {
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compatible = "rockchip,rk3399-dmc";
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devfreq-events = <&dfi>;
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interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&cru SCLK_DDRCLK>;
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clock-names = "dmc_clk";
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reg = <0x0 0xffa80000 0x0 0x0800
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0x0 0xffa80800 0x0 0x1800
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0x0 0xffa82000 0x0 0x2000
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0x0 0xffa84000 0x0 0x1000
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0x0 0xffa88000 0x0 0x0800
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0x0 0xffa88800 0x0 0x1800
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0x0 0xffa8a000 0x0 0x2000
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0x0 0xffa8c000 0x0 0x1000>;
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};
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efuse0: efuse@ff690000 {
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compatible = "rockchip,rk3399-efuse";
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reg = <0x0 0xff690000 0x0 0x80>;
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