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x86: sipi_vector: Append appropriate suffixes

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Assembler is not happy:

arch/x86/cpu/sipi_vector.S: Assembler messages:
arch/x86/cpu/sipi_vector.S:134: Warning: no instruction mnemonic suffix given and no register operands; using default for `cmp'
arch/x86/cpu/sipi_vector.S:139: Warning: no instruction mnemonic suffix given and no register operands; using default for `bts'
arch/x86/cpu/sipi_vector.S:157: Warning: no instruction mnemonic suffix given and no register operands; using default for `cmp'

Fix this by adding appropriate suffixes to the assembler commands.

Fixes: 45b5a37836 ("x86: Add multi-processor init")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Andy Shevchenko 2020-07-28 12:56:25 +03:00 committed by Bin Meng
parent a0186110af
commit 549c6f47e6
1 changed files with 3 additions and 3 deletions
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6
arch/x86/cpu/sipi_vector.S
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@ -131,12 +131,12 @@ ap_start:
jnz microcode_done
/* Determine if parallel microcode loading is allowed */
cmp $0xffffffff, microcode_lock
cmpl $0xffffffff, microcode_lock
je load_microcode
/* Protect microcode loading */
lock_microcode:
lock bts $0, microcode_lock
lock btsl $0, microcode_lock
jc lock_microcode
load_microcode:
@ -154,7 +154,7 @@ load_microcode:
popa
/* Unconditionally unlock microcode loading */
cmp $0xffffffff, microcode_lock
cmpl $0xffffffff, microcode_lock
je microcode_done
xor %eax, %eax