Patches by Jon Loeliger, 11 May 2004:
(partially, as they contained a lot of crap)
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Changes since U-Boot 1.1.1:
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======================================================================
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* Patches Part 1 by Jon Loeliger, 11 May 2004:
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* Patches by Jon Loeliger, 11 May 2004:
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Dynamically handle REV1 and REV2 MPC85xx parts.
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(Jon Loeliger, 10-May-2004).
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New consistent memory map and Local Access Window across MPC85xx line.
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@ -13,36 +13,44 @@ use the newest binutils-2.14.tar.bz2 from http://ftp.gnu.org/gnu/binutils.
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shipped with your board. Then apply the following changes:
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SW3[1-6]="all OFF" (boot from 32bit flash, no boot sequence is used)
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SW10[2-6]="all OFF" (turn on CPM SCC for serial port,works for 8540/8560)
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SW11[2]='OFF for dracom, ON for draco' (single switch to toggle draco.dracom mode)
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SW11[2]='OFF for 8560, ON for 8540' (single switch to toggle 8540.8560 mode)
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SW11[7]='ON' (rev2), 'OFF' (rev1)
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SW4[7-8]="OFF OFF" (enable serial ports,I'm using the top serial connector)
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SW22[1-4]="OFF OFF ON OFF"
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SW5[1-10[="ON ON OFF OFF OFF OFF OFF OFF OFF OFF"
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J1 = "Enable Prog" (Make sure your flash is programmable for development)
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Ethernet PHY connectors(J47,J56) should be removed if you want to use the ethernet.
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1.2 If you want to test PCI functionality with a 33Mhz PCI card, you will have to change
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the system clock from the default 66Mhz to 33Mhz by setting SW15[1]="OFF" and
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SW17[8]="OFF". After that you may also need double your platform clock(SW6) because
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the system clock is now only half of its original value.
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1.3 SW6 is a very important switch, it decides your platform clock and CPU clock based on
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the on-board system clock(default 66MHz). Check the document along with your board
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for details.
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1.2 If you want to test PCI functionality with a 33Mhz PCI card, you will
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have to change the system clock from the default 66Mhz to 33Mhz by
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setting SW15[1]="OFF" and SW17[8]="OFF". After that you may also need
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double your platform clock(SW6) because the system clock is now only
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half of its original value.
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1.3 SW6 is a very important switch, it decides your platform clock and CPU
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clock based on the on-board system clock(default 66MHz). Check the
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document along with your board for details.
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2. MEMORY MAP TO WORK WITH LINUX KERNEL
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2.1. For the initial bringup, we adopted a consistent memory scheme between u-boot and
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linux kernel, you can customize it based on your system requirements:
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DDR: 0x00000000-0x1fffffff (max 512MB)
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PCI: 0xe0000000-0xefffffff (256MB)
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RIO: 0xf0000000-0xf7ffffff (128MB)
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Local SDRAM: 0xf8000000-0xfbffffff (64MB)
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Local CSx: 0xfc000000-0xfdefffff (31MB) BCSR,RTC,ATM config,etc.
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CCSRBAR: 0xfdf00000-0xfdffffff (1MB)
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Flash: 0xfe000000-0xffffffff (max 32MB)
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2.2 We are submitting Linux kernel patches for MPC8540 and MPC8560. Hope you will be
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able to download them from linuxppc-2.4 public source by the time you are reading
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this. Please make sure the kernel's ppcboot.h is consistent with U-Boot's u-boot.h,
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then you can use two default configuration files in the kernel source as a test:
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arch/ppc/configs/mpc8540ads_defconfig
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arch/ppc/configs/mpc8560ads_defconfig
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2.1. For the initial bringup, we adopted a consistent memory scheme
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between u-boot and linux kernel, you can customize it based on your
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system requirements:
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0x0000_0000 0x7fff_ffff DDR 2G
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0x8000_0000 0x9fff_ffff PCI MEM 512M
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0xc000_0000 0xdfff_ffff Rapid IO 512M
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0xe000_0000 0xe000_ffff CCSR 1M
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0xe200_0000 0xe2ff_ffff PCI IO 16M
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0xf000_0000 0xf7ff_ffff SDRAM 128M
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0xf800_0000 0xf80f_ffff BCSR 1M
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0xff00_0000 0xffff_ffff FLASH (boot bank) 16M
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2.2 We are submitting Linux kernel patches for MPC8540 and MPC8560. You
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can download them from linuxppc-2.4 public source. Please make sure the
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kernel's ppcboot.h is consistent with U-Boot's u-boot.h. You can use two
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default configuration files as your starting points to configure the
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kernel:
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arch/ppc/configs/mpc8540_ads_defconfig
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arch/ppc/configs/mpc8560_ads_defconfig
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3. DEFINITIONS AND COMPILATION
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3.1 Explanation on NEW definitions in include/configs/MPC8540ADS.h and include/
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@ -50,9 +58,6 @@ use the newest binutils-2.14.tar.bz2 from http://ftp.gnu.org/gnu/binutils.
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CONFIG_BOOKE BOOKE(e.g. Motorola MPC85xx, IBM 440, etc)
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CONFIG_E500 BOOKE e500 family(Motorola)
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CONFIG_MPC85xx MPC8540,MPC8560 and their derivatives
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CONFIG_MPC85xx_REV1 MPC85xx Rev 1 Chip, in general you will use a Rev2
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chip from Nov.2003. If you still see this definition
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while you have a Rev2(and newer) chip,undef this.
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CONFIG_MPC8540 MPC8540 specific
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CONFIG_MPC8560 MPC8560 specific
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CONFIG_MPC8540ADS MPC8540ADS board specific
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@ -61,8 +66,7 @@ use the newest binutils-2.14.tar.bz2 from http://ftp.gnu.org/gnu/binutils.
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CONFIG_SPD_EEPROM Use SPD EEPROM for DDR auto configuration, you can also
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manual config the DDR after undef this definition.
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CONFIG_DDR_ECC only for ECC DDR module
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CONFIG_DDR_DLL possible DLL fix needed for Rev1 chip for more stability.
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you can disable this if you're having a newer chip.
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CONFIG_DDR_DLL DLL fix on some ADS boards needed for more stability.
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CONFIG_RAM_AS_FLASH after define this, you can load U-Boot into localbus
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SDRAM and treat localbus SDRAM as a flash. We use this
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memory based U-Boot before flash is working while Metrowerks
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@ -78,8 +82,19 @@ use the newest binutils-2.14.tar.bz2 from http://ftp.gnu.org/gnu/binutils.
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make MPC8560ADS_config (or make MPC8540ADS_config)
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make
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4. Note on the 10/100/1000 Ethernet controller:
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4.1 Sometimes after U-Boot is up, the 'tftp' won't work well with TSEC ethernet. If that
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4. Notes:
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4.1 When connecting with kermit, the following commands must be present.in
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your .kermrc file. These are especially important when booting as
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MPC8560, as the serial console will not work without them:
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set speed 115200
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set carrier-watch off
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set handshake none
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set flow-control none
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robust
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4.2 Sometimes after U-Boot is up, the 'tftp' won't work well with TSEC ethernet. If that
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happens, you can try the following steps to make network work:
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MPC8560ADS>tftp 1000000 pImage
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(if it hangs, use Ctrl-C to quit)
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@ -88,6 +103,17 @@ use the newest binutils-2.14.tar.bz2 from http://ftp.gnu.org/gnu/binutils.
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>1
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>. (to quit this memory operation)
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MPC8560ADS>tftp 1000000 pImage
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4.3 If you're one of the early developers using the Rev1 8540/8560 chips, please use U-Boot
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1.0.0, as the newer silicon will only support Rev2 and future revisions of 8540/8560.
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4.4 Reflash U-boot Image using U-boot
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=> tftp 0 u-boot.bin
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=> protect off fff80000 ffffffff
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=> erase fff80000 ffffffff
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=> cp.b 0 fff80000 80000
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5. Screen dump:
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5.1 MPC8540ADS board
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@ -89,7 +89,13 @@ typedef struct ccsr_ddr {
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uint sdram_mode; /* 0x2118 - DDR SDRAM Mode Configuration */
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char res7[8];
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uint sdram_interval; /* 0x2124 - DDR SDRAM Interval Configuration */
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#ifdef MPC85xx_DDR_SDRAM_CLK_CNTL
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char res7_5[8];
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uint sdram_clk_cntl; /* 0x2130 - DDR SDRAM Clock Control */
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char res8[3276];
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#else
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char res8[3288];
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#endif
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uint data_err_inject_hi; /* 0x2e00 - DDR Memory Data Path Error Injection Mask High */
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uint data_err_inject_lo; /* 0x2e04 - DDR Memory Data Path Error Injection Mask Low */
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uint ecc_err_inject; /* 0x2e08 - DDR Memory Data Path Error Injection Mask ECC */
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@ -150,7 +156,7 @@ typedef struct ccsr_i2c {
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char res6[4075];
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} ccsr_i2c_t;
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#ifdef CONFIG_MPC8540
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#if defined (CONFIG_MPC8540) || defined (CONFIG_MPC8555)
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/* DUART Registers(0x4000-0x5000) */
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typedef struct ccsr_duart {
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char res1[1280];
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@ -1015,7 +1021,7 @@ typedef struct ccsr_pic {
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} ccsr_pic_t;
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/* CPM Block(0x8_0000-0xc_0000) */
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#ifdef CONFIG_MPC8540
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#if defined (CONFIG_MPC8540) || defined (CONFIG_MPC8555)
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typedef struct ccsr_cpm {
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char res[262144];
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} ccsr_cpm_t;
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defined(CONFIG_SXNI855T) || \
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defined(CONFIG_SVM_SC8xx) || \
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defined(CONFIG_MPC8540ADS) || \
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defined(CONFIG_MPC8560ADS) || \
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defined(CONFIG_MPC8555CDS) || \
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defined(CONFIG_MPC8560ADS) || \
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defined(CONFIG_440_GX)
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/* second onboard ethernet port */
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unsigned char bi_enet1addr[6];
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#endif
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#if defined(CFG_GT_6426x) || defined(CONFIG_SVM_SC8xx) || \
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defined(CONFIG_MPC8540ADS) || defined(CONFIG_MPC8560ADS) || \
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defined(CONFIG_440_GX)
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defined(CONFIG_MPC8555CDS) || defined(CONFIG_440_GX)
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/* third onboard ethernet port */
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unsigned char bi_enet2addr[6];
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#endif
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#endif
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uint get_pir (void);
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uint get_pvr (void);
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uint get_svr (void);
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uint rd_ic_cst (void);
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void wr_ic_cst (uint);
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void wr_ic_adr (uint);
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