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x86: dts: switch spi-flash to jedec, spi-nor compatible

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The x86 code and DT uses "spi-flash" to detect a flash node, switch to
"jedec,spi-nor" in the DTS files and in fdtdec by switching the
GENERIC_SPI_FLASH value to to jedec,spi-nor.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
This commit is contained in:
Neil Armstrong 2019-02-10 10:16:21 +00:00 committed by Jagan Teki
parent ffd4c7c2ec
commit 51e4e3e5d0
13 changed files with 13 additions and 13 deletions
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2
arch/x86/dts/bayleybay.dts
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@ -175,7 +175,7 @@
#size-cells = <1>;
reg = <0>;
compatible = "winbond,w25q64dw",
"spi-flash";
"jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";

2
arch/x86/dts/baytrail_som-db5800-som-6867.dts
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@ -199,7 +199,7 @@
#size-cells = <1>;
reg = <0>;
compatible = "macronix,mx25l6405d",
"spi-flash";
"jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";

2
arch/x86/dts/cherryhill.dts
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@ -147,7 +147,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "macronix,mx25u6435f", "spi-flash";
compatible = "macronix,mx25u6435f", "jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";

2
arch/x86/dts/chromebook_link.dts
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@ -429,7 +429,7 @@
u-boot,dm-pre-reloc;
reg = <0>;
compatible = "winbond,w25q64",
"spi-flash";
"jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";

2
arch/x86/dts/chromebook_samus.dts
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@ -567,7 +567,7 @@
#address-cells = <1>;
reg = <0>;
compatible = "winbond,w25q64",
"spi-flash";
"jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";

2
arch/x86/dts/chromebox_panther.dts
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@ -47,7 +47,7 @@
#address-cells = <1>;
reg = <0>;
compatible = "winbond,w25q64",
"spi-flash";
"jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";

2
arch/x86/dts/conga-qeval20-qa3-e3845.dts
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@ -186,7 +186,7 @@
#size-cells = <1>;
reg = <0>;
compatible = "stmicro,n25q064a",
"spi-flash";
"jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";

2
arch/x86/dts/cougarcanyon2.dts
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@ -154,7 +154,7 @@
spi-flash@0 {
reg = <0>;
compatible = "winbond,w25q64bv", "spi-flash";
compatible = "winbond,w25q64bv", "jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
};
};

2
arch/x86/dts/crownbay.dts
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@ -224,7 +224,7 @@
spi-flash@0 {
reg = <0>;
compatible = "sst,25vf016b",
"spi-flash";
"jedec,spi-nor";
memory-map = <0xffe00000 0x00200000>;
};
};

2
arch/x86/dts/dfi-bt700.dtsi
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@ -197,7 +197,7 @@
#size-cells = <1>;
reg = <0>;
compatible = "stmicro,n25q064a",
"spi-flash";
"jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";

2
arch/x86/dts/galileo.dts
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@ -139,7 +139,7 @@
#address-cells = <1>;
reg = <0>;
compatible = "winbond,w25q64",
"spi-flash";
"jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";

2
arch/x86/dts/minnowmax.dts
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@ -199,7 +199,7 @@
#size-cells = <1>;
reg = <0>;
compatible = "stmicro,n25q064a",
"spi-flash";
"jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";

2
lib/fdtdec.c
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@ -45,7 +45,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
COMPAT(INTEL_MICROCODE, "intel,microcode"),
COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),