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Merge git://git.denx.de/u-boot-x86

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This includes x86 edison defconfig file clean up, and coreboot file
system (cbfs) fixes.
This commit is contained in:
Tom Rini 2018-12-31 08:08:33 -05:00
commit 51ae59228c
5 changed files with 47 additions and 19 deletions
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34
cmd/cbfs.c
View File

@ -112,12 +112,21 @@ static int do_cbfs_ls(cmd_tbl_t *cmdtp, int flag, int argc,
printf(" %8d", file_cbfs_size(file));
switch (type) {
case CBFS_TYPE_BOOTBLOCK:
type_name = "bootblock";
break;
case CBFS_TYPE_CBFSHEADER:
type_name = "cbfs header";
break;
case CBFS_TYPE_STAGE:
type_name = "stage";
break;
case CBFS_TYPE_PAYLOAD:
type_name = "payload";
break;
case CBFS_TYPE_FIT:
type_name = "fit";
break;
case CBFS_TYPE_OPTIONROM:
type_name = "option rom";
break;
@ -136,10 +145,31 @@ static int do_cbfs_ls(cmd_tbl_t *cmdtp, int flag, int argc,
case CBFS_TYPE_MICROCODE:
type_name = "microcode";
break;
case CBFS_COMPONENT_CMOS_DEFAULT:
case CBFS_TYPE_FSP:
type_name = "fsp";
break;
case CBFS_TYPE_MRC:
type_name = "mrc";
break;
case CBFS_TYPE_MMA:
type_name = "mma";
break;
case CBFS_TYPE_EFI:
type_name = "efi";
break;
case CBFS_TYPE_STRUCT:
type_name = "struct";
break;
case CBFS_TYPE_CMOS_DEFAULT:
type_name = "cmos default";
break;
case CBFS_COMPONENT_CMOS_LAYOUT:
case CBFS_TYPE_SPD:
type_name = "spd";
break;
case CBFS_TYPE_MRC_CACHE:
type_name = "mrc cache";
break;
case CBFS_TYPE_CMOS_LAYOUT:
type_name = "cmos layout";
break;
case -1:

1
configs/edison_defconfig
View File

@ -18,7 +18,6 @@ CONFIG_CMD_DFU=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
# CONFIG_CMD_PCI is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_TIMER=y
CONFIG_CMD_HASH=y

7
fs/cbfs/cbfs.c
View File

@ -96,8 +96,7 @@ static int file_cbfs_next_file(u8 *start, u32 size, u32 align,
}
swap_file_header(&header, fileHeader);
if (header.offset < sizeof(struct cbfs_fileheader) ||
header.offset > header.len) {
if (header.offset < sizeof(struct cbfs_fileheader)) {
file_cbfs_result = CBFS_BAD_FILE;
return -1;
}
@ -190,8 +189,8 @@ void file_cbfs_init(uintptr_t end_of_rom)
start_of_rom = (u8 *)(end_of_rom + 1 - cbfs_header.rom_size);
file_cbfs_fill_cache(start_of_rom + cbfs_header.offset,
cbfs_header.rom_size, cbfs_header.align);
file_cbfs_fill_cache(start_of_rom, cbfs_header.rom_size,
cbfs_header.align);
if (file_cbfs_result == CBFS_SUCCESS)
initialized = 1;
}

14
include/cbfs.h
View File

@ -18,16 +18,26 @@ enum cbfs_result {
};
enum cbfs_filetype {
CBFS_TYPE_BOOTBLOCK = 0x01,
CBFS_TYPE_CBFSHEADER = 0x02,
CBFS_TYPE_STAGE = 0x10,
CBFS_TYPE_PAYLOAD = 0x20,
CBFS_TYPE_FIT = 0x21,
CBFS_TYPE_OPTIONROM = 0x30,
CBFS_TYPE_BOOTSPLASH = 0x40,
CBFS_TYPE_RAW = 0x50,
CBFS_TYPE_VSA = 0x51,
CBFS_TYPE_MBI = 0x52,
CBFS_TYPE_MICROCODE = 0x53,
CBFS_COMPONENT_CMOS_DEFAULT = 0xaa,
CBFS_COMPONENT_CMOS_LAYOUT = 0x01aa
CBFS_TYPE_FSP = 0x60,
CBFS_TYPE_MRC = 0x61,
CBFS_TYPE_MMA = 0x62,
CBFS_TYPE_EFI = 0x63,
CBFS_TYPE_STRUCT = 0x70,
CBFS_TYPE_CMOS_DEFAULT = 0xaa,
CBFS_TYPE_SPD = 0xab,
CBFS_TYPE_MRC_CACHE = 0xac,
CBFS_TYPE_CMOS_LAYOUT = 0x01aa
};
struct cbfs_header {

10
include/configs/edison.h
View File

@ -8,13 +8,6 @@
#include <asm/ibmpc.h>
/* ACPI */
/* Boot */
#define CONFIG_BOOTCOMMAND "run bootcmd"
/* DISK Partition support */
/* Miscellaneous configurable options */
#define CONFIG_SYS_CBSIZE 2048
@ -43,9 +36,6 @@
#define CONFIG_ENV_OFFSET_REDUND (6 * 1024 * 1024)
#define CONFIG_SUPPORT_EMMC_BOOT
/* PCI */
#define CONFIG_CMD_PCI
/* RTC */
#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0