apalis_imx6: clean-up and migrate gpios to using driver model
Migrate GPIOs to using driver model, properly request backlight, Ethernet PHY reset, MMC/SD card detect and USB power GPIOs and also enable SION bit in pin muxing for Apalis, backlight, eMMC reset, Ethernet PHY reset and USB power enable GPIOs. While at it also update copyright year, clean-up/re-order includes, add some comments clarifying ifdef scope and do some White-space clean-up. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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@ -2,38 +2,32 @@
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/*
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* Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
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* Copyright (C) 2013, Boundary Devices <info@boundarydevices.com>
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* Copyright (C) 2014-2016, Toradex AG
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* Copyright (C) 2014-2019, Toradex AG
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* copied from nitrogen6x
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*/
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#include <common.h>
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#include <dm.h>
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#include <environment.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/mxc_hdmi.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/mx6-pins.h>
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#include <asm/arch/mx6-ddr.h>
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#include <asm/arch/mx6-pins.h>
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#include <asm/arch/mxc_hdmi.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/bootm.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/mach-imx/iomux-v3.h>
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#include <asm/mach-imx/mxc_i2c.h>
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#include <asm/mach-imx/sata.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/mach-imx/video.h>
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#include <dm/platform_data/serial_mxc.h>
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#include <dm/platdata.h>
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#include <environment.h>
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#include <fsl_esdhc.h>
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#include <i2c.h>
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#include <input.h>
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#include <imx_thermal.h>
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#include <linux/errno.h>
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#include <malloc.h>
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#include <mmc.h>
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#include <micrel.h>
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#include <miiphy.h>
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#include <netdev.h>
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@ -200,7 +194,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = {
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MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(WEAK_PULLUP) | MUX_MODE_SION,
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};
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int mx6_rgmii_rework(struct phy_device *phydev)
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@ -241,7 +235,8 @@ iomux_v3_cfg_t const enet_pads[] = {
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MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
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MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
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/* KSZ9031 PHY Reset */
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MX6_PAD_ENET_CRS_DV__GPIO1_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL),
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MX6_PAD_ENET_CRS_DV__GPIO1_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL) |
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MUX_MODE_SION,
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# define GPIO_ENET_PHY_RESET IMX_GPIO_NR(1, 25)
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};
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@ -253,6 +248,7 @@ static void setup_iomux_enet(void)
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static int reset_enet_phy(struct mii_dev *bus)
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{
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/* Reset KSZ9031 PHY */
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gpio_request(GPIO_ENET_PHY_RESET, "ETH_RESET#");
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gpio_direction_output(GPIO_ENET_PHY_RESET, 0);
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mdelay(10);
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gpio_set_value(GPIO_ENET_PHY_RESET, 1);
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@ -263,15 +259,24 @@ static int reset_enet_phy(struct mii_dev *bus)
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/* mux the Apalis GPIO pins, so they can be used from the U-Boot cmdline */
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iomux_v3_cfg_t const gpio_pads[] = {
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/* Apalis GPIO1 - GPIO8 */
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MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_D5__GPIO2_IO05 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_D7__GPIO2_IO07 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_RB0__GPIO6_IO10 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_WP_B__GPIO6_IO09 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(WEAK_PULLDOWN),
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MX6_PAD_GPIO_6__GPIO1_IO06 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_NANDF_D5__GPIO2_IO05 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_NANDF_D7__GPIO2_IO07 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_NANDF_RB0__GPIO6_IO10 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_NANDF_WP_B__GPIO6_IO09 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(WEAK_PULLDOWN) |
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MUX_MODE_SION,
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MX6_PAD_GPIO_6__GPIO1_IO06 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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};
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static void setup_iomux_gpio(void)
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@ -281,7 +286,7 @@ static void setup_iomux_gpio(void)
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iomux_v3_cfg_t const usb_pads[] = {
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/* USBH_EN */
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MX6_PAD_GPIO_0__GPIO1_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL),
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MX6_PAD_GPIO_0__GPIO1_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL) | MUX_MODE_SION,
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# define GPIO_USBH_EN IMX_GPIO_NR(1, 0)
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/* USB_VBUS_DET */
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MX6_PAD_EIM_D28__GPIO3_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL),
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@ -289,7 +294,7 @@ iomux_v3_cfg_t const usb_pads[] = {
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/* USBO1_ID */
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MX6_PAD_ENET_RX_ER__USB_OTG_ID | MUX_PAD_CTRL(WEAK_PULLUP),
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/* USBO1_EN */
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MX6_PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(NO_PAD_CTRL),
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MX6_PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(NO_PAD_CTRL) | MUX_MODE_SION,
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# define GPIO_USBO_EN IMX_GPIO_NR(3, 22)
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};
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@ -321,7 +326,6 @@ static void setup_iomux_dte_uart(void)
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imx_iomux_v3_setup_multiple_pads(uart1_pads_dte,
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ARRAY_SIZE(uart1_pads_dte));
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}
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static void setup_iomux_dce_uart(void)
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{
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setup_dcemode_uart();
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@ -360,7 +364,7 @@ int board_ehci_power(int port, int on)
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#endif
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#ifdef CONFIG_FSL_ESDHC
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/* use the following sequence: eMMC, MMC, SD */
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/* use the following sequence: eMMC, MMC1, SD1 */
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struct fsl_esdhc_cfg usdhc_cfg[CONFIG_SYS_FSL_USDHC_NUM] = {
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{USDHC3_BASE_ADDR},
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{USDHC1_BASE_ADDR},
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@ -374,10 +378,12 @@ int board_mmc_getcd(struct mmc *mmc)
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switch (cfg->esdhc_base) {
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case USDHC1_BASE_ADDR:
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gpio_request(GPIO_MMC_CD, "MMC_CD");
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gpio_direction_input(GPIO_MMC_CD);
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ret = !gpio_get_value(GPIO_MMC_CD);
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break;
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case USDHC2_BASE_ADDR:
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gpio_request(GPIO_MMC_CD, "SD_CD");
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gpio_direction_input(GPIO_SD_CD);
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ret = !gpio_get_value(GPIO_SD_CD);
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break;
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@ -424,7 +430,7 @@ int board_mmc_init(bd_t *bis)
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}
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return status;
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#else
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#else /* CONFIG_SPL_BUILD */
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struct src *psrc = (struct src *)SRC_BASE_ADDR;
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unsigned reg = readl(&psrc->sbmr1) >> 11;
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/*
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@ -463,9 +469,9 @@ int board_mmc_init(bd_t *bis)
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}
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return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
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#endif
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#endif /* CONFIG_SPL_BUILD */
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}
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#endif
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#endif /* CONFIG_FSL_ESDHC */
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int board_phy_config(struct phy_device *phydev)
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{
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@ -489,6 +495,7 @@ int board_eth_init(bd_t *bis)
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bus = fec_get_miibus(base, -1);
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if (!bus)
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return 0;
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bus->reset = reset_enet_phy;
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/* scan PHY 4,5,6,7 */
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phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII);
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@ -497,6 +504,7 @@ int board_eth_init(bd_t *bis)
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puts("no PHY found\n");
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return 0;
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}
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printf("using PHY at %d\n", phydev->addr);
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ret = fec_probe(bis, -1, base, bus, phydev);
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if (ret) {
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@ -504,7 +512,8 @@ int board_eth_init(bd_t *bis)
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free(phydev);
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free(bus);
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}
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#endif
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#endif /* CONFIG_FEC_MXC */
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return 0;
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}
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@ -520,18 +529,21 @@ static iomux_v3_cfg_t const pwr_intb_pads[] = {
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static iomux_v3_cfg_t const backlight_pads[] = {
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/* Backlight on RGB connector: J15 */
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MX6_PAD_EIM_DA13__GPIO3_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL),
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MX6_PAD_EIM_DA13__GPIO3_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL) |
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MUX_MODE_SION,
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#define RGB_BACKLIGHT_GP IMX_GPIO_NR(3, 13)
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/* additional CPU pin on BKL_PWM, keep in tristate */
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MX6_PAD_EIM_DA14__GPIO3_IO14 | MUX_PAD_CTRL(TRISTATE),
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/* Backlight PWM, used as GPIO in U-Boot */
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MX6_PAD_SD4_DAT2__GPIO2_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
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MX6_PAD_SD4_DAT2__GPIO2_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL) |
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MUX_MODE_SION,
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#define RGB_BACKLIGHTPWM_GP IMX_GPIO_NR(2, 10)
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/* buffer output enable 0: buffer enabled */
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MX6_PAD_EIM_A25__GPIO5_IO02 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_EIM_A25__GPIO5_IO02 | MUX_PAD_CTRL(WEAK_PULLUP) | MUX_MODE_SION,
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#define RGB_BACKLIGHTPWM_OE IMX_GPIO_NR(5, 2)
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/* PSAVE# integrated VDAC */
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MX6_PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL),
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MX6_PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL) |
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MUX_MODE_SION,
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#define VGA_PSAVE_NOT_GP IMX_GPIO_NR(6, 31)
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};
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@ -741,6 +753,9 @@ static void setup_display(void)
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imx_iomux_v3_setup_multiple_pads(backlight_pads,
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ARRAY_SIZE(backlight_pads));
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/* use 0 for EDT 7", use 1 for LG fullHD panel */
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gpio_request(RGB_BACKLIGHTPWM_GP, "BKL1_PWM");
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gpio_request(RGB_BACKLIGHTPWM_OE, "BKL1_PWM_EN");
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gpio_request(RGB_BACKLIGHT_GP, "BKL1_ON");
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gpio_direction_output(RGB_BACKLIGHTPWM_GP, 0);
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gpio_direction_output(RGB_BACKLIGHTPWM_OE, 0);
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gpio_direction_output(RGB_BACKLIGHT_GP, 1);
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@ -1143,7 +1158,6 @@ MX6_MMDC_P0_MDSCR, 0x00000000,
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MX6_MMDC_P0_MAPSR, 0x00011006,
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};
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static void ccgr_init(void)
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{
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struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
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@ -1232,7 +1246,7 @@ void reset_cpu(ulong addr)
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{
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}
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#endif
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#endif /* CONFIG_SPL_BUILD */
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static struct mxc_serial_platdata mxc_serial_plat = {
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.reg = (struct mxc_uart *)UART1_BASE,
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@ -51,6 +51,7 @@ CONFIG_ENV_IS_IN_MMC=y
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CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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CONFIG_DWC_AHSATA=y
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CONFIG_DFU_MMC=y
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CONFIG_DM_GPIO=y
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CONFIG_FSL_ESDHC=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_MICREL=y
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