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Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86

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- Fix parsing of "mtrr list" command
- Introduce USE_EARLY_BOARD_INIT option and remove dead codes for most
  x86 boards
This commit is contained in:
Tom Rini 2020-09-01 11:02:54 -04:00
commit 502f0489f1
37 changed files with 26 additions and 145 deletions
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3
arch/x86/Kconfig
View File

@ -203,6 +203,9 @@ config SPL_X86_32BIT_INIT
help
This is enabled when 32-bit init is in SPL
config USE_EARLY_BOARD_INIT
bool
config RESET_SEG_START
hex
depends on X86_RESET_VECTOR

3
arch/x86/cpu/start.S
View File

@ -88,6 +88,7 @@ _start:
/* Clear the interrupt vectors */
lidt blank_idt_ptr
#ifdef CONFIG_USE_EARLY_BOARD_INIT
/*
* Critical early platform init - generally not used, we prefer init
* to happen later when we have a console, in case something goes
@ -96,6 +97,8 @@ _start:
jmp early_board_init
.globl early_board_init_ret
early_board_init_ret:
#endif
post_code(POST_START)
/* Initialise Cache-As-RAM */

8
arch/x86/include/asm/acpi_nhlt.h
View File

@ -137,14 +137,6 @@ int nhlt_endpoint_add_formats(struct nhlt_endpoint *endpoint,
*/
void nhlt_next_instance(struct nhlt *nhlt, int link_type);
/*
* Serialize NHLT object to ACPI table. Take in the beginning address of where
* the table will reside and return the address of the next ACPI table. On
* error 0 will be returned. The NHLT object is no longer valid after this
* function is called.
*/
uintptr_t nhlt_serialise(struct nhlt *nhlt, uintptr_t acpi_addr);
/*
* Serialize NHLT object to ACPI table. Take in the beginning address of where
* the table will reside oem_id and oem_table_id and return the address of the

2
board/advantech/som-db5800-som-6867/Makefile
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@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Google, Inc
obj-y += som-db5800-som-6867.o start.o
obj-y += som-db5800-som-6867.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o

8
board/advantech/som-db5800-som-6867/start.S
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@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015, Google, Inc
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

2
board/congatec/conga-qeval20-qa3-e3845/Makefile
View File

@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Google, Inc
obj-y += conga-qeval20-qa3.o start.o
obj-y += conga-qeval20-qa3.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o

8
board/congatec/conga-qeval20-qa3-e3845/start.S
View File

@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015, Google, Inc
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

2
board/coreboot/coreboot/Makefile
View File

@ -10,4 +10,4 @@
# (C) Copyright 2002
# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
obj-y += start.o coreboot.o
obj-y += coreboot.o

12
board/coreboot/coreboot/start.S
View File

@ -1,12 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (c) 2011 The Chromium OS Authors.
* (C) Copyright 2008
* Graeme Russ, graeme.russ@gmail.com.
*/
/* board early intialization */
.globl early_board_init
early_board_init:
/* No 32-bit board specific initialisation */
jmp early_board_init_ret

2
board/dfi/dfi-bt700/Makefile
View File

@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Google, Inc
obj-y += dfi-bt700.o start.o
obj-y += dfi-bt700.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o

8
board/dfi/dfi-bt700/start.S
View File

@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015, Google, Inc
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

2
board/efi/efi-x86_payload/Makefile
View File

@ -2,4 +2,4 @@
#
# Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
obj-y += start.o payload.o
obj-y += payload.o

8
board/efi/efi-x86_payload/start.S
View File

@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

2
board/emulation/qemu-x86/Makefile
View File

@ -2,4 +2,4 @@
#
# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
obj-y += start.o
obj-y += qemu-x86.o

0
board/emulation/qemu-x86/qemu-x86.c Normal file
View File

8
board/emulation/qemu-x86/start.S
View File

@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

1
board/google/chromebook_coral/Kconfig
View File

@ -18,6 +18,7 @@ config SYS_TEXT_BASE
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select X86_RESET_VECTOR
select USE_EARLY_BOARD_INIT
select INTEL_APOLLOLAKE
select BOARD_ROMSIZE_KB_16384

1
board/google/chromebook_link/Kconfig
View File

@ -19,6 +19,7 @@ config SYS_TEXT_BASE
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select X86_RESET_VECTOR
select USE_EARLY_BOARD_INIT
select NORTHBRIDGE_INTEL_IVYBRIDGE
select HAVE_INTEL_ME
select BOARD_ROMSIZE_KB_8192

1
board/google/chromebook_samus/Kconfig
View File

@ -19,6 +19,7 @@ config SYS_TEXT_BASE
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select X86_RESET_VECTOR
select USE_EARLY_BOARD_INIT
select INTEL_BROADWELL
select HAVE_INTEL_ME
select BOARD_ROMSIZE_KB_8192

2
board/intel/bayleybay/Makefile
View File

@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
obj-y += bayleybay.o start.o
obj-y += bayleybay.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o

8
board/intel/bayleybay/start.S
View File

@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

2
board/intel/cherryhill/Makefile
View File

@ -2,4 +2,4 @@
#
# Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
obj-y += cherryhill.o start.o
obj-y += cherryhill.o

8
board/intel/cherryhill/start.S
View File

@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

2
board/intel/cougarcanyon2/Makefile
View File

@ -2,4 +2,4 @@
#
# Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
obj-y += cougarcanyon2.o start.o
obj-y += cougarcanyon2.o

8
board/intel/cougarcanyon2/start.S
View File

@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

2
board/intel/crownbay/Makefile
View File

@ -2,4 +2,4 @@
#
# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
obj-y += crownbay.o start.o
obj-y += crownbay.o

8
board/intel/crownbay/start.S
View File

@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

2
board/intel/edison/Makefile
View File

@ -4,5 +4,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += start.o edison.o
obj-y += edison.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o

12
board/intel/edison/start.S
View File

@ -1,12 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (c) 2011 The Chromium OS Authors.
* (C) Copyright 2008
* Graeme Russ, graeme.russ@gmail.com.
*/
/* board early intialization */
.globl early_board_init
early_board_init:
/* No 32-bit board specific initialisation */
jmp early_board_init_ret

2
board/intel/galileo/Makefile
View File

@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
obj-y += galileo.o start.o
obj-y += galileo.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o

8
board/intel/galileo/start.S
View File

@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

2
board/intel/minnowmax/Makefile
View File

@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Google, Inc
obj-y += minnowmax.o start.o
obj-y += minnowmax.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o

8
board/intel/minnowmax/start.S
View File

@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015, Google, Inc
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret

2
board/intel/slimbootloader/Makefile
View File

@ -2,4 +2,4 @@
#
# Copyright (C) 2019 Intel Corporation <www.intel.com>
obj-y += start.o slimbootloader.o
obj-y += slimbootloader.o

9
board/intel/slimbootloader/start.S
View File

@ -1,9 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2019 Intel Corporation <www.intel.com>
*/
/* board early initialization */
.globl early_board_init
early_board_init:
jmp early_board_init_ret

3
cmd/x86/mtrr.c
View File

@ -121,7 +121,8 @@ static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int argc,
if (argc < 1 || !cmd) {
cmd = 'l';
reg = 0;
} else {
}
if (cmd != 'l') {
if (argc < 2)
return CMD_RET_USAGE;
reg = simple_strtoul(argv[1], NULL, 16);

2
drivers/pinctrl/intel/Kconfig
View File

@ -22,7 +22,7 @@ config INTEL_PINCTRL_MULTI_ACPI_DEVICES
Enable this if the pinctrl devices are modelled as multiple,
separate ACPI devices in the ACPI tables. If enabled, the ACPI
devices match the U-Boot pinctrl devices and the pin 'offset' is
relatove to a particular pinctrl device. If disabled, there is a
relative to a particular pinctrl device. If disabled, there is a
single ACPI pinctrl device which includes all U-Boot pinctrl devices
and the pin 'offset' is in effect a global pin number.