Moved mpc8641hpcn_board_reset() out of cpu/ into board/.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This commit is contained in:
Jon Loeliger
parent
b2a941de06
commit
4d3d729c16
@ -25,6 +25,7 @@
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*/
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#include <common.h>
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#include <command.h>
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#include <pci.h>
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#include <asm/processor.h>
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#include <asm/immap_86xx.h>
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@ -35,6 +36,9 @@
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extern void ft_cpu_setup(void *blob, bd_t *bd);
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#endif
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#include "pixis.h"
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#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
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extern void ddr_enable_ecc(unsigned int dram_size);
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#endif
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@ -292,4 +296,93 @@ ft_board_setup(void *blob, bd_t *bd)
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#endif
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void
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mpc8641_reset_board(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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char cmd;
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ulong val;
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ulong corepll;
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if (argc > 1) {
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cmd = argv[1][1];
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switch (cmd) {
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case 'f': /* reset with frequency changed */
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if (argc < 5)
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goto my_usage;
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read_from_px_regs(0);
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val = set_px_sysclk(simple_strtoul(argv[2], NULL, 10));
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corepll = strfractoint(argv[3]);
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val = val + set_px_corepll(corepll);
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val = val + set_px_mpxpll(simple_strtoul(argv[4], NULL, 10));
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if (val == 3) {
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printf("Setting registers VCFGEN0 and VCTL\n");
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read_from_px_regs(1);
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printf("Resetting board with values from VSPEED0, VSPEED1, VCLKH, and VCLKL ....\n");
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set_px_go();
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} else
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goto my_usage;
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while (1); /* Not reached */
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case 'l':
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if (argv[2][1] == 'f') {
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read_from_px_regs(0);
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read_from_px_regs_altbank(0);
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/* reset with frequency changed */
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val = set_px_sysclk(simple_strtoul(argv[3], NULL, 10));
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corepll = strfractoint(argv[4]);
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val = val + set_px_corepll(corepll);
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val = val + set_px_mpxpll(simple_strtoul(argv[5], NULL, 10));
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if (val == 3) {
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printf("Setting registers VCFGEN0, VCFGEN1, VBOOT, and VCTL\n");
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set_altbank();
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read_from_px_regs(1);
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read_from_px_regs_altbank(1);
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printf("Enabling watchdog timer on the FPGA and resetting board with values from VSPEED0, VSPEED1, VCLKH, and VCLKL to boot from the other bank ....\n");
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set_px_go_with_watchdog();
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} else
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goto my_usage;
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while(1); /* Not reached */
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} else if(argv[2][1] == 'd'){
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/* Reset from next bank without changing frequencies but with watchdog timer enabled */
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read_from_px_regs(0);
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read_from_px_regs_altbank(0);
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printf("Setting registers VCFGEN1, VBOOT, and VCTL\n");
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set_altbank();
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read_from_px_regs_altbank(1);
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printf("Enabling watchdog timer on the FPGA and resetting board to boot from the other bank....\n");
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set_px_go_with_watchdog();
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while(1); /* Not reached */
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} else {
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/* Reset from next bank without changing frequency and without watchdog timer enabled */
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read_from_px_regs(0);
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read_from_px_regs_altbank(0);
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if(argc > 2)
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goto my_usage;
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printf("Setting registers VCFGNE1, VBOOT, and VCTL\n");
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set_altbank();
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read_from_px_regs_altbank(1);
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printf("Resetting board to boot from the other bank....\n");
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set_px_go();
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}
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default:
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goto my_usage;
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}
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my_usage:
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printf("\nUsage: reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n");
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printf(" reset altbank [cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>]\n");
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printf("For example: reset cf 40 2.5 10\n");
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printf("See MPC8641HPCN Design Workbook for valid values of command line parameters.\n");
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return;
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} else
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out8(PIXIS_BASE+PIXIS_RST,0);
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}
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@ -32,7 +32,10 @@
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#include <ft_build.h>
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#endif
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#include "../board/mpc8641hpcn/pixis.h"
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#ifdef CONFIG_MPC8641HPCN
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extern void mpc8641_reset_board(cmd_tbl_t *cmdtp, int flag,
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int argc, char *argv[]);
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#endif
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int checkcpu (void)
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@ -146,9 +149,7 @@ soft_restart(unsigned long addr)
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void
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do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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char cmd;
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ulong addr, val;
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ulong corepll;
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ulong addr;
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#ifdef CFG_RESET_ADDRESS
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addr = CFG_RESET_ADDRESS;
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@ -181,86 +182,7 @@ do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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#else /* CONFIG_MPC8641HPCN */
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if (argc > 1) {
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cmd = argv[1][1];
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switch(cmd) {
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case 'f': /* reset with frequency changed */
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if (argc < 5)
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goto my_usage;
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read_from_px_regs(0);
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val = set_px_sysclk(simple_strtoul(argv[2],NULL,10));
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corepll = strfractoint(argv[3]);
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val = val + set_px_corepll(corepll);
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val = val + set_px_mpxpll(simple_strtoul(argv[4],
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NULL, 10));
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if (val == 3) {
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printf("Setting registers VCFGEN0 and VCTL\n");
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read_from_px_regs(1);
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printf("Resetting board with values from VSPEED0, VSPEED1, VCLKH, and VCLKL ....\n");
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set_px_go();
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} else
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goto my_usage;
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while (1); /* Not reached */
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case 'l':
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if (argv[2][1] == 'f') {
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read_from_px_regs(0);
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read_from_px_regs_altbank(0);
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/* reset with frequency changed */
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val = set_px_sysclk(simple_strtoul(argv[3],NULL,10));
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corepll = strfractoint(argv[4]);
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val = val + set_px_corepll(corepll);
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val = val + set_px_mpxpll(simple_strtoul(argv[5],NULL,10));
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if (val == 3) {
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printf("Setting registers VCFGEN0, VCFGEN1, VBOOT, and VCTL\n");
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set_altbank();
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read_from_px_regs(1);
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read_from_px_regs_altbank(1);
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printf("Enabling watchdog timer on the FPGA and resetting board with values from VSPEED0, VSPEED1, VCLKH, and VCLKL to boot from the other bank ....\n");
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set_px_go_with_watchdog();
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} else
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goto my_usage;
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while(1); /* Not reached */
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} else if(argv[2][1] == 'd'){
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/* Reset from next bank without changing frequencies but with watchdog timer enabled */
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read_from_px_regs(0);
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read_from_px_regs_altbank(0);
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printf("Setting registers VCFGEN1, VBOOT, and VCTL\n");
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set_altbank();
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read_from_px_regs_altbank(1);
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printf("Enabling watchdog timer on the FPGA and resetting board to boot from the other bank....\n");
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set_px_go_with_watchdog();
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while(1); /* Not reached */
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} else {
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/* Reset from next bank without changing frequency and without watchdog timer enabled */
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read_from_px_regs(0);
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read_from_px_regs_altbank(0);
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if(argc > 2)
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goto my_usage;
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printf("Setting registers VCFGNE1, VBOOT, and VCTL\n");
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set_altbank();
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read_from_px_regs_altbank(1);
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printf("Resetting board to boot from the other bank....\n");
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set_px_go();
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}
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default:
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goto my_usage;
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}
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my_usage:
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printf("\nUsage: reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n");
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printf(" reset altbank [cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>]\n");
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printf("For example: reset cf 40 2.5 10\n");
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printf("See MPC8641HPCN Design Workbook for valid values of command line parameters.\n");
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return;
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} else
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out8(PIXIS_BASE+PIXIS_RST,0);
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mpc8641_reset_board(cmdtp, flag, argc, argv);
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#endif /* !CONFIG_MPC8641HPCN */
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