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ARM: Factor out reusable psci_cpu_entry

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_sunxi_cpu_entry can be converted completely into a reusable
psci_cpu_entry. Tegra124 will use it as well.

As with psci_disable_smp, also the enabling is designed to be overloaded
in cased SMP is not controlled via ACTLR.

CC: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Tested-by: Ian Campbell <ijc@hellion.org.uk>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Jan Kiszka 2015-04-21 07:18:28 +02:00 committed by Tom Warren
parent b0206e7d26
commit 4ce4de1e66
2 changed files with 25 additions and 18 deletions
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23
arch/arm/cpu/armv7/psci.S
View File

@ -165,6 +165,15 @@ ENTRY(psci_disable_smp)
ENDPROC(psci_disable_smp) ENDPROC(psci_disable_smp)
.weak psci_disable_smp .weak psci_disable_smp
ENTRY(psci_enable_smp)
mrc p15, 0, r0, c1, c0, 1 @ ACTLR
orr r0, r0, #(1 << 6) @ Set SMP bit
mcr p15, 0, r0, c1, c0, 1 @ ACTLR
isb
bx lr
ENDPROC(psci_enable_smp)
.weak psci_enable_smp
ENTRY(psci_cpu_off_common) ENTRY(psci_cpu_off_common)
push {lr} push {lr}
@ -184,4 +193,18 @@ ENTRY(psci_cpu_off_common)
bx lr bx lr
ENDPROC(psci_cpu_off_common) ENDPROC(psci_cpu_off_common)
ENTRY(psci_cpu_entry)
bl psci_enable_smp
bl _nonsec_init
adr r0, _psci_target_pc
ldr r0, [r0]
b _do_nonsec_entry
ENDPROC(psci_cpu_entry)
.globl _psci_target_pc
_psci_target_pc:
.word 0
.popsection .popsection

20
arch/arm/cpu/armv7/sunxi/psci.S
View File

@ -139,7 +139,7 @@ out: mcr p15, 0, r7, c1, c1, 0
@ r2 = target PC @ r2 = target PC
.globl psci_cpu_on .globl psci_cpu_on
psci_cpu_on: psci_cpu_on:
adr r0, _target_pc ldr r0, =_psci_target_pc
str r2, [r0] str r2, [r0]
dsb dsb
@ -151,7 +151,7 @@ psci_cpu_on:
mov r4, #1 mov r4, #1
lsl r4, r4, r1 lsl r4, r4, r1
adr r6, _sunxi_cpu_entry ldr r6, =psci_cpu_entry
str r6, [r0, #0x1a4] @ PRIVATE_REG (boot vector) str r6, [r0, #0x1a4] @ PRIVATE_REG (boot vector)
@ Assert reset on target CPU @ Assert reset on target CPU
@ -197,22 +197,6 @@ psci_cpu_on:
mov r0, #ARM_PSCI_RET_SUCCESS @ Return PSCI_RET_SUCCESS mov r0, #ARM_PSCI_RET_SUCCESS @ Return PSCI_RET_SUCCESS
mov pc, lr mov pc, lr
_target_pc:
.word 0
_sunxi_cpu_entry:
@ Set SMP bit
mrc p15, 0, r0, c1, c0, 1
orr r0, r0, #0x40
mcr p15, 0, r0, c1, c0, 1
isb
bl _nonsec_init
adr r0, _target_pc
ldr r0, [r0]
b _do_nonsec_entry
.globl psci_cpu_off .globl psci_cpu_off
psci_cpu_off: psci_cpu_off:
bl psci_cpu_off_common bl psci_cpu_off_common