leandrof/u-boot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

ls102x: configs - Add hash command in freescale LS1 platforms

Browse Source 
Hardware accelerated support for SHA-1 and SHA-256 has been added.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Ruchika Gupta 2014-10-15 11:39:06 +05:30 committed by York Sun
parent 737537ef0c
commit 4ba4a095da
5 changed files with 39 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/include/asm/arch-ls102xa/config.h
View File

@ -19,6 +19,8 @@
#define CONFIG_SYS_IFC_ADDR (CONFIG_SYS_IMMR + 0x00530000)
#define CONFIG_SYS_FSL_ESDHC_ADDR (CONFIG_SYS_IMMR + 0x00560000)
#define CONFIG_SYS_FSL_SCFG_ADDR (CONFIG_SYS_IMMR + 0x00570000)
#define CONFIG_SYS_FSL_SEC_ADDR (CONFIG_SYS_IMMR + 0x700000)
#define CONFIG_SYS_FSL_JR0_ADDR (CONFIG_SYS_IMMR + 0x710000)
#define CONFIG_SYS_FSL_SERDES_ADDR (CONFIG_SYS_IMMR + 0x00ea0000)
#define CONFIG_SYS_FSL_GUTS_ADDR (CONFIG_SYS_IMMR + 0x00ee0000)
#define CONFIG_SYS_FSL_LS1_CLK_ADDR (CONFIG_SYS_IMMR + 0x00ee1000)
@ -66,6 +68,7 @@
#define CONFIG_SYS_FSL_DSPI_BE
#define CONFIG_SYS_FSL_QSPI_BE
#define CONFIG_SYS_FSL_DCU_BE
#define CONFIG_SYS_FSL_SEC_LE
#define DCU_LAYER_MAX_NUM 16
@ -76,6 +79,7 @@
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8
#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0
#define CONFIG_SYS_FSL_SEC_COMPAT 5
#else
#error SoC not defined
#endif

10
board/freescale/ls1021aqds/ls1021aqds.c
View File

@ -13,6 +13,7 @@
#include <mmc.h>
#include <fsl_esdhc.h>
#include <fsl_ifc.h>
#include <fsl_sec.h>
#include "../common/qixis.h"
#include "ls1021aqds_qixis.h"
@ -213,6 +214,15 @@ int config_serdes_mux(void)
return 0;
}
#if defined(CONFIG_MISC_INIT_R)
int misc_init_r(void)
{
#ifdef CONFIG_FSL_CAAM
return sec_init();
#endif
}
#endif
int board_init(void)
{
struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;

10
board/freescale/ls1021atwr/ls1021atwr.c
View File

@ -16,6 +16,7 @@
#include <netdev.h>
#include <fsl_mdio.h>
#include <tsec.h>
#include <fsl_sec.h>
DECLARE_GLOBAL_DATA_PTR;
@ -280,6 +281,15 @@ int board_init(void)
return 0;
}
#if defined(CONFIG_MISC_INIT_R)
int misc_init_r(void)
{
#ifdef CONFIG_FSL_CAAM
return sec_init();
#endif
}
#endif
void ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);

7
include/configs/ls1021aqds.h
View File

@ -69,6 +69,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_HAS_SERDES
#define CONFIG_FSL_CAAM /* Enable CAAM */
/*
* IFC Definitions
*/
@ -388,4 +389,10 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_OF_BOARD_SETUP
#define CONFIG_CMD_BOOTZ
#define CONFIG_MISC_INIT_R
/* Hash command with SHA acceleration supported in hardware */
#define CONFIG_CMD_HASH
#define CONFIG_SHA_HW_ACCEL
#endif

8
include/configs/ls1021atwr.h
View File

@ -48,6 +48,8 @@
#define CONFIG_SYS_HAS_SERDES
#define CONFIG_FSL_CAAM /* Enable CAAM */
/*
* IFC Definitions
*/
@ -288,4 +290,10 @@
#define CONFIG_OF_BOARD_SETUP
#define CONFIG_CMD_BOOTZ
#define CONFIG_MISC_INIT_R
/* Hash command with SHA acceleration supported in hardware */
#define CONFIG_CMD_HASH
#define CONFIG_SHA_HW_ACCEL
#endif