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arm: socfpga: Move cache_enable to CPU code

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Move icache_enable() and dcache_enable() function calls from
board code into the CPU code and into the enable_caches()
function. This is how the cache enabling code was designed
to work.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
This commit is contained in:
Marek Vasut 2014-09-21 13:57:40 +02:00
parent 97ce274d97
commit 4ab333b765
2 changed files with 10 additions and 3 deletions
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10
arch/arm/cpu/armv7/socfpga/misc.c
View File

@ -33,6 +33,16 @@ int dram_init(void)
return 0;
}
void enable_caches(void)
{
#ifndef CONFIG_SYS_ICACHE_OFF
icache_enable();
#endif
#ifndef CONFIG_SYS_DCACHE_OFF
dcache_enable();
#endif
}
/*
* DesignWare Ethernet initialization
*/

3
board/altera/socfpga/socfpga_cyclone5.c
View File

@ -34,9 +34,6 @@ int board_early_init_f(void)
*/
int board_init(void)
{
icache_enable();
dcache_enable();
/* Address of boot parameters for ATAG (if ATAG is used) */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;