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NAND DaVinci: Update to ALE/CLE Mask values

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All DaVinci SOC's use a CLE mask of 0x10 and an ALE mask of 0x8
except the DM646x. This was decided by the design team driving the design.
This patch updates the CLE and ALE values for DM646x.
Updated patches for DM646x will be sent shortly.
This applies to u-boot-nand-flash git

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This commit is contained in:
Sandeep Paulraj 2009-05-09 12:35:20 -04:00 committed by Scott Wood
parent 0c1684437e
commit 496863b244
1 changed files with 5 additions and 0 deletions
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5
include/asm-arm/arch-davinci/nand_defs.h
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@ -28,8 +28,13 @@
#include <asm/arch/hardware.h>
#ifdef CONFIG_SOC_DM646x
#define MASK_CLE 0x80000
#define MASK_ALE 0x40000
#else
#define MASK_CLE 0x10
#define MASK_ALE 0x08
#endif
#define NAND_READ_START 0x00
#define NAND_READ_END 0x30