i.MX use u-boot baud rate and don't assume UART master clock
1) Change the i.MX serial driver to use the baud rate set in the u-boot environment 2) don't assume a 16MHz value for PERCLK1 in baud rate calculations 3) don't write a 1 to the RDR bit in the USR2 reg. (bit is not "write one to clear" like other status bits in the reg.) Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
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@ -52,6 +52,8 @@ struct imx_serial {
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volatile uint32_t uts;
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volatile uint32_t uts;
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};
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};
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DECLARE_GLOBAL_DATA_PTR;
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void serial_setbrg (void)
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void serial_setbrg (void)
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{
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{
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serial_init();
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serial_init();
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@ -67,6 +69,9 @@ extern void imx_gpio_mode(int gpio_mode);
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int serial_init (void)
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int serial_init (void)
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{
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{
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volatile struct imx_serial* base = (struct imx_serial *)UART_BASE;
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volatile struct imx_serial* base = (struct imx_serial *)UART_BASE;
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unsigned int ufcr_rfdiv;
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unsigned int refclk;
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#ifdef CONFIG_IMX_SERIAL1
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#ifdef CONFIG_IMX_SERIAL1
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imx_gpio_mode(PC11_PF_UART1_TXD);
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imx_gpio_mode(PC11_PF_UART1_TXD);
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imx_gpio_mode(PC12_PF_UART1_RXD);
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imx_gpio_mode(PC12_PF_UART1_RXD);
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@ -95,11 +100,33 @@ int serial_init (void)
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/* Configure FIFOs */
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/* Configure FIFOs */
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base->ufcr = 0xa81;
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base->ufcr = 0xa81;
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/* set the baud rate.
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*
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* baud * 16 x
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* --------- = -
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* refclk y
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*
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* x - 1 = UBIR
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* y - 1 = UBMR
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*
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* each register is 16 bits wide. refclk max is 96 MHz
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*
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*/
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ufcr_rfdiv = ((base->ufcr) & UFCR_RFDIV) >> 7;
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if (ufcr_rfdiv == 6)
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ufcr_rfdiv = 7;
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else
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ufcr_rfdiv = 6 - ufcr_rfdiv;
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refclk = get_PERCLK1();
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refclk /= ufcr_rfdiv;
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/* Set the numerator value minus one of the BRM ratio */
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/* Set the numerator value minus one of the BRM ratio */
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base->ubir = (CONFIG_BAUDRATE / 100) - 1;
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base->ubir = (gd->baudrate / 100) - 1;
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/* Set the denominator value minus one of the BRM ratio */
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/* Set the denominator value minus one of the BRM ratio */
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base->ubmr = 10000 - 1;
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base->ubmr = (refclk/(16 * 100)) - 1;
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/* Set to 8N1 */
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/* Set to 8N1 */
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base->ucr2 &= ~UCR2_PREN;
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base->ucr2 &= ~UCR2_PREN;
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@ -123,8 +150,7 @@ int serial_init (void)
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USR2_WAKE |
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USR2_WAKE |
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USR2_RTSF |
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USR2_RTSF |
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USR2_BRCD |
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USR2_BRCD |
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USR2_ORE |
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USR2_ORE;
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USR2_RDR;
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/* Clear status flags */
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/* Clear status flags */
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base->usr1 |= USR1_PARITYERR |
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base->usr1 |= USR1_PARITYERR |
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