dm: sata: dw_sata: Pass uc_priv to internal functions
With driver model sata_dev_desc[] does not exist. We still want to use the common code of this driver so update it to pass struct ahci_uc_priv * to each of these functions, instead of an integer which must be looked up in sata_dev_desc[]. Signed-off-by: Simon Glass <sjg@chromium.org>
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4b640dbcac
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@ -451,9 +451,8 @@ static int ahci_exec_ata_cmd(struct ahci_uc_priv *uc_priv, u8 port,
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return buf_len;
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}
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static void ahci_set_feature(u8 dev, u8 port)
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static void ahci_set_feature(struct ahci_uc_priv *uc_priv, u8 port)
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{
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struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv;
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struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
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struct sata_fis_h2d *cfis = &h2d;
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@ -545,10 +544,8 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port)
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return 0;
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}
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static void dwc_ahsata_print_info(int dev)
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static void dwc_ahsata_print_info(struct blk_desc *pdev)
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{
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struct blk_desc *pdev = &(sata_dev_desc[dev]);
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printf("SATA Device Info:\n\r");
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#ifdef CONFIG_SYS_64BIT_LBA
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printf("S/N: %s\n\rProduct model number: %s\n\r"
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@ -561,9 +558,8 @@ static void dwc_ahsata_print_info(int dev)
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#endif
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}
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static void dwc_ahsata_identify(int dev, u16 *id)
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static void dwc_ahsata_identify(struct ahci_uc_priv *uc_priv, u16 *id)
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{
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struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv;
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struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
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struct sata_fis_h2d *cfis = &h2d;
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u8 port = uc_priv->hard_port_no;
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@ -579,19 +575,16 @@ static void dwc_ahsata_identify(int dev, u16 *id)
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ata_swap_buf_le16(id, ATA_ID_WORDS);
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}
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static void dwc_ahsata_xfer_mode(int dev, u16 *id)
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static void dwc_ahsata_xfer_mode(struct ahci_uc_priv *uc_priv, u16 *id)
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{
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struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv;
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uc_priv->pio_mask = id[ATA_ID_PIO_MODES];
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uc_priv->udma_mask = id[ATA_ID_UDMA_MODES];
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debug("pio %04x, udma %04x\n\r", uc_priv->pio_mask, uc_priv->udma_mask);
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}
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static u32 dwc_ahsata_rw_cmd(int dev, u32 start, u32 blkcnt,
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u8 *buffer, int is_write)
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static u32 dwc_ahsata_rw_cmd(struct ahci_uc_priv *uc_priv, u32 start,
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u32 blkcnt, u8 *buffer, int is_write)
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{
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struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv;
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struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
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struct sata_fis_h2d *cfis = &h2d;
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u8 port = uc_priv->hard_port_no;
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@ -619,9 +612,8 @@ static u32 dwc_ahsata_rw_cmd(int dev, u32 start, u32 blkcnt,
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return 0;
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}
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static void dwc_ahsata_flush_cache(int dev)
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static void dwc_ahsata_flush_cache(struct ahci_uc_priv *uc_priv)
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{
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struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv;
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struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
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struct sata_fis_h2d *cfis = &h2d;
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u8 port = uc_priv->hard_port_no;
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@ -635,10 +627,9 @@ static void dwc_ahsata_flush_cache(int dev)
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ahci_exec_ata_cmd(uc_priv, port, cfis, NULL, 0, 0);
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}
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static u32 dwc_ahsata_rw_cmd_ext(int dev, u32 start, lbaint_t blkcnt,
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u8 *buffer, int is_write)
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static u32 dwc_ahsata_rw_cmd_ext(struct ahci_uc_priv *uc_priv, u32 start,
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lbaint_t blkcnt, u8 *buffer, int is_write)
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{
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struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv;
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struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
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struct sata_fis_h2d *cfis = &h2d;
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u8 port = uc_priv->hard_port_no;
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@ -671,9 +662,8 @@ static u32 dwc_ahsata_rw_cmd_ext(int dev, u32 start, lbaint_t blkcnt,
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return 0;
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}
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static void dwc_ahsata_flush_cache_ext(int dev)
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static void dwc_ahsata_flush_cache_ext(struct ahci_uc_priv *uc_priv)
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{
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struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv;
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struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
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struct sata_fis_h2d *cfis = &h2d;
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u8 port = uc_priv->hard_port_no;
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@ -687,10 +677,8 @@ static void dwc_ahsata_flush_cache_ext(int dev)
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ahci_exec_ata_cmd(uc_priv, port, cfis, NULL, 0, 0);
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}
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static void dwc_ahsata_init_wcache(int dev, u16 *id)
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static void dwc_ahsata_init_wcache(struct ahci_uc_priv *uc_priv, u16 *id)
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{
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struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv;
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if (ata_id_has_wcache(id) && ata_id_wcache_enabled(id))
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uc_priv->flags |= SATA_FLAG_WCACHE;
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if (ata_id_has_flush(id))
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@ -699,8 +687,9 @@ static void dwc_ahsata_init_wcache(int dev, u16 *id)
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uc_priv->flags |= SATA_FLAG_FLUSH_EXT;
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}
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static u32 ata_low_level_rw_lba48(int dev, u32 blknr, lbaint_t blkcnt,
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const void *buffer, int is_write)
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static u32 ata_low_level_rw_lba48(struct ahci_uc_priv *uc_priv, u32 blknr,
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lbaint_t blkcnt, const void *buffer,
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int is_write)
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{
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u32 start, blks;
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u8 *addr;
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@ -714,15 +703,16 @@ static u32 ata_low_level_rw_lba48(int dev, u32 blknr, lbaint_t blkcnt,
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do {
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if (blks > max_blks) {
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if (max_blks != dwc_ahsata_rw_cmd_ext(dev, start,
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max_blks, addr, is_write))
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if (max_blks != dwc_ahsata_rw_cmd_ext(uc_priv, start,
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max_blks, addr,
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is_write))
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return 0;
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start += max_blks;
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blks -= max_blks;
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addr += ATA_SECT_SIZE * max_blks;
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} else {
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if (blks != dwc_ahsata_rw_cmd_ext(dev, start,
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blks, addr, is_write))
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if (blks != dwc_ahsata_rw_cmd_ext(uc_priv, start, blks,
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addr, is_write))
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return 0;
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start += blks;
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blks = 0;
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@ -733,8 +723,9 @@ static u32 ata_low_level_rw_lba48(int dev, u32 blknr, lbaint_t blkcnt,
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return blkcnt;
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}
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static u32 ata_low_level_rw_lba28(int dev, u32 blknr, lbaint_t blkcnt,
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const void *buffer, int is_write)
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static u32 ata_low_level_rw_lba28(struct ahci_uc_priv *uc_priv, u32 blknr,
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lbaint_t blkcnt, const void *buffer,
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int is_write)
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{
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u32 start, blks;
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u8 *addr;
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@ -747,15 +738,16 @@ static u32 ata_low_level_rw_lba28(int dev, u32 blknr, lbaint_t blkcnt,
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max_blks = ATA_MAX_SECTORS;
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do {
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if (blks > max_blks) {
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if (max_blks != dwc_ahsata_rw_cmd(dev, start,
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max_blks, addr, is_write))
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if (max_blks != dwc_ahsata_rw_cmd(uc_priv, start,
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max_blks, addr,
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is_write))
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return 0;
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start += max_blks;
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blks -= max_blks;
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addr += ATA_SECT_SIZE * max_blks;
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} else {
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if (blks != dwc_ahsata_rw_cmd(dev, start,
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blks, addr, is_write))
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if (blks != dwc_ahsata_rw_cmd(uc_priv, start, blks,
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addr, is_write))
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return 0;
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start += blks;
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blks = 0;
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@ -850,13 +842,14 @@ int sata_port_status(int dev, int port)
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*/
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ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)
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{
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struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv;
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u32 rc;
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if (sata_dev_desc[dev].lba48)
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rc = ata_low_level_rw_lba48(dev, blknr, blkcnt,
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rc = ata_low_level_rw_lba48(uc_priv, blknr, blkcnt,
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buffer, READ_CMD);
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else
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rc = ata_low_level_rw_lba28(dev, blknr, blkcnt,
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rc = ata_low_level_rw_lba28(uc_priv, blknr, blkcnt,
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buffer, READ_CMD);
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return rc;
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}
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@ -868,17 +861,17 @@ ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)
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u32 flags = uc_priv->flags;
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if (sata_dev_desc[dev].lba48) {
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rc = ata_low_level_rw_lba48(dev, blknr, blkcnt,
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buffer, WRITE_CMD);
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rc = ata_low_level_rw_lba48(uc_priv, blknr, blkcnt, buffer,
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WRITE_CMD);
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if ((flags & SATA_FLAG_WCACHE) &&
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(flags & SATA_FLAG_FLUSH_EXT))
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dwc_ahsata_flush_cache_ext(dev);
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dwc_ahsata_flush_cache_ext(uc_priv);
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} else {
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rc = ata_low_level_rw_lba28(dev, blknr, blkcnt,
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buffer, WRITE_CMD);
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rc = ata_low_level_rw_lba28(uc_priv, blknr, blkcnt, buffer,
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WRITE_CMD);
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if ((flags & SATA_FLAG_WCACHE) &&
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(flags & SATA_FLAG_FLUSH))
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dwc_ahsata_flush_cache(dev);
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dwc_ahsata_flush_cache(uc_priv);
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}
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return rc;
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}
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@ -903,7 +896,7 @@ int scan_sata(int dev)
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}
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/* Identify device to get information */
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dwc_ahsata_identify(dev, id);
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dwc_ahsata_identify(uc_priv, id);
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/* Serial number */
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ata_id_c_string(id, serial, ATA_ID_SERNO, sizeof(serial));
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@ -936,17 +929,17 @@ int scan_sata(int dev)
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uc_priv->flags |= ata_id_queue_depth(id);
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/* Get the xfer mode from device */
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dwc_ahsata_xfer_mode(dev, id);
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dwc_ahsata_xfer_mode(uc_priv, id);
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/* Get the write cache status from device */
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dwc_ahsata_init_wcache(dev, id);
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dwc_ahsata_init_wcache(uc_priv, id);
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/* Set the xfer mode to highest speed */
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ahci_set_feature(dev, port);
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ahci_set_feature(uc_priv, port);
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free((void *)id);
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dwc_ahsata_print_info(dev);
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dwc_ahsata_print_info(&sata_dev_desc[dev]);
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is_ready = 1;
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