drivers: i2c: delete an unused source file
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Heiko Schocher <hs@denx.de>
This commit is contained in:
Masahiro Yamada
Heiko Schocher
parent
0b2da7e209
commit
462d1883f7
@ -1,387 +0,0 @@
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/*
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* i2c.c - driver for ADI TWI/I2C
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*
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* Copyright (c) 2006-2013 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <common.h>
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#include <i2c.h>
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#include <asm/clock.h>
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#include <asm/twi.h>
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#include <asm/io.h>
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/* Every register is 32bit aligned, but only 16bits in size */
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#define ureg(name) u16 name; u16 __pad_##name;
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struct twi_regs {
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ureg(clkdiv);
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ureg(control);
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ureg(slave_ctl);
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ureg(slave_stat);
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ureg(slave_addr);
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ureg(master_ctl);
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ureg(master_stat);
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ureg(master_addr);
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ureg(int_stat);
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ureg(int_mask);
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ureg(fifo_ctl);
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ureg(fifo_stat);
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char __pad[0x50];
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ureg(xmt_data8);
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ureg(xmt_data16);
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ureg(rcv_data8);
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ureg(rcv_data16);
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};
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#undef ureg
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/* U-Boot I2C framework allows only one active device at a time. */
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#ifdef TWI_CLKDIV
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#define TWI0_CLKDIV TWI_CLKDIV
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#endif
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static struct twi_regs *twi = (void *)TWI0_CLKDIV;
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#ifdef DEBUG
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# define dmemset(s, c, n) memset(s, c, n)
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#else
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# define dmemset(s, c, n)
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#endif
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#define debugi(fmt, args...) \
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debug( \
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"MSTAT:0x%03x FSTAT:0x%x ISTAT:0x%02x\t%-20s:%-3i: " fmt "\n", \
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twi->master_stat, twi->fifo_stat, twi->int_stat, \
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__func__, __LINE__, ## args)
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#ifdef CONFIG_TWICLK_KHZ
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# error do not define CONFIG_TWICLK_KHZ ... use CONFIG_SYS_I2C_SPEED
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#endif
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/*
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* The way speed is changed into duty often results in integer truncation
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* with 50% duty, so we'll force rounding up to the next duty by adding 1
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* to the max. In practice this will get us a speed of something like
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* 385 KHz. The other limit is easy to handle as it is only 8 bits.
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*/
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#define I2C_SPEED_MAX 400000
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#define I2C_SPEED_TO_DUTY(speed) (5000000 / (speed))
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#define I2C_DUTY_MAX (I2C_SPEED_TO_DUTY(I2C_SPEED_MAX) + 1)
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#define I2C_DUTY_MIN 0xff /* 8 bit limited */
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#define SYS_I2C_DUTY I2C_SPEED_TO_DUTY(CONFIG_SYS_I2C_SPEED)
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/* Note: duty is inverse of speed, so the comparisons below are correct */
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#if SYS_I2C_DUTY < I2C_DUTY_MAX || SYS_I2C_DUTY > I2C_DUTY_MIN
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# error "The Blackfin I2C hardware can only operate 20KHz - 400KHz"
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#endif
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/* All transfers are described by this data structure */
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struct i2c_msg {
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u8 flags;
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#define I2C_M_COMBO 0x4
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#define I2C_M_STOP 0x2
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#define I2C_M_READ 0x1
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int len; /* msg length */
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u8 *buf; /* pointer to msg data */
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int alen; /* addr length */
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u8 *abuf; /* addr buffer */
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};
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/* Allow msec timeout per ~byte transfer */
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#define I2C_TIMEOUT 10
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/**
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* wait_for_completion - manage the actual i2c transfer
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* @msg: the i2c msg
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*/
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static int wait_for_completion(struct i2c_msg *msg)
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{
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u16 int_stat, ctl;
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ulong timebase = get_timer(0);
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do {
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int_stat = readw(&twi->int_stat);
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if (int_stat & XMTSERV) {
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debugi("processing XMTSERV");
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writew(XMTSERV, &twi->int_stat);
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if (msg->alen) {
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writew(*(msg->abuf++), &twi->xmt_data8);
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--msg->alen;
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} else if (!(msg->flags & I2C_M_COMBO) && msg->len) {
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writew(*(msg->buf++), &twi->xmt_data8);
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--msg->len;
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} else {
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ctl = readw(&twi->master_ctl);
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if (msg->flags & I2C_M_COMBO)
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writew(ctl | RSTART | MDIR,
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&twi->master_ctl);
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else
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writew(ctl | STOP, &twi->master_ctl);
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}
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}
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if (int_stat & RCVSERV) {
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debugi("processing RCVSERV");
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writew(RCVSERV, &twi->int_stat);
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if (msg->len) {
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*(msg->buf++) = readw(&twi->rcv_data8);
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--msg->len;
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} else if (msg->flags & I2C_M_STOP) {
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ctl = readw(&twi->master_ctl);
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writew(ctl | STOP, &twi->master_ctl);
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}
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}
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if (int_stat & MERR) {
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debugi("processing MERR");
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writew(MERR, &twi->int_stat);
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return msg->len;
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}
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if (int_stat & MCOMP) {
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debugi("processing MCOMP");
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writew(MCOMP, &twi->int_stat);
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if (msg->flags & I2C_M_COMBO && msg->len) {
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ctl = readw(&twi->master_ctl);
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ctl = (ctl & ~RSTART) |
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(min(msg->len, 0xff) << 6) | MEN | MDIR;
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writew(ctl, &twi->master_ctl);
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} else
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break;
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}
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/* If we were able to do something, reset timeout */
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if (int_stat)
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timebase = get_timer(0);
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} while (get_timer(timebase) < I2C_TIMEOUT);
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return msg->len;
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}
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/**
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* i2c_transfer - setup an i2c transfer
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* @return: 0 if things worked, non-0 if things failed
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*
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* Here we just get the i2c stuff all prepped and ready, and then tail off
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* into wait_for_completion() for all the bits to go.
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*/
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static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
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int len, u8 flags)
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{
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int ret;
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u16 ctl;
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uchar addr_buffer[] = {
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(addr >> 0),
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(addr >> 8),
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(addr >> 16),
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};
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struct i2c_msg msg = {
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.flags = flags | (len >= 0xff ? I2C_M_STOP : 0),
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.buf = buffer,
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.len = len,
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.abuf = addr_buffer,
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.alen = alen,
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};
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dmemset(buffer, 0xff, len);
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debugi("chip=0x%x addr=0x%02x alen=%i buf[0]=0x%02x len=%i ",
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chip, addr, alen, buffer[0], len);
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debugi("flags=0x%02x[%s] ", flags,
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(flags & I2C_M_READ ? "rd" : "wr"));
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/* wait for things to settle */
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while (readw(&twi->master_stat) & BUSBUSY)
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if (ctrlc())
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return 1;
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/* Set Transmit device address */
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writew(chip, &twi->master_addr);
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/* Clear the FIFO before starting things */
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writew(XMTFLUSH | RCVFLUSH, &twi->fifo_ctl);
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writew(0, &twi->fifo_ctl);
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/* prime the pump */
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if (msg.alen) {
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len = (msg.flags & I2C_M_COMBO) ? msg.alen : msg.alen + len;
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debugi("first byte=0x%02x", *msg.abuf);
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writew(*(msg.abuf++), &twi->xmt_data8);
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--msg.alen;
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} else if (!(msg.flags & I2C_M_READ) && msg.len) {
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debugi("first byte=0x%02x", *msg.buf);
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writew(*(msg.buf++), &twi->xmt_data8);
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--msg.len;
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}
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/* clear int stat */
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writew(-1, &twi->master_stat);
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writew(-1, &twi->int_stat);
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writew(0, &twi->int_mask);
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/* Master enable */
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ctl = readw(&twi->master_ctl);
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ctl = (ctl & FAST) | (min(len, 0xff) << 6) | MEN |
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((msg.flags & I2C_M_READ) ? MDIR : 0);
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writew(ctl, &twi->master_ctl);
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/* process the rest */
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ret = wait_for_completion(&msg);
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debugi("ret=%d", ret);
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if (ret) {
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ctl = readw(&twi->master_ctl) & ~MEN;
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writew(ctl, &twi->master_ctl);
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ctl = readw(&twi->control) & ~TWI_ENA;
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writew(ctl, &twi->control);
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ctl = readw(&twi->control) | TWI_ENA;
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writew(ctl, &twi->control);
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}
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return ret;
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}
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/**
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* i2c_set_bus_speed - set i2c bus speed
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* @speed: bus speed (in HZ)
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*/
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int i2c_set_bus_speed(unsigned int speed)
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{
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u16 clkdiv = I2C_SPEED_TO_DUTY(speed);
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/* Set TWI interface clock */
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if (clkdiv < I2C_DUTY_MAX || clkdiv > I2C_DUTY_MIN)
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return -1;
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clkdiv = (clkdiv << 8) | (clkdiv & 0xff);
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writew(clkdiv, &twi->clkdiv);
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/* Don't turn it on */
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writew(speed > 100000 ? FAST : 0, &twi->master_ctl);
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return 0;
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}
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/**
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* i2c_get_bus_speed - get i2c bus speed
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* @speed: bus speed (in HZ)
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*/
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unsigned int i2c_get_bus_speed(void)
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{
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u16 clkdiv = readw(&twi->clkdiv) & 0xff;
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/* 10 MHz / (2 * CLKDIV) -> 5 MHz / CLKDIV */
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return 5000000 / clkdiv;
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}
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/**
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* i2c_init - initialize the i2c bus
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* @speed: bus speed (in HZ)
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* @slaveaddr: address of device in slave mode (0 - not slave)
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*
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* Slave mode isn't actually implemented. It'll stay that way until
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* we get a real request for it.
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*/
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void i2c_init(int speed, int slaveaddr)
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{
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u16 prescale = ((get_i2c_clk() / 1000 / 1000 + 5) / 10) & 0x7F;
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/* Set TWI internal clock as 10MHz */
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writew(prescale, &twi->control);
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/* Set TWI interface clock as specified */
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i2c_set_bus_speed(speed);
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/* Enable it */
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writew(TWI_ENA | prescale, &twi->control);
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debugi("CONTROL:0x%04x CLKDIV:0x%04x", readw(&twi->control),
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readw(&twi->clkdiv));
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#if CONFIG_SYS_I2C_SLAVE
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# error I2C slave support not tested/supported
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#endif
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}
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/**
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* i2c_probe - test if a chip exists at a given i2c address
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* @chip: i2c chip addr to search for
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* @return: 0 if found, non-0 if not found
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*/
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int i2c_probe(uchar chip)
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{
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u8 byte;
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return i2c_read(chip, 0, 0, &byte, 1);
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}
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/**
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* i2c_read - read data from an i2c device
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* @chip: i2c chip addr
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* @addr: memory (register) address in the chip
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* @alen: byte size of address
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* @buffer: buffer to store data read from chip
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* @len: how many bytes to read
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* @return: 0 on success, non-0 on failure
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*/
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int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
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{
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return i2c_transfer(chip, addr, alen, buffer,
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len, (alen ? I2C_M_COMBO : I2C_M_READ));
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}
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/**
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* i2c_write - write data to an i2c device
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* @chip: i2c chip addr
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* @addr: memory (register) address in the chip
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* @alen: byte size of address
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* @buffer: buffer holding data to write to chip
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* @len: how many bytes to write
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* @return: 0 on success, non-0 on failure
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*/
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int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
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{
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return i2c_transfer(chip, addr, alen, buffer, len, 0);
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}
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/**
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* i2c_set_bus_num - change active I2C bus
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* @bus: bus index, zero based
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* @returns: 0 on success, non-0 on failure
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*/
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int i2c_set_bus_num(unsigned int bus)
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{
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switch (bus) {
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#if CONFIG_SYS_MAX_I2C_BUS > 0
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case 0:
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twi = (void *)TWI0_CLKDIV;
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return 0;
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#endif
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#if CONFIG_SYS_MAX_I2C_BUS > 1
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case 1:
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twi = (void *)TWI1_CLKDIV;
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return 0;
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#endif
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#if CONFIG_SYS_MAX_I2C_BUS > 2
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case 2:
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twi = (void *)TWI2_CLKDIV;
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return 0;
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#endif
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default: return -1;
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}
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}
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/**
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* i2c_get_bus_num - returns index of active I2C bus
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*/
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unsigned int i2c_get_bus_num(void)
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{
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switch ((unsigned long)twi) {
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#if CONFIG_SYS_MAX_I2C_BUS > 0
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case TWI0_CLKDIV:
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return 0;
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#endif
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#if CONFIG_SYS_MAX_I2C_BUS > 1
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case TWI1_CLKDIV:
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return 1;
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#endif
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#if CONFIG_SYS_MAX_I2C_BUS > 2
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case TWI2_CLKDIV:
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return 2;
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#endif
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default: return -1;
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}
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}
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