imx: cpu: move speed/temp to common cpu
The i.MX7 cpu speed/temp code could be reused on i.MX8M, so move them to common cpu code. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
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@ -333,6 +333,79 @@ void set_chipselect_size(int const cs_size)
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}
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#endif
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#if defined(CONFIG_MX7)
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/*
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* OCOTP_TESTER3[9:8] (see Fusemap Description Table offset 0x440)
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* defines a 2-bit SPEED_GRADING
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*/
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#define OCOTP_TESTER3_SPEED_SHIFT 8
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#define OCOTP_TESTER3_SPEED_800MHZ 0
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#define OCOTP_TESTER3_SPEED_500MHZ 1
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#define OCOTP_TESTER3_SPEED_1GHZ 2
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#define OCOTP_TESTER3_SPEED_1P2GHZ 3
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u32 get_cpu_speed_grade_hz(void)
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{
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struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
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struct fuse_bank *bank = &ocotp->bank[1];
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struct fuse_bank1_regs *fuse =
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(struct fuse_bank1_regs *)bank->fuse_regs;
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uint32_t val;
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val = readl(&fuse->tester3);
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val >>= OCOTP_TESTER3_SPEED_SHIFT;
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val &= 0x3;
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switch(val) {
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case OCOTP_TESTER3_SPEED_800MHZ:
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return 800000000;
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case OCOTP_TESTER3_SPEED_500MHZ:
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return 500000000;
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case OCOTP_TESTER3_SPEED_1GHZ:
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return 1000000000;
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case OCOTP_TESTER3_SPEED_1P2GHZ:
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return 1200000000;
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}
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return 0;
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}
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/*
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* OCOTP_TESTER3[7:6] (see Fusemap Description Table offset 0x440)
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* defines a 2-bit SPEED_GRADING
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*/
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#define OCOTP_TESTER3_TEMP_SHIFT 6
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u32 get_cpu_temp_grade(int *minc, int *maxc)
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{
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struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
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struct fuse_bank *bank = &ocotp->bank[1];
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struct fuse_bank1_regs *fuse =
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(struct fuse_bank1_regs *)bank->fuse_regs;
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uint32_t val;
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val = readl(&fuse->tester3);
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val >>= OCOTP_TESTER3_TEMP_SHIFT;
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val &= 0x3;
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if (minc && maxc) {
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if (val == TEMP_AUTOMOTIVE) {
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*minc = -40;
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*maxc = 125;
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} else if (val == TEMP_INDUSTRIAL) {
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*minc = -40;
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*maxc = 105;
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} else if (val == TEMP_EXTCOMMERCIAL) {
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*minc = -20;
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*maxc = 105;
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} else {
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*minc = 0;
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*maxc = 95;
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}
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}
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return val;
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}
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#endif
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#ifdef CONFIG_NXP_BOARD_REVISION
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int nxp_board_rev(void)
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{
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@ -97,77 +97,6 @@ struct imx_sec_config_fuse_t const imx_sec_config_fuse = {
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};
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#endif
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/*
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* OCOTP_TESTER3[9:8] (see Fusemap Description Table offset 0x440)
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* defines a 2-bit SPEED_GRADING
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*/
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#define OCOTP_TESTER3_SPEED_SHIFT 8
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#define OCOTP_TESTER3_SPEED_800MHZ 0
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#define OCOTP_TESTER3_SPEED_500MHZ 1
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#define OCOTP_TESTER3_SPEED_1GHZ 2
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#define OCOTP_TESTER3_SPEED_1P2GHZ 3
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u32 get_cpu_speed_grade_hz(void)
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{
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struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
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struct fuse_bank *bank = &ocotp->bank[1];
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struct fuse_bank1_regs *fuse =
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(struct fuse_bank1_regs *)bank->fuse_regs;
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uint32_t val;
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val = readl(&fuse->tester3);
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val >>= OCOTP_TESTER3_SPEED_SHIFT;
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val &= 0x3;
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switch(val) {
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case OCOTP_TESTER3_SPEED_800MHZ:
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return 800000000;
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case OCOTP_TESTER3_SPEED_500MHZ:
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return 500000000;
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case OCOTP_TESTER3_SPEED_1GHZ:
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return 1000000000;
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case OCOTP_TESTER3_SPEED_1P2GHZ:
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return 1200000000;
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}
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return 0;
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}
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/*
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* OCOTP_TESTER3[7:6] (see Fusemap Description Table offset 0x440)
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* defines a 2-bit SPEED_GRADING
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*/
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#define OCOTP_TESTER3_TEMP_SHIFT 6
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u32 get_cpu_temp_grade(int *minc, int *maxc)
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{
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struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
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struct fuse_bank *bank = &ocotp->bank[1];
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struct fuse_bank1_regs *fuse =
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(struct fuse_bank1_regs *)bank->fuse_regs;
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uint32_t val;
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val = readl(&fuse->tester3);
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val >>= OCOTP_TESTER3_TEMP_SHIFT;
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val &= 0x3;
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if (minc && maxc) {
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if (val == TEMP_AUTOMOTIVE) {
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*minc = -40;
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*maxc = 125;
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} else if (val == TEMP_INDUSTRIAL) {
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*minc = -40;
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*maxc = 105;
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} else if (val == TEMP_EXTCOMMERCIAL) {
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*minc = -20;
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*maxc = 105;
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} else {
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*minc = 0;
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*maxc = 95;
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}
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}
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return val;
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}
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static bool is_mx7d(void)
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{
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struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
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