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Merge branch 'master' of /home/stefan/git/u-boot/u-boot into next

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This commit is contained in:
Stefan Roese 2008-07-17 10:41:06 +02:00
commit 42246dacf6
100 changed files with 3339 additions and 907 deletions
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1107
CHANGELOG
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File diff suppressed because it is too large Load Diff

2
CREDITS
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@ -426,7 +426,7 @@ D: FADS823 configuration, MPC823 video support, I2C, wireless keyboard, lots mor
N: Andre Schwarz
E: andre.schwarz@matrix-vision.de
D: Support for Matrix Vision boards (MVBLM7)
D: Support for Matrix Vision boards (MVBLM7/MVBC_P)
N: Robert Schwebel
E: r.schwebel@pengutronix.de

1
MAINTAINERS
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@ -372,6 +372,7 @@ Peter De Schrijver <p2@mind.be>
Andre Schwarz <andre.schwarz@matrix-vision.de>
mvbc_p MPC5200
mvblm7 MPC8343
Timur Tabi <timur@freescale.com>

1
MAKEALL
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@ -48,6 +48,7 @@ LIST_5xxx=" \
mecp5200 \
motionpro \
munices \
MVBC_P \
o2dnt \
pf5200 \
PM520 \

209
Makefile
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@ -23,8 +23,8 @@
VERSION = 1
PATCHLEVEL = 3
SUBLEVEL = 3
EXTRAVERSION =
SUBLEVEL = 4
EXTRAVERSION = -rc1
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
VERSION_FILE = $(obj)include/version_autogenerated.h
@ -493,6 +493,9 @@ aev_config: unconfig
BC3450_config: unconfig
@$(MKCONFIG) -a BC3450 ppc mpc5xxx bc3450
cm5200_config: unconfig
@$(MKCONFIG) -a cm5200 ppc mpc5xxx cm5200
cpci5200_config: unconfig
@$(MKCONFIG) -a cpci5200 ppc mpc5xxx cpci5200 esd
@ -540,9 +543,6 @@ icecube_5100_config: unconfig
jupiter_config: unconfig
@$(MKCONFIG) jupiter ppc mpc5xxx jupiter
v38b_config: unconfig
@$(MKCONFIG) -a v38b ppc mpc5xxx v38b
inka4x0_config: unconfig
@$(MKCONFIG) inka4x0 ppc mpc5xxx inka4x0
@ -617,9 +617,20 @@ prs200_highboot_DDR_config: unconfig
mecp5200_config: unconfig
@$(MKCONFIG) mecp5200 ppc mpc5xxx mecp5200 esd
motionpro_config: unconfig
@$(MKCONFIG) motionpro ppc mpc5xxx motionpro
munices_config: unconfig
@$(MKCONFIG) munices ppc mpc5xxx munices
MVBC_P_config: unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)board/mvbc_p
@ >$(obj)include/config.h
@[ -z "$(findstring MVBC_P,$@)" ] || \
{ echo "#define CONFIG_MVBC_P" >>$(obj)include/config.h; }
@$(MKCONFIG) -n $@ -a MVBC_P ppc mpc5xxx mvbc_p matrix_vision
o2dnt_config: unconfig
@$(MKCONFIG) o2dnt ppc mpc5xxx o2dnt
@ -644,9 +655,6 @@ PM520_ROMBOOT_DDR_config: unconfig
smmaco4_config: unconfig
@$(MKCONFIG) -a smmaco4 ppc mpc5xxx tqm5200 tqc
cm5200_config: unconfig
@$(MKCONFIG) -a cm5200 ppc mpc5xxx cm5200
spieval_config: unconfig
@$(MKCONFIG) -a spieval ppc mpc5xxx tqm5200 tqc
@ -740,15 +748,17 @@ TQM5200_STK100_config: unconfig
{ echo "TEXT_BASE = 0xFFF00000" >$(obj)board/tqm5200/config.tmp ; \
}
@$(MKCONFIG) -n $@ -a TQM5200 ppc mpc5xxx tqm5200 tqc
uc101_config: unconfig
@$(MKCONFIG) uc101 ppc mpc5xxx uc101
motionpro_config: unconfig
@$(MKCONFIG) motionpro ppc mpc5xxx motionpro
v38b_config: unconfig
@$(MKCONFIG) -a v38b ppc mpc5xxx v38b
#########################################################################
## MPC512x Systems
#########################################################################
ads5121_config \
ads5121_rev2_config \
: unconfig
@ -1219,6 +1229,9 @@ CATcenter_33_config: unconfig
}
@$(MKCONFIG) -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave
CMS700_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx cms700 esd
CPCI2DP_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci2dp esd
@ -1403,6 +1416,9 @@ redwood_config: unconfig
sbc405_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx sbc405
sc3_config:unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx sc3
sequoia_config \
rainier_config: unconfig
@mkdir -p $(obj)include
@ -1421,9 +1437,6 @@ rainier_nand_config: unconfig
@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
sc3_config:unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx sc3
taihu_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx taihu amcc
@ -1436,9 +1449,6 @@ VOH405_config: unconfig
VOM405_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx vom405 esd
CMS700_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx cms700 esd
W7OLMC_config \
W7OLMG_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx w7o
@ -1863,9 +1873,6 @@ M5275EVB_config : unconfig
M5282EVB_config : unconfig
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5282evb
TASREG_config : unconfig
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 tasreg esd
M5329AFEE_config \
M5329BFEE_config : unconfig
@case "$@" in \
@ -1985,6 +1992,9 @@ M5485HFE_config : unconfig
fi
@$(MKCONFIG) -a M5485EVB m68k mcf547x_8x m548xevb freescale
TASREG_config : unconfig
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 tasreg esd
#########################################################################
## MPC83xx Systems
#########################################################################
@ -2308,12 +2318,12 @@ PCIPPC2_config \
PCIPPC6_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx pcippc2
ZUMA_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx evb64260
ppmc7xx_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx ppmc7xx
ZUMA_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx evb64260
#========================================================================
# ARM
#========================================================================
@ -2365,12 +2375,12 @@ csb637_config : unconfig
kb9202_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t kb9202 NULL at91rm9200
mp2usb_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t mp2usb NULL at91rm9200
m501sk_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t m501sk NULL at91rm9200
mp2usb_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t mp2usb NULL at91rm9200
#########################################################################
## Atmel ARM926EJ-S Systems
#########################################################################
@ -2407,6 +2417,18 @@ cp922_XA10_config \
cp1026_config: unconfig
@board/integratorcp/split_by_variant.sh $@
davinci_dvevm_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs dv-evm davinci davinci
davinci_schmoogie_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci
davinci_sffsdr_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs sffsdr davinci davinci
davinci_sonata_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
lpd7a400_config \
lpd7a404_config: unconfig
@$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x
@ -2423,21 +2445,6 @@ netstar_config: unconfig
omap1510inn_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm925t omap1510inn
omap5912osk_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs omap5912osk NULL omap
davinci_dvevm_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs dv-evm davinci davinci
davinci_schmoogie_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci
davinci_sffsdr_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs sffsdr davinci davinci
davinci_sonata_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst _cs_autoboot,,$(subst _config,,$1))))
omap1610inn_config \
@ -2461,6 +2468,9 @@ omap1610h2_cs_autoboot_config: unconfig
fi;
@$(MKCONFIG) -a $(call xtract_omap1610xxx,$@) arm arm926ejs omap1610inn NULL omap
omap5912osk_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs omap5912osk NULL omap
xtract_omap730p2 = $(subst _cs0boot,,$(subst _cs3boot,, $(subst _config,,$1)))
omap730p2_config \
@ -2522,9 +2532,16 @@ trab_old_config: unconfig
VCMA9_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t vcma9 mpl s3c24x0
#========================================================================
#########################################################################
# ARM supplied Versatile development boards
#========================================================================
#########################################################################
cm4008_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t cm4008 NULL ks8695
cm41xx_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t cm41xx NULL ks8695
versatile_config \
versatileab_config \
versatilepb_config : unconfig
@ -2533,12 +2550,6 @@ versatilepb_config : unconfig
voiceblue_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm925t voiceblue
cm4008_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t cm4008 NULL ks8695
cm41xx_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t cm41xx NULL ks8695
#########################################################################
## S3C44B0 Systems
#########################################################################
@ -2653,8 +2664,6 @@ zylonite_config :
#########################################################################
## ARM1136 Systems
#########################################################################
omap2420h4_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
apollon_config : unconfig
@mkdir -p $(obj)include
@ -2671,6 +2680,9 @@ imx31_phycore_config : unconfig
mx31ads_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads NULL mx31
omap2420h4_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
#========================================================================
# i386
#========================================================================
@ -2720,6 +2732,7 @@ tb0229_config: unconfig
#########################################################################
## MIPS32 AU1X00
#########################################################################
dbau1000_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_DBAU1000 1" >$(obj)include/config.h
@ -2745,17 +2758,17 @@ dbau1550_el_config : unconfig
@echo "#define CONFIG_DBAU1550 1" >$(obj)include/config.h
@$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
gth2_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_GTH2 1" >$(obj)include/config.h
@$(MKCONFIG) -a gth2 mips mips gth2
pb1000_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_PB1000 1" >$(obj)include/config.h
@$(MKCONFIG) -a pb1x00 mips mips pb1x00
gth2_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_GTH2 1" >$(obj)include/config.h
@$(MKCONFIG) -a gth2 mips mips gth2
qemu_mips_config: unconfig
qemu_mips_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_QEMU_MIPS 1" >$(obj)include/config.h
@$(MKCONFIG) -a qemu-mips mips mips qemu-mips
@ -2774,6 +2787,24 @@ purple_config : unconfig
## Nios32
#########################################################################
ADNPESC1_DNPEVA2_base_32_config \
ADNPESC1_base_32_config \
ADNPESC1_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring _DNPEVA2,$@)" ] || \
{ echo "#define CONFIG_DNPEVA2 1" >>$(obj)include/config.h ; \
$(XECHO) "... DNP/EVA2 configuration" ; \
}
@[ -z "$(findstring _base_32,$@)" ] || \
{ echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
$(XECHO) "... NIOS 'base_32' configuration" ; \
}
@[ -z "$(findstring ADNPESC1_config,$@)" ] || \
{ echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
$(XECHO) "... NIOS 'base_32' configuration (DEFAULT)" ; \
}
@$(MKCONFIG) -a ADNPESC1 nios nios adnpesc1 ssv
DK1C20_safe_32_config \
DK1C20_standard_32_config \
DK1C20_config: unconfig
@ -2815,24 +2846,6 @@ DK1S10_config: unconfig
}
@$(MKCONFIG) -a DK1S10 nios nios dk1s10 altera
ADNPESC1_DNPEVA2_base_32_config \
ADNPESC1_base_32_config \
ADNPESC1_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring _DNPEVA2,$@)" ] || \
{ echo "#define CONFIG_DNPEVA2 1" >>$(obj)include/config.h ; \
$(XECHO) "... DNP/EVA2 configuration" ; \
}
@[ -z "$(findstring _base_32,$@)" ] || \
{ echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
$(XECHO) "... NIOS 'base_32' configuration" ; \
}
@[ -z "$(findstring ADNPESC1_config,$@)" ] || \
{ echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
$(XECHO) "... NIOS 'base_32' configuration (DEFAULT)" ; \
}
@$(MKCONFIG) -a ADNPESC1 nios nios adnpesc1 ssv
#########################################################################
## Nios-II
#########################################################################
@ -2853,21 +2866,19 @@ PCI5441_config : unconfig
@$(MKCONFIG) PCI5441 nios2 nios2 pci5441 psyent
#========================================================================
# MicroBlaze
#========================================================================
#########################################################################
## Microblaze
#########################################################################
suzaku_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_SUZAKU 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno
#========================================================================
ml401_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_ML401 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) microblaze microblaze ml401 xilinx
suzaku_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_SUZAKU 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno
xupv2p_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_XUPV2P 1" > $(obj)include/config.h
@ -2890,9 +2901,9 @@ $(BFIN_BOARDS):
#========================================================================
# AVR32
#========================================================================
#########################################################################
## AT32AP70xx
#########################################################################
atngw100_config : unconfig
@$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
atstk1002_config : unconfig
@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
@ -2906,16 +2917,14 @@ atstk1004_config : unconfig
atstk1006_config : unconfig
@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
atngw100_config : unconfig
@$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
#########################################################################
#########################################################################
#########################################################################
#========================================================================
# SH3 (SuperH)
#========================================================================
#########################################################################
## sh3 (Renesas SuperH)
#########################################################################
mpr2_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MPR2 1" > $(obj)include/config.h
@ -2929,6 +2938,12 @@ ms7720se_config: unconfig
#########################################################################
## sh4 (Renesas SuperH)
#########################################################################
MigoR_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MIGO_R 1" > $(obj)include/config.h
@./mkconfig -a $(@:_config=) sh sh4 MigoR
ms7750se_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MS7750SE 1" > $(obj)include/config.h
@ -2939,21 +2954,16 @@ ms7722se_config : unconfig
@echo "#define CONFIG_MS7722SE 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) sh sh4 ms7722se
MigoR_config : unconfig
r2dplus_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MIGO_R 1" > $(obj)include/config.h
@./mkconfig -a $(@:_config=) sh sh4 MigoR
@echo "#define CONFIG_R2DPLUS 1" > $(obj)include/config.h
@./mkconfig -a $(@:_config=) sh sh4 r2dplus
r7780mp_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_R7780MP 1" > $(obj)include/config.h
@./mkconfig -a $(@:_config=) sh sh4 r7780mp
r2dplus_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_R2DPLUS 1" > $(obj)include/config.h
@./mkconfig -a $(@:_config=) sh sh4 r2dplus
sh7763rdp_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_SH7763RDP 1" > $(obj)include/config.h
@ -2962,6 +2972,7 @@ sh7763rdp_config : unconfig
#========================================================================
# SPARC
#========================================================================
#########################################################################
## LEON3
#########################################################################

72
board/BuS/EB+MCF-EV123/EB+MCF-EV123.c
View File

@ -41,51 +41,51 @@ int checkboard (void)
phys_size_t initdram (int board_type)
{
int size,i;
int size, i;
size = 0;
MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6
| MCFSDRAMC_DCR_RC((15 * CFG_CLK)>>4);
#ifdef CFG_SDRAM_BASE0
MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6
| MCFSDRAMC_DCR_RC ((15 * CFG_CLK) >> 4);
#ifdef CFG_SDRAM_BASE0
MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE(CFG_SDRAM_BASE0)
| MCFSDRAMC_DACR_CASL(1)
| MCFSDRAMC_DACR_CBM(3)
| MCFSDRAMC_DACR_PS_16);
MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE (CFG_SDRAM_BASE0)
| MCFSDRAMC_DACR_CASL (1)
| MCFSDRAMC_DACR_CBM (3)
| MCFSDRAMC_DACR_PS_16;
MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M
| MCFSDRAMC_DMR_V;
MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP;
MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP;
*(unsigned short *)(CFG_SDRAM_BASE0) = 0xA5A5;
MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE;
for (i=0; i < 2000; i++)
asm(" nop");
mbar_writeLong(MCFSDRAMC_DACR0, mbar_readLong(MCFSDRAMC_DACR0)
| MCFSDRAMC_DACR_IMRS);
*(unsigned int *)(CFG_SDRAM_BASE0 + 0x220) = 0xA5A5;
size += CFG_SDRAM_SIZE * 1024 * 1024;
#endif
#ifdef CFG_SDRAM_BASE1
MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE(CFG_SDRAM_BASE1)
| MCFSDRAMC_DACR_CASL(1)
| MCFSDRAMC_DACR_CBM(3)
| MCFSDRAMC_DACR_PS_16;
*(unsigned short *) (CFG_SDRAM_BASE0) = 0xA5A5;
MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE;
for (i = 0; i < 2000; i++)
asm (" nop");
mbar_writeLong (MCFSDRAMC_DACR0,
mbar_readLong (MCFSDRAMC_DACR0) | MCFSDRAMC_DACR_IMRS);
*(unsigned int *) (CFG_SDRAM_BASE0 + 0x220) = 0xA5A5;
size += CFG_SDRAM_SIZE * 1024 * 1024;
#endif
#ifdef CFG_SDRAM_BASE1
MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE (CFG_SDRAM_BASE1)
| MCFSDRAMC_DACR_CASL (1)
| MCFSDRAMC_DACR_CBM (3)
| MCFSDRAMC_DACR_PS_16;
MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M
| MCFSDRAMC_DMR_V;
MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP;
MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP;
*(unsigned short *)(CFG_SDRAM_BASE1) = 0xA5A5;
MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE;
for (i=0; i < 2000; i++)
asm(" nop");
MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS;
*(unsigned int *)(CFG_SDRAM_BASE1 + 0x220) = 0xA5A5;
size += CFG_SDRAM_SIZE1 * 1024 * 1024;
#endif
*(unsigned short *) (CFG_SDRAM_BASE1) = 0xA5A5;
MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE;
for (i = 0; i < 2000; i++)
asm (" nop");
MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS;
*(unsigned int *) (CFG_SDRAM_BASE1 + 0x220) = 0xA5A5;
size += CFG_SDRAM_SIZE1 * 1024 * 1024;
#endif
return size;
}

2
board/BuS/EB+MCF-EV123/cfm_flash.c
View File

@ -173,7 +173,7 @@ int cfm_flash_write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cn
dest = cmf_backdoor_address(addr);
while ((cnt>=4) && (rc == ERR_OK))
{
data =*((volatile u32 *) src);
data = *((volatile u32 *) src);
*(volatile u32*) dest = data;
MCFCFM_CMD = MCFCFM_CMD_PGM;
MCFCFM_USTAT = MCFCFM_USTAT_CBEIF;

2
board/BuS/EB+MCF-EV123/flash.c
View File

@ -348,7 +348,7 @@ int amd_flash_write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt
dest = addr;
while ((cnt>=2) && (rc == ERR_OK))
{
data =*((volatile u16 *) src);
data = *((volatile u16 *) src);
rc=amd_write_word (info,dest,data);
src +=2;
dest +=2;

4
board/MAI/AmigaOneG3SE/ps2kbd.c
View File

@ -229,7 +229,7 @@ int drv_isa_kbd_init (void)
device_t kbddev ;
char *stdinname = getenv ("stdin");
if(isa_kbd_init()==-1)
if(isa_kbd_init() == -1)
return -1;
memset (&kbddev, 0, sizeof(kbddev));
strcpy(kbddev.name, DEVNAME);
@ -515,7 +515,7 @@ int kbd_read_data(void)
int val;
unsigned char status;
val=-1;
val = -1;
status = kbd_read_status();
if (status & KBD_STAT_OBF) {
val = kbd_read_input();

8
board/MAI/AmigaOneG3SE/usb_uhci.c
View File

@ -518,7 +518,7 @@ void usb_check_int_chain(void)
uhci_td_t *td,*prevtd;
for(i=0;i<8;i++) {
prevtd=&td_int[i]; /* the first previous td is the skeleton td */
prevtd = &td_int[i]; /* the first previous td is the skeleton td */
link=swap_32(td_int[i].link) & 0xfffffff0; /* next in chain */
td=(uhci_td_t *)link; /* assign it */
/* all interrupt TDs are finally linked to the td_int[0].
@ -595,7 +595,7 @@ int usb_lowlevel_init(void)
busdevfunc=pci_find_device(USB_UHCI_VEND_ID,USB_UHCI_DEV_ID,0); /* get PCI Device ID */
if(busdevfunc==-1) {
if(busdevfunc == -1) {
printf("Error USB UHCI (%04X,%04X) not found\n",USB_UHCI_VEND_ID,USB_UHCI_DEV_ID);
return -1;
}
@ -642,12 +642,12 @@ int usb_lowlevel_init(void)
*/
int usb_lowlevel_stop(void)
{
if(irqvec==-1)
if(irqvec == -1)
return 1;
irq_free_handler(irqvec);
irq_free_handler(0);
reset_hc();
irqvec=-1;
irqvec = -1;
return 0;
}

66
board/MAI/menu/menu.c
View File

@ -1,66 +0,0 @@
#include "menu.h"
#define SINGLE_BOX 0
#define DOUBLE_BOX 1
void video_draw_box(int style, int attr, char *title, int separate, int x, int y, int w, int h);
void video_draw_text(int x, int y, int attr, char *text);
void video_save_rect(int x, int y, int w, int h, void *save_area, int clearchar, int clearattr);
void video_restore_rect(int x, int y, int w, int h, void *save_area);
int video_rows(void);
int video_cols(void);
#define MAX_MENU_OPTIONS 200
typedef struct
{
int used; /* flag if this entry is used */
int entry_x; /* Character column of the menu entry */
int entry_y; /* Character line of the entry */
int option_x; /* Character colum of the option (entry is same) */
} option_data_t;
option_data_t odata[MAX_MENU_OPTIONS];
int normal_attr = 0x0F;
int select_attr = 0x2F;
int disabled_attr = 0x07;
menu_t *root_menu;
int menu_init (menu_t *root)
{
char *s;
int i;
s = getenv("menu_normal");
if (s) normal_attr = atoi(s);
s = getenv("menu_select");
if (s) select_attr = atoi(s);
s = getenv("menu_disabled");
if (s) disabled_attr = atoi(s);
for (i=0; i<MAX_MENU_OPTIONS; i++) odata[i].used = 0;
root_menu = root;
}
option_data_t *menu_alloc_odata(void)
{
int i;
for (int i=0; i<MAX_MENU_OPTIONS; i++)
{
if (odata[i].used == 0) return &odata[i];
}
return NULL;
}
void menu_free_odata(option_data_t *odata)
{
odata->used = 0;
}
void menu_layout (menu_t *menu)
{

162
board/MAI/menu/menu.h
View File

@ -1,162 +0,0 @@
#ifndef MENU_H
#define MENU_H
/* A single menu */
typedef void (*menu_finish_callback)(struct menu_s *menu);
typedef struct menu_s {
char *name; /* Menu name */
int num_options; /* Number of options in this menu */
int flags; /* Various flags - see below */
int option_align; /* Aligns options to a field width of this much characters if != 0 */
struct menu_option_s **options; /* Pointer to this menu's options */
menu_finish_callback callback; /* Called when the menu closes */
} menu_t;
/*
* type: Type of the option (see below)
* name: Name to display for this option
* help: Optional help string
* id : optional id number
* sys : pointer for system-specific data, init to NULL and don't touch
*/
#define OPTION_PREAMBLE \
int type; \
char *name; \
char *help; \
int id; \
void *sys;
/*
* Menu option types.
* There are a number of different layouts for menu options depending
* on their types. Currently there are the following possibilities:
*
* Submenu:
* This entry links to a new menu.
*
* Boolean:
* A simple on/off toggle entry. Booleans can be either yes/no, 0/1 or on/off.
* Optionally, this entry can enable/disable a set of other options. An example would
* be to enable/disable on-board USB, and if enabled give access to further options like
* irq settings, base address etc.
*
* Text:
* A single line/limited number of characters text entry box. Text can be restricted
* to a certain charset (digits/hex digits/all/custom). Result is also available as an
* int if numeric.
*
* Selection:
* One-of-many type of selection entry. User may choose on of a set of strings, which
* maps to a specific value for the variable.
*
* Routine:
* Selecting this calls an entry-specific routine. This can be used for saving contents etc.
*
* Custom:
* Display and behaviour of this entry is defined by a set of callbacks.
*/
#define MENU_SUBMENU_TYPE 0
typedef struct menu_submenu_s
{
OPTION_PREAMBLE
menu_t * submenu; /* Pointer to the submenu */
} menu_submenu_t;
#define MENU_BOOLEAN_TYPE 1
typedef struct menu_boolean_s
{
OPTION_PREAMBLE
char *variable; /* Name of the variable to getenv()/setenv() */
int subtype; /* Subtype (on/off, 0/1, yes/no, enable/disable), see below */
int mutex; /* Bit mask of options to enable/disable. Bit 0 is the option
immediately following this one, bit 1 is the next one etc.
bit 7 = 0 means to disable when this option is off,
bit 7 = 1 means to disable when this option is on.
An option is disabled when the type field's upper bit is set */
} menu_boolean_t;
/* BOOLEAN Menu flags */
#define MENU_BOOLEAN_ONOFF 0x01
#define MENU_BOOLEAN_01 0x02
#define MENU_BOOLEAN_YESNO 0x03
#define MENU_BOOLEAN_ENDIS 0x04
#define MENU_BOOLEAN_TYPE_MASK 0x07
#define MENU_TEXT_TYPE 2
typedef struct menu_text_s
{
OPTION_PREAMBLE
char *variable; /* Name of the variable to getenv()/setenv() */
int maxchars; /* Max number of characters */
char *charset; /* Optional charset to use */
int flags; /* Flags - see below */
} menu_text_t;
/* TEXT entry menu flags */
#define MENU_TEXT_NUMERIC 0x01
#define MENU_TEXT_HEXADECIMAL 0x02
#define MENU_TEXT_FREE 0x03
#define MENU_TEXT_TYPE_MASK 0x07
#define MENU_SELECTION_TYPE 3
typedef struct menu_select_option_s {
char *map_from; /* Map this variable contents ... */
char *map_to; /* ... to this menu text and vice versa */
} menu_select_option_t;
typedef struct menu_select_s {
OPTION_PREAMBLE int num_options; /* Number of mappings */
menu_select_option_t **options;
/* Option list array */
} menu_select_t;
#define MENU_ROUTINE_TYPE 4
typedef void (*menu_routine_callback) (struct menu_routine_s *);
typedef struct menu_routine_s {
OPTION_PREAMBLE menu_routine_callback callback;
/* routine to be called */
void *user_data; /* User data, don't care for system */
} menu_routine_t;
#define MENU_CUSTOM_TYPE 5
typedef void (*menu_custom_draw) (struct menu_custom_s *);
typedef void (*menu_custom_key) (struct menu_custom_s *, int);
typedef struct menu_custom_s {
OPTION_PREAMBLE menu_custom_draw drawfunc;
menu_custom_key keyfunc;
void *user_data;
} menu_custom_t;
/*
* The menu option superstructure
*/
typedef struct menu_option_s {
union {
menu_submenu_t m_sub_menu;
menu_boolean_t m_boolean;
menu_text_t m_text;
menu_select_t m_select;
menu_routine_t m_routine;
};
} menu_option_t;
/* Init the menu system. Returns <0 on error */
int menu_init(menu_t *root);
/* Execute a single menu. Returns <0 on error */
int menu_do(menu_t *menu);
#endif

2
board/ads5121/README
View File

@ -5,5 +5,3 @@ ability and set the correct frequency and memory configuration.
To configure for the older Rev 2 ADS5121 type (this will not have PCI)
make ads5121_rev2_config

9
board/davinci/dv-evm/dv_board.c
View File

@ -29,14 +29,10 @@
#include <asm/arch/hardware.h>
#include <asm/arch/emac_defs.h>
#define MACH_TYPE_DAVINCI_EVM 901
DECLARE_GLOBAL_DATA_PTR;
extern void i2c_init(int speed, int slaveaddr);
extern void timer_init(void);
extern int eth_hw_init(void);
extern phy_t phy;
/* Works on Always On power domain only (no PD argument) */
@ -187,11 +183,8 @@ int misc_init_r (void)
}
}
if (!eth_hw_init()) {
if (!eth_hw_init())
printf("ethernet init failed!\n");
} else {
printf("ETH PHY : %s\n", phy.name);
}
i2c_read (0x39, 0x00, 1, (u_int8_t *)&i, 1);

9
board/davinci/schmoogie/dv_board.c
View File

@ -29,14 +29,10 @@
#include <asm/arch/hardware.h>
#include <asm/arch/emac_defs.h>
#define MACH_TYPE_SCHMOOGIE 1255
DECLARE_GLOBAL_DATA_PTR;
extern void i2c_init(int speed, int slaveaddr);
extern void timer_init(void);
extern int eth_hw_init(void);
extern phy_t phy;
/* Works on Always On power domain only (no PD argument) */
@ -233,11 +229,8 @@ int misc_init_r (void)
forceenv("serial#", (char *)&tmp[0]);
}
if (!eth_hw_init()) {
if (!eth_hw_init())
printf("ethernet init failed!\n");
} else {
printf("ETH PHY : %s\n", phy.name);
}
return(0);
}

6
board/davinci/sffsdr/sffsdr.c
View File

@ -43,7 +43,6 @@ DECLARE_GLOBAL_DATA_PTR;
extern void timer_init(void);
extern int eth_hw_init(void);
extern phy_t phy;
/* Works on Always On power domain only (no PD argument) */
@ -288,11 +287,8 @@ int misc_init_r(void)
}
}
if (!eth_hw_init()) {
if (!eth_hw_init())
printf("Ethernet init failed\n");
} else {
printf("ETH PHY: %s\n", phy.name);
}
/* On this platform, U-Boot is copied in RAM by the UBL,
* so we are always in the relocated state. */

9
board/davinci/sonata/dv_board.c
View File

@ -29,14 +29,10 @@
#include <asm/arch/hardware.h>
#include <asm/arch/emac_defs.h>
#define MACH_TYPE_SONATA 1254
DECLARE_GLOBAL_DATA_PTR;
extern void i2c_init(int speed, int slaveaddr);
extern void timer_init(void);
extern int eth_hw_init(void);
extern phy_t phy;
/* Works on Always On power domain only (no PD argument) */
@ -188,11 +184,8 @@ int misc_init_r (void)
}
}
if (!eth_hw_init()) {
if (!eth_hw_init())
printf("ethernet init failed!\n");
} else {
printf("ETH PHY : %s\n", phy.name);
}
return(0);
}

91
board/eltec/elppc/eepro100_srom.c
View File

@ -31,82 +31,83 @@
#include <net.h>
#include "srom.h"
extern int eepro100_write_eeprom (struct eth_device* dev,
int location, int addr_len, unsigned short data);
extern int eepro100_write_eeprom (struct eth_device *dev,
int location, int addr_len,
unsigned short data);
/*----------------------------------------------------------------------------*/
unsigned short eepro100_srom_checksum (unsigned short *sromdata)
{
unsigned short sum = 0;
unsigned int i;
unsigned short sum = 0;
unsigned int i;
for (i = 0; i < (EE_SIZE-1); i++)
{
sum += sromdata[i];
}
return (EE_CHECKSUM - sum);
for (i = 0; i < (EE_SIZE - 1); i++) {
sum += sromdata[i];
}
return (EE_CHECKSUM - sum);
}
/*----------------------------------------------------------------------------*/
int eepro100_srom_store (unsigned short *source)
{
int count;
struct eth_device onboard_dev;
int count;
struct eth_device onboard_dev;
/* get onboard network iobase */
pci_read_config_dword(PCI_BDF(0,0x10,0), PCI_BASE_ADDRESS_0,
(unsigned int *)&onboard_dev.iobase);
onboard_dev.iobase &= ~0xf;
/* get onboard network iobase */
pci_read_config_dword (PCI_BDF (0, 0x10, 0), PCI_BASE_ADDRESS_0,
(unsigned int *) &onboard_dev.iobase);
onboard_dev.iobase &= ~0xf;
source[63] = eepro100_srom_checksum (source);
source[63] = eepro100_srom_checksum (source);
for (count=0; count < EE_SIZE; count++)
{
if ( eepro100_write_eeprom ((struct eth_device*)&onboard_dev,
count, EE_ADDR_BITS, SROM_SHORT(source)) == -1 )
return -1;
source++;
}
return 0;
for (count = 0; count < EE_SIZE; count++) {
if (eepro100_write_eeprom ((struct eth_device *) &onboard_dev,
count, EE_ADDR_BITS,
SROM_SHORT (source)) == -1) {
return -1;
}
source++;
}
return 0;
}
/*----------------------------------------------------------------------------*/
#ifdef EEPRO100_SROM_CHECK
extern int read_eeprom (struct eth_device* dev, int location, int addr_len);
extern int read_eeprom (struct eth_device *dev, int location, int addr_len);
void eepro100_srom_load (unsigned short *destination)
{
int count;
struct eth_device onboard_dev;
int count;
struct eth_device onboard_dev;
#ifdef DEBUG
int lr = 0;
printf ("eepro100_srom_download:\n");
int lr = 0;
printf ("eepro100_srom_download:\n");
#endif
/* get onboard network iobase */
pci_read_config_dword(PCI_BDF(0,0x10,0), PCI_BASE_ADDRESS_0,
&onboard_dev.iobase);
onboard_dev.iobase &= ~0xf;
/* get onboard network iobase */
pci_read_config_dword (PCI_BDF (0, 0x10, 0), PCI_BASE_ADDRESS_0,
&onboard_dev.iobase);
onboard_dev.iobase &= ~0xf;
memset (destination, 0x65, 128);
memset (destination, 0x65, 128);
for (count=0; count < 0x40; count++)
{
*destination++ = read_eeprom (struct eth_device*)&onboard_dev,
count, EE_ADDR_BITS);
for (count = 0; count < 0x40; count++) {
*destination++ = read_eeprom ((struct eth_device *) &onboard_dev,
count, EE_ADDR_BITS);
#ifdef DEBUG
printf ("%04x ", *(destination - 1));
if (lr++ == 7)
{
printf("\n");
lr = 0;
printf ("%04x ", *(destination - 1));
if (lr++ == 7) {
printf ("\n");
lr = 0;
}
#endif
}
#endif
}
}
#endif /* EEPRO100_SROM_CHECK */

4
board/esd/cpci750/sdram_init.c
View File

@ -1570,8 +1570,8 @@ dram_size(long int *base, long int maxsize)
for (cnt = STARTVAL/sizeof(long); cnt < maxsize/sizeof(long); cnt <<= 1) {
addr = base + cnt; /* pointer arith! */
save1=*addr; /* save contents of addr */
save2=*b; /* save contents of base */
save1 = *addr; /* save contents of addr */
save2 = *b; /* save contents of base */
*addr=cnt; /* write cnt to addr */
*b=0; /* put null at base */

4
board/evb64260/eth.c
View File

@ -163,7 +163,7 @@ gt6426x_eth_receive(struct eth_dev_s *p,unsigned int icr)
int eth_len=0;
char *eth_data;
eth0_rx_desc_single *rx=&p->eth_rx_desc[(p->rdn)];
eth0_rx_desc_single *rx = &p->eth_rx_desc[(p->rdn)];
INVALIDATE_DCACHE((unsigned int)rx,(unsigned int)(rx+1));
@ -252,7 +252,7 @@ gt6426x_eth_transmit(void *v, volatile char *p, unsigned int s)
#ifdef DEBUG
unsigned int old_command_stat,old_psr;
#endif
eth0_tx_desc_single *tx=&dev->eth_tx_desc[dev->tdn];
eth0_tx_desc_single *tx = &dev->eth_tx_desc[dev->tdn];
/* wait for tx to be ready */
INVALIDATE_DCACHE((unsigned int)tx,(unsigned int)(tx+1));

2
board/evb64260/mpsc.c
View File

@ -259,7 +259,7 @@ char mpsc_getchar (void)
int
mpsc_test_char(void)
{
volatile unsigned int *p=&rx_desc_base[rx_desc_index*8];
volatile unsigned int *p = &rx_desc_base[rx_desc_index*8];
INVALIDATE_DCACHE(&p[1], &p[2]);

576
board/freescale/common/sys_eeprom.c
View File

@ -1,7 +1,8 @@
/*
* Copyright 2006 Freescale Semiconductor
* Copyright 2006, 2008 Freescale Semiconductor
* York Sun (yorksun@freescale.com)
* Haiying Wang (haiying.wang@freescale.com)
* Timur Tabi (timur@freescale.com)
*
* See file CREDITS for list of people who contributed to this
* project.
@ -27,258 +28,441 @@
#include <i2c.h>
#include <linux/ctype.h>
typedef struct {
u8 id[4]; /* 0x0000 - 0x0003 EEPROM Tag */
u8 sn[12]; /* 0x0004 - 0x000F Serial Number */
u8 errata[5]; /* 0x0010 - 0x0014 Errata Level */
u8 date[6]; /* 0x0015 - 0x001a Build Date */
u8 res_0; /* 0x001b Reserved */
u8 version[4]; /* 0x001c - 0x001f Version */
u8 tempcal[8]; /* 0x0020 - 0x0027 Temperature Calibration Factors*/
u8 tempcalsys[2]; /* 0x0028 - 0x0029 System Temperature Calibration Factors*/
u8 res_1[22]; /* 0x0020 - 0x003f Reserved */
u8 mac_size; /* 0x0040 Mac table size */
u8 mac_flag; /* 0x0041 Mac table flags */
u8 mac[8][6]; /* 0x0042 - 0x0071 Mac addresses */
u32 crc; /* 0x0072 crc32 checksum */
} EEPROM_data;
#include "../common/eeprom.h"
static EEPROM_data mac_data;
#if !defined(CFG_I2C_EEPROM_CCID) && !defined(CFG_I2C_EEPROM_NXID)
#error "Please define either CFG_I2C_EEPROM_CCID or CFG_I2C_EEPROM_NXID"
#endif
int mac_show(void)
/**
* static eeprom: EEPROM layout for CCID or NXID formats
*
* See application note AN3638 for details.
*/
static struct __attribute__ ((__packed__)) eeprom {
#ifdef CFG_I2C_EEPROM_CCID
u8 id[4]; /* 0x00 - 0x03 EEPROM Tag 'CCID' */
u8 major; /* 0x04 Board revision, major */
u8 minor; /* 0x05 Board revision, minor */
u8 sn[10]; /* 0x06 - 0x0F Serial Number*/
u8 errata[2]; /* 0x10 - 0x11 Errata Level */
u8 date[6]; /* 0x12 - 0x17 Build Date */
u8 res_0[40]; /* 0x18 - 0x3f Reserved */
u8 mac_count; /* 0x40 Number of MAC addresses */
u8 mac_flag; /* 0x41 MAC table flags */
u8 mac[8][6]; /* 0x42 - 0x71 MAC addresses */
u32 crc; /* 0x72 CRC32 checksum */
#endif
#ifdef CFG_I2C_EEPROM_NXID
u8 id[4]; /* 0x00 - 0x03 EEPROM Tag 'NXID' */
u8 sn[12]; /* 0x04 - 0x0F Serial Number */
u8 errata[5]; /* 0x10 - 0x14 Errata Level */
u8 date[6]; /* 0x15 - 0x1a Build Date */
u8 res_0; /* 0x1b Reserved */
u32 version; /* 0x1c - 0x1f NXID Version */
u8 tempcal[8]; /* 0x20 - 0x27 Temperature Calibration Factors */
u8 tempcalsys[2]; /* 0x28 - 0x29 System Temperature Calibration Factors */
u8 tempcalflags; /* 0x2a Temperature Calibration Flags */
u8 res_1[21]; /* 0x2b - 0x3f Reserved */
u8 mac_count; /* 0x40 Number of MAC addresses */
u8 mac_flag; /* 0x41 MAC table flags */
u8 mac[8][6]; /* 0x42 - 0x71 MAC addresses */
u32 crc; /* 0x72 CRC32 checksum */
#endif
} e;
/* Set to 1 if we've read EEPROM into memory */
static int has_been_read = 0;
#ifdef CFG_I2C_EEPROM_NXID
/* Is this a valid NXID EEPROM? */
#define is_valid (*((u32 *)e.id) == (('N' << 24) | ('X' << 16) | ('I' << 8) | 'D'))
#endif
#ifdef CFG_I2C_EEPROM_CCID
/* Is this a valid CCID EEPROM? */
#define is_valid (*((u32 *)e.id) == (('C' << 24) | ('C' << 16) | ('I' << 8) | 'D'))
#endif
/**
* show_eeprom - display the contents of the EEPROM
*/
static void show_eeprom(void)
{
int i;
u8 mac_size;
unsigned char ethaddr[8][18];
unsigned char enetvar[32];
unsigned int crc;
/* Show EEPROM tagID,
* always the four characters 'NXID'.
*/
printf("ID ");
for (i = 0; i < 4; i++)
printf("%c", mac_data.id[i]);
printf("\n");
/* EEPROM tag ID, either CCID or NXID */
#ifdef CFG_I2C_EEPROM_NXID
printf("ID: %c%c%c%c v%u\n", e.id[0], e.id[1], e.id[2], e.id[3],
be32_to_cpu(e.version));
#else
printf("ID: %c%c%c%c\n", e.id[0], e.id[1], e.id[2], e.id[3]);
#endif
/* Show Serial number,
* 0 to 11 charaters of errata information.
*/
printf("SN ");
for (i = 0; i < 12; i++)
printf("%c", mac_data.sn[i]);
printf("\n");
/* Serial number */
printf("SN: %s\n", e.sn);
/* Show Errata Level,
* 0 to 4 characters of errata information.
*/
printf("Errata ");
for (i = 0; i < 5; i++)
printf("%c", mac_data.errata[i]);
printf("\n");
/* Errata level. */
#ifdef CFG_I2C_EEPROM_NXID
printf("Errata: %s\n", e.errata);
#else
printf("Errata: %c%c\n",
e.errata[0] ? e.errata[0] : '.',
e.errata[1] ? e.errata[1] : '.');
#endif
/* Show Build Date,
* BCD date values, as YYMMDDhhmmss.
*/
printf("Date 20%02x/%02x/%02x %02x:%02x:%02x\n",
mac_data.date[0],
mac_data.date[1],
mac_data.date[2],
mac_data.date[3],
mac_data.date[4],
mac_data.date[5]);
/* Build date, BCD date values, as YYMMDDhhmmss */
printf("Build date: 20%02x/%02x/%02x %02x:%02x:%02x %s\n",
e.date[0], e.date[1], e.date[2],
e.date[3] & 0x7F, e.date[4], e.date[5],
e.date[3] & 0x80 ? "PM" : "");
/* Show MAC table size,
* Value from 0 to 7 indicating how many MAC
* addresses are stored in the system EEPROM.
*/
if((mac_data.mac_size > 0) && (mac_data.mac_size <= 8))
mac_size = mac_data.mac_size;
/* Show MAC addresses */
for (i = 0; i < min(e.mac_count, 8); i++) {
u8 *p = e.mac[i];
printf("Eth%u: %02x:%02x:%02x:%02x:%02x:%02x\n", i,
p[0], p[1], p[2], p[3], p[4], p[5]);
}
crc = crc32(0, (void *)&e, sizeof(e) - 4);
if (crc == be32_to_cpu(e.crc))
printf("CRC: %08x\n", be32_to_cpu(e.crc));
else
mac_size = 8; /* Set the max size */
printf("MACSIZE %x\n", mac_size);
/* Show Mac addresses */
for (i = 0; i < mac_size; i++) {
sprintf((char *)ethaddr[i],
"%02x:%02x:%02x:%02x:%02x:%02x",
mac_data.mac[i][0],
mac_data.mac[i][1],
mac_data.mac[i][2],
mac_data.mac[i][3],
mac_data.mac[i][4],
mac_data.mac[i][5]);
printf("MAC %d %s\n", i, ethaddr[i]);
sprintf((char *)enetvar,
i ? "eth%daddr" : "ethaddr", i);
setenv((char *)enetvar, (char *)ethaddr[i]);
printf("CRC: %08x (should be %08x)\n",
be32_to_cpu(e.crc), crc);
#ifdef DEBUG
printf("EEPROM dump: (0x%x bytes)\n", sizeof(e));
for (i = 0; i < sizeof(e); i++) {
if ((i % 16) == 0)
printf("%02X: ", i);
printf("%02X ", ((u8 *)&e)[i]);
if (((i % 16) == 15) || (i == sizeof(e) - 1))
printf("\n");
}
return 0;
#endif
}
int mac_read(void)
/**
* read_eeprom - read the EEPROM into memory
*/
static int read_eeprom(void)
{
int ret, length;
unsigned int crc = 0;
unsigned char dev = ID_EEPROM_ADDR, *data;
int ret;
#ifdef CFG_EEPROM_BUS_NUM
unsigned int bus;
#endif
length = sizeof(EEPROM_data);
ret = i2c_read(dev, 0, 1, (unsigned char *)(&mac_data), length);
if (ret) {
printf("Read failed.\n");
return -1;
}
if (has_been_read)
return 0;
data = (unsigned char *)(&mac_data);
printf("Check CRC on reading ...");
crc = crc32(crc, data, length - 4);
if (crc != mac_data.crc) {
printf("CRC checksum is invalid, in EEPROM CRC is %x, calculated CRC is %x\n",
mac_data.crc, crc);
return -1;
} else {
printf("CRC OK\n");
mac_show();
}
return 0;
#ifdef CFG_EEPROM_BUS_NUM
bus = i2c_get_bus_num();
i2c_set_bus_num(CFG_EEPROM_BUS_NUM);
#endif
ret = i2c_read(CFG_I2C_EEPROM_ADDR, 0, CFG_I2C_EEPROM_ADDR_LEN,
(void *)&e, sizeof(e));
#ifdef CFG_EEPROM_BUS_NUM
i2c_set_bus_num(bus);
#endif
#ifdef DEBUG
show_eeprom();
#endif
has_been_read = (ret == 0) ? 1 : 0;
return ret;
}
int mac_prog(void)
/**
* prog_eeprom - write the EEPROM from memory
*/
static int prog_eeprom(void)
{
int ret, i, length;
unsigned int crc = 0;
unsigned char dev = ID_EEPROM_ADDR, *ptr;
unsigned char *eeprom_data = (unsigned char *)(&mac_data);
unsigned int crc;
void *p;
#ifdef CFG_EEPROM_BUS_NUM
unsigned int bus;
#endif
mac_data.res_0 = 0;
memset((void *)mac_data.res_1, 0, sizeof(mac_data.res_1));
/* Set the reserved values to 0xFF */
#ifdef CFG_I2C_EEPROM_NXID
e.res_0 = 0xFF;
memset(e.res_1, 0xFF, sizeof(e.res_1));
#else
memset(e.res_0, 0xFF, sizeof(e.res_0));
#endif
length = sizeof(EEPROM_data);
crc = crc32(crc, eeprom_data, length - 4);
mac_data.crc = crc;
for (i = 0, ptr = eeprom_data; i < length; i += 8, ptr += 8) {
ret = i2c_write(dev, i, 1, ptr, min((length - i),8));
udelay(5000); /* 5ms write cycle timing */
length = sizeof(e);
crc = crc32(0, (void *)&e, length - 4);
e.crc = cpu_to_be32(crc);
#ifdef CFG_EEPROM_BUS_NUM
bus = i2c_get_bus_num();
i2c_set_bus_num(CFG_EEPROM_BUS_NUM);
#endif
for (i = 0, p = &e; i < length; i += 8, p += 8) {
ret = i2c_write(CFG_I2C_EEPROM_ADDR, i, CFG_I2C_EEPROM_ADDR_LEN,
p, min((length - i), 8));
if (ret)
break;
udelay(5000); /* 5ms write cycle timing */
}
#ifdef CFG_EEPROM_BUS_NUM
i2c_set_bus_num(bus);
#endif
if (ret) {
printf("Programming failed.\n");
return -1;
} else {
printf("Programming %d bytes. Reading back ...\n", length);
mac_read();
}
printf("Programming passed.\n");
return 0;
}
int do_mac(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
/**
* h2i - converts hex character into a number
*
* This function takes a hexadecimal character (e.g. '7' or 'C') and returns
* the integer equivalent.
*/
static inline u8 h2i(char p)
{
if ((p >= '0') && (p <= '9'))
return p - '0';
if ((p >= 'A') && (p <= 'F'))
return (p - 'A') + 10;
if ((p >= 'a') && (p <= 'f'))
return (p - 'a') + 10;
return 0;
}
/**
* set_date - stores the build date into the EEPROM
*
* This function takes a pointer to a string in the format "YYMMDDhhmmss"
* (2-digit year, 2-digit month, etc), converts it to a 6-byte BCD string,
* and stores it in the build date field of the EEPROM local copy.
*/
static void set_date(const char *string)
{
unsigned int i;
if (strlen(string) != 12) {
printf("Usage: mac date YYMMDDhhmmss\n");
return;
}
for (i = 0; i < 6; i++)
e.date[i] = h2i(string[2 * i]) << 4 | h2i(string[2 * i + 1]);
}
/**
* set_mac_address - stores a MAC address into the EEPROM
*
* This function takes a pointer to MAC address string
* (i.e."XX:XX:XX:XX:XX:XX", where "XX" is a two-digit hex number) and
* stores it in one of the MAC address fields of the EEPROM local copy.
*/
static void set_mac_address(unsigned int index, const char *string)
{
char *p = (char *) string;
unsigned int i;
if (!string) {
printf("Usage: mac <n> XX:XX:XX:XX:XX:XX\n");
return;
}
for (i = 0; *p && (i < 6); i++) {
e.mac[index][i] = simple_strtoul(p, &p, 16);
if (*p == ':')
p++;
}
}
int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int i;
char cmd = 's';
unsigned long long mac_val;
char cmd;
if (i2c_probe(ID_EEPROM_ADDR) != 0)
return -1;
if (argc == 1) {
show_eeprom();
return 0;
}
if (argc > 1) {
cmd = argv[1][0];
cmd = argv[1][0];
if (cmd == 'r') {
read_eeprom();
return 0;
}
if ((cmd == 'i') && (argc > 2)) {
for (i = 0; i < 4; i++)
e.id[i] = argv[2][i];
return 0;
}
if (!is_valid) {
printf("Please read the EEPROM ('r') and/or set the ID ('i') first.\n");
return 0;
}
if (argc == 2) {
switch (cmd) {
case 'r': /* display */
mac_read();
break;
case 's': /* save */
mac_prog();
prog_eeprom();
break;
case 'i': /* id */
for (i = 0; i < 4; i++) {
mac_data.id[i] = argv[2][i];
}
break;
case 'n': /* serial number */
for (i = 0; i < 12; i++) {
mac_data.sn[i] = argv[2][i];
}
break;
case 'e': /* errata */
for (i = 0; i < 5; i++) {
mac_data.errata[i] = argv[2][i];
}
break;
case 'd': /* date */
mac_val = simple_strtoull(argv[2], NULL, 16);
for (i = 0; i < 6; i++) {
mac_data.date[i] = (mac_val >> (40 - 8 * i));
}
break;
case 'p': /* mac table size */
mac_data.mac_size =
(unsigned char)simple_strtoul(argv[2], NULL, 16);
break;
case '0': /* mac 0 */
case '1': /* mac 1 */
case '2': /* mac 2 */
case '3': /* mac 3 */
case '4': /* mac 4 */
case '5': /* mac 5 */
case '6': /* mac 6 */
case '7': /* mac 7 */
mac_val = simple_strtoull(argv[2], NULL, 16);
for (i = 0; i < 6; i++) {
mac_data.mac[cmd - '0'][i] =
*((unsigned char *)
(((unsigned int)(&mac_val)) + i + 2));
}
break;
case 'h': /* help */
default:
printf("Usage:\n%s\n", cmdtp->usage);
break;
}
} else {
mac_show();
return 0;
}
/* We know we have at least one parameter */
switch (cmd) {
case 'n': /* serial number */
memset(e.sn, 0, sizeof(e.sn));
strncpy((char *)e.sn, argv[2], sizeof(e.sn) - 1);
break;
case 'e': /* errata */
#ifdef CFG_I2C_EEPROM_NXID
memset(e.errata, 0, 5);
strncpy((char *)e.errata, argv[2], 4);
#else
e.errata[0] = argv[2][0];
e.errata[1] = argv[2][1];
#endif
break;
case 'd': /* date BCD format YYMMDDhhmmss */
set_date(argv[2]);
break;
case 'p': /* MAC table size */
e.mac_count = simple_strtoul(argv[2], NULL, 16);
break;
case '0' ... '7': /* "mac 0" through "mac 7" */
set_mac_address(cmd - '0', argv[2]);
break;
case 'h': /* help */
default:
printf("Usage:\n%s\n", cmdtp->usage);
break;
}
return 0;
}
/**
* mac_read_from_eeprom - read the MAC addresses from EEPROM
*
* This function reads the MAC addresses from EEPROM and sets the
* appropriate environment variables for each one read.
*
* The environment variables are only set if they haven't been set already.
* This ensures that any user-saved variables are never overwritten.
*
* This function must be called after relocation.
*/
int mac_read_from_eeprom(void)
{
int length, i;
unsigned char dev = ID_EEPROM_ADDR;
unsigned char *data;
unsigned char ethaddr[4][18];
unsigned char enetvar[32];
unsigned int crc = 0;
unsigned int i;
length = sizeof(EEPROM_data);
if (i2c_read(dev, 0, 1, (unsigned char *)(&mac_data), length)) {
if (read_eeprom()) {
printf("Read failed.\n");
return -1;
}
data = (unsigned char *)(&mac_data);
crc = crc32(crc, data, length - 4);
if (crc != mac_data.crc) {
if (!is_valid) {
printf("Invalid ID (%02x %02x %02x %02x)\n", e.id[0], e.id[1], e.id[2], e.id[3]);
return -1;
} else {
for (i = 0; i < 4; i++) {
if (memcmp(&mac_data.mac[i], "\0\0\0\0\0\0", 6)) {
sprintf((char *)ethaddr[i],
"%02x:%02x:%02x:%02x:%02x:%02x",
mac_data.mac[i][0],
mac_data.mac[i][1],
mac_data.mac[i][2],
mac_data.mac[i][3],
mac_data.mac[i][4],
mac_data.mac[i][5]);
sprintf((char *)enetvar,
i ? "eth%daddr" : "ethaddr",
i);
setenv((char *)enetvar, (char *)ethaddr[i]);
}
}
if (be32_to_cpu(e.crc) != 0xFFFFFFFF) {
u32 crc = crc32(0, (void *)&e, sizeof(e) - 4);
if (crc != be32_to_cpu(e.crc)) {
printf("CRC mismatch (%08x != %08x).\n", crc,
be32_to_cpu(e.crc));
return -1;
}
}
for (i = 0; i < min(4, e.mac_count); i++) {
if (memcmp(&e.mac[i], "\0\0\0\0\0\0", 6) &&
memcmp(&e.mac[i], "\xFF\xFF\xFF\xFF\xFF\xFF", 6)) {
char ethaddr[18];
char enetvar[9];
sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X",
e.mac[i][0],
e.mac[i][1],
e.mac[i][2],
e.mac[i][3],
e.mac[i][4],
e.mac[i][5]);
sprintf(enetvar, i ? "eth%daddr" : "ethaddr", i);
/* Only initialize environment variables that are blank
* (i.e. have not yet been set)
*/
if (!getenv(enetvar))
setenv(enetvar, ethaddr);
}
}
return 0;
}
#ifdef CFG_I2C_EEPROM_CCID
/**
* get_cpu_board_revision - get the CPU board revision on 85xx boards
*
* Read the EEPROM to determine the board revision.
*
* This function is called before relocation, so we need to read a private
* copy of the EEPROM into a local variable on the stack.
*
* Also, we assume that CFG_EEPROM_BUS_NUM == CFG_SPD_BUS_NUM. The global
* variable i2c_bus_num must be compile-time initialized to CFG_SPD_BUS_NUM,
* so that the SPD code will work. This means that all pre-relocation I2C
* operations can only occur on the CFG_SPD_BUS_NUM bus. So if
* CFG_EEPROM_BUS_NUM != CFG_SPD_BUS_NUM, then we can't read the EEPROM when
* this function is called. Oh well.
*/
unsigned int get_cpu_board_revision(void)
{
struct board_eeprom {
u32 id; /* 0x00 - 0x03 EEPROM Tag 'CCID' */
u8 major; /* 0x04 Board revision, major */
u8 minor; /* 0x05 Board revision, minor */
} be;
i2c_read(CFG_I2C_EEPROM_ADDR, 0, CFG_I2C_EEPROM_ADDR_LEN,
(void *)&be, sizeof(be));
if (be.id != (('C' << 24) | ('C' << 16) | ('I' << 8) | 'D'))
return MPC85XX_CPU_BOARD_REV(0, 0);
if ((be.major == 0xff) && (be.minor == 0xff))
return MPC85XX_CPU_BOARD_REV(0, 0);
return MPC85XX_CPU_BOARD_REV(e.major, e.minor);
}
#endif

2
board/freescale/mpc8544ds/law.c
View File

@ -30,7 +30,7 @@
struct law_entry law_table[] = {
SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI),
SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI),
SET_LAW(CFG_LBC_CACHE_BASE, LAWAR_SIZE_256M, LAW_TRGT_IF_LBC),
SET_LAW(CFG_LBC_NONCACHE_BASE, LAWAR_SIZE_128M, LAW_TRGT_IF_LBC),
SET_LAW(CFG_PCIE1_MEM_PHYS, LAWAR_SIZE_256M, LAW_TRGT_IF_PCIE_1),
SET_LAW(CFG_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_1),
SET_LAW(CFG_PCIE2_MEM_PHYS, LAWAR_SIZE_512M, LAW_TRGT_IF_PCIE_2),

5
board/freescale/mpc8544ds/mpc8544ds.c
View File

@ -49,7 +49,10 @@ int checkboard (void)
if ((uint)&gur->porpllsr != 0xe00e0000) {
printf("immap size error %lx\n",(ulong)&gur->porpllsr);
}
printf ("Board: MPC8544DS\n");
printf ("Board: MPC8544DS, System ID: 0x%02x, "
"System Version: 0x%02x, FPGA Version: 0x%02x\n",
in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER),
in8(PIXIS_BASE + PIXIS_PVER));
lbc->ltesr = 0xffffffff; /* Clear LBC error interrupts */
lbc->lteir = 0xffffffff; /* Enable LBC error interrupts */

12
board/freescale/mpc8544ds/tlb.c
View File

@ -79,21 +79,13 @@ struct fsl_e_tlb_entry tlb_table[] = {
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 4, BOOKE_PAGESZ_64M, 1),
#ifdef CFG_LBC_CACHE_BASE
/*
* TLB 5: 64M Cacheable, non-guarded
*/
SET_TLB_ENTRY(1, CFG_LBC_CACHE_BASE, CFG_LBC_CACHE_BASE,
MAS3_SX|MAS3_SW|MAS3_SR, 0,
0, 5, BOOKE_PAGESZ_64M, 1),
#endif
/*
* TLB 6: 64M Non-cacheable, guarded
* TLB 5: 64M Non-cacheable, guarded
* 0xf8000000 64M PIXIS 0xF8000000 - 0xFBFFFFFF
*/
SET_TLB_ENTRY(1, CFG_LBC_NONCACHE_BASE, CFG_LBC_NONCACHE_BASE,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 6, BOOKE_PAGESZ_64M, 1),
0, 5, BOOKE_PAGESZ_64M, 1),
};
int num_tlb_entries = ARRAY_SIZE(tlb_table);

1
board/freescale/mpc8544ds/u-boot.lds
View File

@ -71,6 +71,7 @@ SECTIONS
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
drivers/bios_emulator/atibios.o (.text)
*(.text)
*(.fixup)
*(.got1)

50
board/matrix_vision/mvbc_p/Makefile Normal file
View File

@ -0,0 +1,50 @@
#
# (C) Copyright 2003
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# (C) Copyright 2004-2008
# Matrix-Vision GmbH, info@matrix-vision.de
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := $(BOARD).o fpga.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
include $(SRCTREE)/rules.mk
sinclude $(obj).depend

30
board/matrix_vision/mvbc_p/config.mk Normal file
View File

@ -0,0 +1,30 @@
#
# (C) Copyright 2003
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
ifndef TEXT_BASE
TEXT_BASE = 0xFF800000
endif
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board

177
board/matrix_vision/mvbc_p/fpga.c Normal file
View File

@ -0,0 +1,177 @@
/*
* (C) Copyright 2002
* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
* Keith Outwater, keith_outwater@mvis.com.
*
* (C) Copyright 2008
* Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <ACEX1K.h>
#include <command.h>
#include "fpga.h"
#include "mvbc_p.h"
#ifdef FPGA_DEBUG
#define fpga_debug(fmt, args...) printf("%s: "fmt, __func__, ##args)
#else
#define fpga_debug(fmt, args...)
#endif
Altera_CYC2_Passive_Serial_fns altera_fns = {
fpga_null_fn,
fpga_config_fn,
fpga_status_fn,
fpga_done_fn,
fpga_wr_fn,
fpga_null_fn,
fpga_null_fn,
0
};
Altera_desc cyclone2 = {
Altera_CYC2,
passive_serial,
Altera_EP2C8_SIZE,
(void *) &altera_fns,
NULL,
0
};
DECLARE_GLOBAL_DATA_PTR;
int mvbc_p_init_fpga(void)
{
fpga_debug("Initialize FPGA interface (reloc 0x%.8lx)\n",
gd->reloc_off);
fpga_init(gd->reloc_off);
fpga_add(fpga_altera, &cyclone2);
fpga_config_fn(0, 1, 0);
udelay(60);
return 1;
}
int fpga_null_fn(int cookie)
{
return 0;
}
int fpga_config_fn(int assert, int flush, int cookie)
{
struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
u32 dvo = gpio->simple_dvo;
fpga_debug("SET config : %s\n", assert ? "low" : "high");
if (assert)
dvo |= FPGA_CONFIG;
else
dvo &= ~FPGA_CONFIG;
if (flush)
gpio->simple_dvo = dvo;
return assert;
}
int fpga_done_fn(int cookie)
{
struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
int result = 0;
udelay(10);
fpga_debug("CONF_DONE check ... ");
if (gpio->simple_ival & FPGA_CONF_DONE) {
fpga_debug("high\n");
result = 1;
} else
fpga_debug("low\n");
return result;
}
int fpga_status_fn(int cookie)
{
struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
int result = 0;
fpga_debug("STATUS check ... ");
if (gpio->sint_ival & FPGA_STATUS) {
fpga_debug("high\n");
result = 1;
} else
fpga_debug("low\n");
return result;
}
int fpga_clk_fn(int assert_clk, int flush, int cookie)
{
struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
u32 dvo = gpio->simple_dvo;
fpga_debug("CLOCK %s\n", assert_clk ? "high" : "low");
if (assert_clk)
dvo |= FPGA_CCLK;
else
dvo &= ~FPGA_CCLK;
if (flush)
gpio->simple_dvo = dvo;
return assert_clk;
}
static inline int _write_fpga(u8 val)
{
int i;
struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
u32 dvo = gpio->simple_dvo;
for (i=0; i<8; i++) {
dvo &= ~FPGA_CCLK;
gpio->simple_dvo = dvo;
dvo &= ~FPGA_DIN;
if (val & 1)
dvo |= FPGA_DIN;
gpio->simple_dvo = dvo;
dvo |= FPGA_CCLK;
gpio->simple_dvo = dvo;
val >>= 1;
}
return 0;
}
int fpga_wr_fn(void *buf, size_t len, int flush, int cookie)
{
unsigned char *data = (unsigned char *) buf;
int i;
fpga_debug("fpga_wr: buf %p / size %d\n", buf, len);
for (i = 0; i < len; i++)
_write_fpga(data[i]);
fpga_debug("\n");
return FPGA_SUCCESS;
}

34
board/matrix_vision/mvbc_p/fpga.h Normal file
View File

@ -0,0 +1,34 @@
/*
* (C) Copyright 2002
* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
* Keith Outwater, keith_outwater@mvis.com.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
extern int mvbc_p_init_fpga(void);
extern int fpga_pgm_fn(int assert_pgm, int flush, int cookie);
extern int fpga_status_fn(int cookie);
extern int fpga_config_fn(int assert, int flush, int cookie);
extern int fpga_done_fn(int cookie);
extern int fpga_clk_fn(int assert_clk, int flush, int cookie);
extern int fpga_wr_fn(void *buf, size_t len, int flush, int cookie);
extern int fpga_null_fn(int cookie);

325
board/matrix_vision/mvbc_p/mvbc_p.c Normal file
View File

@ -0,0 +1,325 @@
/*
* (C) Copyright 2003
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* (C) Copyright 2004
* Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
*
* (C) Copyright 2005-2007
* Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <mpc5xxx.h>
#include <malloc.h>
#include <pci.h>
#include <i2c.h>
#include <environment.h>
#include <fdt_support.h>
#include <asm/io.h>
#include "fpga.h"
#include "mvbc_p.h"
#define SDRAM_MODE 0x00CD0000
#define SDRAM_CONTROL 0x504F0000
#define SDRAM_CONFIG1 0xD2322800
#define SDRAM_CONFIG2 0x8AD70000
DECLARE_GLOBAL_DATA_PTR;
static void sdram_start (int hi_addr)
{
long hi_bit = hi_addr ? 0x01000000 : 0;
/* unlock mode register */
out_be32((u32*)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000000 | hi_bit);
/* precharge all banks */
out_be32((u32*)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000002 | hi_bit);
/* precharge all banks */
out_be32((u32*)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000002 | hi_bit);
/* auto refresh */
out_be32((u32*)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000004 | hi_bit);
/* set mode register */
out_be32((u32*)MPC5XXX_SDRAM_MODE, SDRAM_MODE);
/* normal operation */
out_be32((u32*)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | hi_bit);
}
phys_addr_t initdram (int board_type)
{
ulong dramsize = 0;
ulong test1,
test2;
/* setup SDRAM chip selects */
out_be32((u32*)MPC5XXX_SDRAM_CS0CFG, 0x0000001e);
/* setup config registers */
out_be32((u32*)MPC5XXX_SDRAM_CONFIG1, SDRAM_CONFIG1);
out_be32((u32*)MPC5XXX_SDRAM_CONFIG2, SDRAM_CONFIG2);
/* find RAM size using SDRAM CS0 only */
sdram_start(0);
test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
sdram_start(1);
test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
if (test1 > test2) {
sdram_start(0);
dramsize = test1;
} else
dramsize = test2;
if (dramsize < (1 << 20))
dramsize = 0;
if (dramsize > 0)
out_be32((u32*)MPC5XXX_SDRAM_CS0CFG, 0x13 +
__builtin_ffs(dramsize >> 20) - 1);
else
out_be32((u32*)MPC5XXX_SDRAM_CS0CFG, 0);
return dramsize;
}
void mvbc_init_gpio(void)
{
struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
printf("Ports : 0x%08x\n", gpio->port_config);
printf("PORCFG: 0x%08x\n", *(vu_long*)MPC5XXX_CDM_PORCFG);
out_be32(&gpio->simple_ddr, SIMPLE_DDR);
out_be32(&gpio->simple_dvo, SIMPLE_DVO);
out_be32(&gpio->simple_ode, SIMPLE_ODE);
out_be32(&gpio->simple_gpioe, SIMPLE_GPIOEN);
out_be32((u32*)&gpio->sint_ode, SINT_ODE);
out_be32((u32*)&gpio->sint_ddr, SINT_DDR);
out_be32((u32*)&gpio->sint_dvo, SINT_DVO);
out_be32((u32*)&gpio->sint_inten, SINT_INTEN);
out_be32((u32*)&gpio->sint_itype, SINT_ITYPE);
out_be32((u32*)&gpio->sint_gpioe, SINT_GPIOEN);
out_8((u8*)MPC5XXX_WU_GPIO_ODE, WKUP_ODE);
out_8((u8*)MPC5XXX_WU_GPIO_DIR, WKUP_DIR);
out_8((u8*)MPC5XXX_WU_GPIO_DATA_O, WKUP_DO);
out_8((u8*)MPC5XXX_WU_GPIO_ENABLE, WKUP_EN);
printf("simple_gpioe: 0x%08x\n", gpio->simple_gpioe);
printf("sint_gpioe : 0x%08x\n", gpio->sint_gpioe);
}
void reset_environment(void)
{
char *s, sernr[64];
printf("\n*** RESET ENVIRONMENT ***\n");
memset(sernr, 0, sizeof(sernr));
s = getenv("serial#");
if (s) {
printf("found serial# : %s\n", s);
strncpy(sernr, s, 64);
}
gd->env_valid = 0;
env_relocate();
if (s)
setenv("serial#", sernr);
}
int misc_init_r(void)
{
char *s = getenv("reset_env");
if (!s) {
if (in_8((u8*)MPC5XXX_WU_GPIO_DATA_I) & MPC5XXX_GPIO_WKUP_6)
return 0;
udelay(50000);
if (in_8((u8*)MPC5XXX_WU_GPIO_DATA_I) & MPC5XXX_GPIO_WKUP_6)
return 0;
udelay(50000);
if (in_8((u8*)MPC5XXX_WU_GPIO_DATA_I) & MPC5XXX_GPIO_WKUP_6)
return 0;
}
printf(" === FACTORY RESET ===\n");
reset_environment();
saveenv();
return -1;
}
int checkboard(void)
{
mvbc_init_gpio();
printf("Board: Matrix Vision mvBlueCOUGAR-P\n");
return 0;
}
void flash_preinit(void)
{
/*
* Now, when we are in RAM, enable flash write
* access for detection process.
* Note that CS_BOOT cannot be cleared when
* executing in flash.
*/
clrbits_be32((u32*)MPC5XXX_BOOTCS_CFG, 0x1);
}
void flash_afterinit(ulong size)
{
out_be32((u32*)MPC5XXX_BOOTCS_START, START_REG(CFG_BOOTCS_START |
size));
out_be32((u32*)MPC5XXX_CS0_START, START_REG(CFG_BOOTCS_START |
size));
out_be32((u32*)MPC5XXX_BOOTCS_STOP, STOP_REG(CFG_BOOTCS_START | size,
size));
out_be32((u32*)MPC5XXX_CS0_STOP, STOP_REG(CFG_BOOTCS_START | size,
size));
}
void pci_mvbc_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
{
unsigned char line = 0xff;
u32 base;
if (PCI_BUS(dev) == 0) {
switch (PCI_DEV (dev)) {
case 0xa: /* FPGA */
line = 3;
pci_hose_read_config_dword(hose, dev, PCI_BASE_ADDRESS_0, &base);
printf("found FPA - enable arbitration\n");
writel(0x03, (u32*)(base + 0x80c0));
writel(0xf0, (u32*)(base + 0x8080));
break;
case 0xb: /* LAN */
line = 2;
break;
case 0x1a:
break;
default:
printf ("***pci_scan: illegal dev = 0x%08x\n", PCI_DEV (dev));
break;
}
pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, line);
}
}
struct pci_controller hose = {
fixup_irq:pci_mvbc_fixup_irq
};
int mvbc_p_load_fpga(void)
{
size_t data_size = 0;
void *fpga_data = NULL;
char *datastr = getenv("fpgadata");
char *sizestr = getenv("fpgadatasize");
if (datastr)
fpga_data = (void *)simple_strtoul(datastr, NULL, 16);
if (sizestr)
data_size = (size_t)simple_strtoul(sizestr, NULL, 16);
return fpga_load(0, fpga_data, data_size);
}
extern void pci_mpc5xxx_init(struct pci_controller *);
void pci_init_board(void)
{
char *s;
int load_fpga = 1;
mvbc_p_init_fpga();
s = getenv("skip_fpga");
if (s) {
printf("found 'skip_fpga' -> FPGA _not_ loaded !\n");
load_fpga = 0;
}
if (load_fpga) {
printf("loading FPGA ... ");
mvbc_p_load_fpga();
printf("done\n");
}
pci_mpc5xxx_init(&hose);
}
u8 *dhcp_vendorex_prep(u8 *e)
{
char *ptr;
/* DHCP vendor-class-identifier = 60 */
if ((ptr = getenv("dhcp_vendor-class-identifier"))) {
*e++ = 60;
*e++ = strlen(ptr);
while (*ptr)
*e++ = *ptr++;
}
/* DHCP_CLIENT_IDENTIFIER = 61 */
if ((ptr = getenv("dhcp_client_id"))) {
*e++ = 61;
*e++ = strlen(ptr);
while (*ptr)
*e++ = *ptr++;
}
return e;
}
u8 *dhcp_vendorex_proc (u8 *popt)
{
return NULL;
}
void show_boot_progress(int val)
{
struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
switch(val) {
case 0: /* FPGA ok */
setbits_be32(&gpio->simple_dvo, 0x80);
break;
case 1:
setbits_be32(&gpio->simple_dvo, 0x40);
break;
case 12:
setbits_be32(&gpio->simple_dvo, 0x20);
break;
case 15:
setbits_be32(&gpio->simple_dvo, 0x10);
break;
default:
break;
}
}
void ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
}

43
board/matrix_vision/mvbc_p/mvbc_p.h Normal file
View File

@ -0,0 +1,43 @@
#ifndef __MVBC_H__
#define __MVBC_H__
#define LED_G0 MPC5XXX_GPIO_SIMPLE_PSC2_0
#define LED_G1 MPC5XXX_GPIO_SIMPLE_PSC2_1
#define LED_Y MPC5XXX_GPIO_SIMPLE_PSC2_2
#define LED_R MPC5XXX_GPIO_SIMPLE_PSC2_3
#define ARB_X_EN MPC5XXX_GPIO_WKUP_PSC2_4
#define FPGA_DIN MPC5XXX_GPIO_SIMPLE_PSC3_0
#define FPGA_CCLK MPC5XXX_GPIO_SIMPLE_PSC3_1
#define FPGA_CONF_DONE MPC5XXX_GPIO_SIMPLE_PSC3_2
#define FPGA_CONFIG MPC5XXX_GPIO_SIMPLE_PSC3_3
#define FPGA_STATUS MPC5XXX_GPIO_SINT_PSC3_4
#define MAN_RST MPC5XXX_GPIO_WKUP_PSC6_0
#define WD_TS MPC5XXX_GPIO_WKUP_PSC6_1
#define WD_WDI MPC5XXX_GPIO_SIMPLE_PSC6_2
#define COP_PRESENT MPC5XXX_GPIO_SIMPLE_PSC6_3
#define FACT_RST MPC5XXX_GPIO_WKUP_6
#define FLASH_RBY MPC5XXX_GPIO_WKUP_7
#define SIMPLE_DDR (LED_G0 | LED_G1 | LED_Y | LED_R | \
FPGA_DIN | FPGA_CCLK | FPGA_CONFIG | WD_WDI)
#define SIMPLE_DVO (FPGA_CONFIG)
#define SIMPLE_ODE (FPGA_CONFIG)
#define SIMPLE_GPIOEN (LED_G0 | LED_G1 | LED_Y | LED_R | \
FPGA_DIN | FPGA_CCLK | FPGA_CONF_DONE | FPGA_CONFIG |\
WD_WDI | COP_PRESENT)
#define SINT_ODE 0
#define SINT_DDR 0
#define SINT_DVO 0
#define SINT_INTEN 0
#define SINT_ITYPE 0
#define SINT_GPIOEN (FPGA_STATUS)
#define WKUP_ODE (MAN_RST)
#define WKUP_DIR (ARB_X_EN|MAN_RST|WD_TS)
#define WKUP_DO (ARB_X_EN|MAN_RST|WD_TS)
#define WKUP_EN (ARB_X_EN|MAN_RST|WD_TS|FACT_RST|FLASH_RBY)
#endif

44
board/matrix_vision/mvbc_p/mvbc_p_autoscript Normal file
View File

@ -0,0 +1,44 @@
echo
echo "==== running autoscript ===="
echo
setenv bootdtb bootm \${kernel_boot} \${mv_initrd_addr_ram} \${mv_dtb_addr_ram}
setenv ramkernel setenv kernel_boot \${loadaddr}
setenv flashkernel setenv kernel_boot \${mv_kernel_addr}
setenv cpird cp \${mv_initrd_addr} \${mv_initrd_addr_ram} \${mv_initrd_length}
setenv bootfromflash run flashkernel cpird ramparam addcons e1000para bootdtb
setenv getdtb tftp \${mv_dtb_addr_ram} \${dtb_name}
setenv cpdtb cp \${mv_dtb_addr} \${mv_dtb_addr_ram} 0x2000
setenv rundtb fdt addr \${mv_dtb_addr_ram}\;fdt boardsetup
setenv bootfromnet tftp \${mv_initrd_addr_ram} \${initrd_name}\;run ramkernel
if test ${console} = yes;
then
setenv addcons setenv bootargs \${bootargs} console=ttyPSC\${console_nr},\${baudrate}N8
else
setenv addcons setenv bootargs \${bootargs} console=tty0
fi
setenv e1000para setenv bootargs \${bootargs} e1000.TxDescriptors=1500 e1000.SmartPowerDownEnable=1
setenv set_static_ip setenv ipaddr \${static_ipaddr}
setenv set_static_nm setenv netmask \${static_netmask}
setenv set_static_gw setenv gatewayip \${static_gateway}
setenv set_ip setenv ip \${ipaddr}::\${gatewayip}:\${netmask}
setenv ramparam setenv bootargs root=/dev/ram0 ro rootfstype=squashfs
if test ${autoscr_boot} != no;
then
if test ${netboot} = yes;
then
bootp
if test $? = 0;
then
echo "=== bootp succeeded -> netboot ==="
run set_ip
run getdtb rundtb bootfromnet ramparam addcons e1000para bootdtb
else
echo "=== netboot failed ==="
fi
fi
run set_static_ip set_static_nm set_static_gw set_ip
echo "=== bootfromflash ==="
run cpdtb rundtb bootfromflash
else
echo "=== boot stopped with autoscr_boot no ==="
fi

6
board/ml2/flash.c
View File

@ -222,7 +222,7 @@ static int write_word (flash_info_t *info, ulong dest, unsigned long long data)
unsigned long long result;
int rc = ERR_OK;
result=*addr;
result = *addr;
if ((result & data) != data)
return ERR_NOT_ERASED;
@ -234,7 +234,7 @@ static int write_word (flash_info_t *info, ulong dest, unsigned long long data)
eieio();
do {
result=*addr;
result = *addr;
} while(~result & BIT_BUSY);
*addr=CMD_READ_ARRAY;
@ -275,7 +275,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) {
}
while(cnt>=8) {
data=*((unsigned long long *)src);
data = *((unsigned long long *)src);
if ((rc = write_word(info, wp, data)) != 0)
return rc;
src+=8;

12
board/mpl/common/common_util.c
View File

@ -357,8 +357,8 @@ void copy_old_env(ulong size)
unsigned off;
uchar *name, *value;
name=&name_buf[0];
value=&value_buf[0];
name = &name_buf[0];
value = &value_buf[0];
len=size;
off = sizeof(long);
while (len > off) {
@ -377,8 +377,8 @@ void copy_old_env(ulong size)
if(c == '\0')
break;
} while(len > off);
name=&name_buf[0];
value=&value_buf[0];
name = &name_buf[0];
value = &value_buf[0];
if(strncmp((char *)name,"baudrate",8)!=0) {
setenv((char *)name,(char *)value);
}
@ -636,12 +636,12 @@ void video_get_info_str (int line_number, char *info)
++s;
break;
}
buf[i++]=*s;
buf[i++] = *s;
}
sprintf(&buf[i]," SN ");
i+=4;
for (; s < e; ++s) {
buf[i++]=*s;
buf[i++] = *s;
}
buf[i++]=0;
}

2
board/mpl/common/flash.c
View File

@ -160,7 +160,7 @@ unsigned long flash_init (void)
unsigned long size_b1,flashcr,size_reg;
int mode;
extern char version_string;
char *p=&version_string;
char *p = &version_string;
/* Since we are relocated, we can set-up the CS finally */
setup_cs_reloc();

2
board/mpl/common/kbd.c
View File

@ -475,7 +475,7 @@ int kbd_read_data(void)
int val;
unsigned char status;
val=-1;
val = -1;
status = kbd_read_status();
if (status & KBD_STAT_OBF) {
val = kbd_read_input();

4
board/mpl/common/usb_uhci.c
View File

@ -536,7 +536,7 @@ void usb_check_int_chain(void)
uhci_td_t *td,*prevtd;
for(i=0;i<8;i++) {
prevtd=&td_int[i]; /* the first previous td is the skeleton td */
prevtd = &td_int[i]; /* the first previous td is the skeleton td */
link=swap_32(td_int[i].link) & 0xfffffff0; /* next in chain */
td=(uhci_td_t *)link; /* assign it */
/* all interrupt TDs are finally linked to the td_int[0].
@ -638,7 +638,7 @@ int usb_lowlevel_stop(void)
return 1;
irq_free_handler(irqvec);
reset_hc();
irqvec=-1;
irqvec = -1;
return 0;
}

32
board/sbc8560/sbc8560.c
View File

@ -33,6 +33,8 @@
#include <ioports.h>
#include <spd_sdram.h>
#include <miiphy.h>
#include <libfdt.h>
#include <fdt_support.h>
long int fixed_sdram (void);
@ -421,7 +423,11 @@ long int fixed_sdram (void)
#ifndef CFG_RAMBOOT
volatile ccsr_ddr_t *ddr= (void *)(CFG_MPC85xx_DDR_ADDR);
#if (CFG_SDRAM_SIZE == 512)
ddr->cs0_bnds = 0x0000000f;
#else
ddr->cs0_bnds = 0x00000007;
#endif
ddr->cs1_bnds = 0x0010001f;
ddr->cs2_bnds = 0x00000000;
ddr->cs3_bnds = 0x00000000;
@ -452,3 +458,29 @@ long int fixed_sdram (void)
return CFG_SDRAM_SIZE * 1024 * 1024;
}
#endif /* !defined(CONFIG_SPD_EEPROM) */
#if defined(CONFIG_OF_BOARD_SETUP)
void
ft_board_setup(void *blob, bd_t *bd)
{
int node, tmp[2];
#ifdef CONFIG_PCI
const char *path;
#endif
ft_cpu_setup(blob, bd);
node = fdt_path_offset(blob, "/aliases");
tmp[0] = 0;
if (node >= 0) {
#ifdef CONFIG_PCI
path = fdt_getprop(blob, node, "pci0", NULL);
if (path) {
tmp[1] = hose.last_busno - hose.first_busno;
do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
}
#endif
}
}
#endif

17
board/snmc/qs850/qs850.c
View File

@ -86,6 +86,13 @@ const uint sdram_table[] =
*
* Always return 1
*/
#if defined(CONFIG_QS850)
#define BOARD_IDENTITY "QS850"
#elif defined(CONFIG_QS823)
#define BOARD_IDENTITY "QS823"
#else
#define BOARD_IDENTITY "QS???"
#endif
int checkboard (void)
{
@ -96,14 +103,8 @@ int checkboard (void)
i = getenv_r("serial#", buf, sizeof(buf));
s = (i>0) ? buf : NULL;
#ifdef CONFIG_QS850
if (!s || strncmp(s, "QS850", 5)) {
puts ("### No HW ID - assuming QS850");
#endif
#ifdef CONFIG_QS823
if (!s || strncmp(s, "QS823", 5)) {
puts ("### No HW ID - assuming QS823");
#endif
if (!s || strncmp(s, BOARD_IDENTITY, 5)) {
puts ("### No HW ID - assuming " BOARD_IDENTITY);
} else {
for (e=s; *e; ++e) {
if (*e == ' ')

8
board/tqc/tqm5200/cmd_stk52xx.c
View File

@ -192,10 +192,10 @@ static int i2s_play_wave(unsigned long addr, unsigned long len)
psc->command = (PSC_RX_ENABLE | PSC_TX_ENABLE);
for(i = 0;i < (len / 4); i++) {
swapped[3]=*wave_file++;
swapped[2]=*wave_file++;
swapped[1]=*wave_file++;
swapped[0]=*wave_file++;
swapped[3] = *wave_file++;
swapped[2] = *wave_file++;
swapped[1] = *wave_file++;
swapped[0] = *wave_file++;
psc->psc_buffer_32 = *((unsigned long*)swapped);
while (psc->tfnum > 400) {
if(ctrlc())

18
common/cmd_bootm.c
View File

@ -218,15 +218,15 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
iflag = disable_interrupts();
#if (CONFIG_COMMANDS & CFG_CMD_USB)
/*
* turn off USB to prevent the host controller from writing to the
* SDRAM while Linux is booting. This could happen (at least for OHCI
* controller), because the HCCA (Host Controller Communication Area)
* lies within the SDRAM and the host controller writes continously to
* this area (as busmaster!). The HccaFrameNumber is for example
* updated every 1 ms within the HCCA structure in SDRAM! For more
* details see the OpenHCI specification.
*/
/*
* turn off USB to prevent the host controller from writing to the
* SDRAM while Linux is booting. This could happen (at least for OHCI
* controller), because the HCCA (Host Controller Communication Area)
* lies within the SDRAM and the host controller writes continously to
* this area (as busmaster!). The HccaFrameNumber is for example
* updated every 1 ms within the HCCA structure in SDRAM! For more
* details see the OpenHCI specification.
*/
usb_stop();
#endif

4
common/cmd_fdc.c
View File

@ -512,7 +512,7 @@ int fdc_read_data(unsigned char *buffer, unsigned long blocks,FDC_COMMAND_STRUCT
if(readblk>blocks) /* is end within 1st track */
readblk=blocks; /* yes, correct it */
PRINTF("we read %ld blocks start %ld\n",readblk,pCMD->blnr);
bufferw=&buffer[0]; /* setup working buffer */
bufferw = &buffer[0]; /* setup working buffer */
do {
retryrw:
len=sect_size * readblk;
@ -566,7 +566,7 @@ retryrw:
* we need to get the results */
fdc_terminate(pCMD);
offset+=(sect_size*readblk); /* set up buffer pointer */
bufferw=&buffer[offset];
bufferw = &buffer[offset];
pCMD->blnr+=readblk; /* update current block nr */
blocks-=readblk; /* update blocks */
if(blocks==0)

6
common/cmd_flash.c
View File

@ -210,7 +210,7 @@ flash_fill_sect_ranges (ulong addr_first, ulong addr_last,
s_last [bank] = -1; /* last sector to erase */
}
for (bank=0,info=&flash_info[0];
for (bank=0,info = &flash_info[0];
(bank < CFG_MAX_FLASH_BANKS) && (addr_first <= addr_last);
++bank, ++info) {
ulong b_end;
@ -427,7 +427,7 @@ int flash_sect_erase (ulong addr_first, ulong addr_last)
s_first, s_last, &planned );
if (planned && (rcode == 0)) {
for (bank=0,info=&flash_info[0];
for (bank=0,info = &flash_info[0];
(bank < CFG_MAX_FLASH_BANKS) && (rcode == 0);
++bank, ++info) {
if (s_first[bank]>=0) {
@ -651,7 +651,7 @@ int flash_sect_protect (int p, ulong addr_first, ulong addr_last)
protected = 0;
if (planned && (rcode == 0)) {
for (bank=0,info=&flash_info[0]; bank < CFG_MAX_FLASH_BANKS; ++bank, ++info) {
for (bank=0,info = &flash_info[0]; bank < CFG_MAX_FLASH_BANKS; ++bank, ++info) {
if (info->flash_id == FLASH_UNKNOWN) {
continue;
}

8
common/cmd_fpga.c
View File

@ -85,7 +85,7 @@ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
length = (*dataptr << 8) + *(dataptr+1);
dataptr+=2;
for(i=0;i<length;i++)
buffer[i]=*dataptr++;
buffer[i] = *dataptr++;
printf(" design filename = \"%s\"\n", buffer);
@ -99,7 +99,7 @@ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
length = (*dataptr << 8) + *(dataptr+1);
dataptr+=2;
for(i=0;i<length;i++)
buffer[i]=*dataptr++;
buffer[i] = *dataptr++;
printf(" part number = \"%s\"\n", buffer);
/* get date (identifier, length, string) */
@ -112,7 +112,7 @@ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
length = (*dataptr << 8) + *(dataptr+1);
dataptr+=2;
for(i=0;i<length;i++)
buffer[i]=*dataptr++;
buffer[i] = *dataptr++;
printf(" date = \"%s\"\n", buffer);
/* get time (identifier, length, string) */
@ -124,7 +124,7 @@ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
length = (*dataptr << 8) + *(dataptr+1);
dataptr+=2;
for(i=0;i<length;i++)
buffer[i]=*dataptr++;
buffer[i] = *dataptr++;
printf(" time = \"%s\"\n", buffer);
/* get fpga data length (identifier, length) */

2
common/cmd_mp.c
View File

@ -35,7 +35,7 @@ cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
cpuid = simple_strtoul(argv[1], NULL, 10);
if (cpuid >= CONFIG_NR_CPUS) {
printf ("Core num: %d is out of range[0..%d]\n",
printf ("Core num: %lu is out of range[0..%d]\n",
cpuid, CONFIG_NR_CPUS - 1);
return 1;
}

2
common/cmd_scsi.c
View File

@ -171,7 +171,7 @@ removable:
if(scsi_max_devs>0)
scsi_curr_dev=0;
else
scsi_curr_dev=-1;
scsi_curr_dev = -1;
}

2
common/cmd_usb.c
View File

@ -32,7 +32,7 @@
#include <usb.h>
#ifdef CONFIG_USB_STORAGE
static int usb_stor_curr_dev=-1; /* current device */
static int usb_stor_curr_dev = -1; /* current device */
#endif
/* some display routines (info command) */

2
common/devices.c
View File

@ -125,7 +125,7 @@ int device_deregister(char *devname)
device_t *dev = NULL;
char temp_names[3][8];
dev_index=-1;
dev_index = -1;
for (i=1; i<=ListNumItems(devlist); i++) {
dev = ListGetPtrToItem (devlist, i);
if(strcmp(dev->name,devname)==0) {

87
common/fdt_support.c
View File

@ -442,3 +442,90 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
prop, compat, fdt_strerror(err));
}
#endif /* CONFIG_HAS_FSL_DR_USB */
#if defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx)
/*
* update crypto node properties to a specified revision of the SEC
* called with sec_rev == 0 if not on an mpc8xxxE processor
*/
void fdt_fixup_crypto_node(void *blob, int sec_rev)
{
const struct sec_rev_prop {
u32 sec_rev;
u32 num_channels;
u32 channel_fifo_len;
u32 exec_units_mask;
u32 descriptor_types_mask;
} sec_rev_prop_list [] = {
{ 0x0200, 4, 24, 0x07e, 0x01010ebf }, /* SEC 2.0 */
{ 0x0201, 4, 24, 0x0fe, 0x012b0ebf }, /* SEC 2.1 */
{ 0x0202, 1, 24, 0x04c, 0x0122003f }, /* SEC 2.2 */
{ 0x0204, 4, 24, 0x07e, 0x012b0ebf }, /* SEC 2.4 */
{ 0x0300, 4, 24, 0x9fe, 0x03ab0ebf }, /* SEC 3.0 */
{ 0x0303, 4, 24, 0x97c, 0x03ab0abf }, /* SEC 3.3 */
};
char compat_strlist[ARRAY_SIZE(sec_rev_prop_list) *
sizeof("fsl,secX.Y")];
int crypto_node, sec_idx, err;
char *p;
u32 val;
/* locate crypto node based on lowest common compatible */
crypto_node = fdt_node_offset_by_compatible(blob, -1, "fsl,sec2.0");
if (crypto_node == -FDT_ERR_NOTFOUND)
return;
/* delete it if not on an E-processor */
if (crypto_node > 0 && !sec_rev) {
fdt_del_node(blob, crypto_node);
return;
}
/* else we got called for possible uprev */
for (sec_idx = 0; sec_idx < ARRAY_SIZE(sec_rev_prop_list); sec_idx++)
if (sec_rev_prop_list[sec_idx].sec_rev == sec_rev)
break;
if (sec_idx == ARRAY_SIZE(sec_rev_prop_list)) {
puts("warning: unknown SEC revision number\n");
return;
}
val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].num_channels);
err = fdt_setprop(blob, crypto_node, "fsl,num-channels", &val, 4);
if (err < 0)
printf("WARNING: could not set crypto property: %s\n",
fdt_strerror(err));
val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].descriptor_types_mask);
err = fdt_setprop(blob, crypto_node, "fsl,descriptor-types-mask", &val, 4);
if (err < 0)
printf("WARNING: could not set crypto property: %s\n",
fdt_strerror(err));
val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].exec_units_mask);
err = fdt_setprop(blob, crypto_node, "fsl,exec-units-mask", &val, 4);
if (err < 0)
printf("WARNING: could not set crypto property: %s\n",
fdt_strerror(err));
val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].channel_fifo_len);
err = fdt_setprop(blob, crypto_node, "fsl,channel-fifo-len", &val, 4);
if (err < 0)
printf("WARNING: could not set crypto property: %s\n",
fdt_strerror(err));
val = 0;
while (sec_idx >= 0) {
p = compat_strlist + val;
val += sprintf(p, "fsl,sec%d.%d",
(sec_rev_prop_list[sec_idx].sec_rev & 0xff00) >> 8,
sec_rev_prop_list[sec_idx].sec_rev & 0x00ff) + 1;
sec_idx--;
}
err = fdt_setprop(blob, crypto_node, "compatible", &compat_strlist, val);
if (err < 0)
printf("WARNING: could not set crypto property: %s\n",
fdt_strerror(err));
}
#endif /* defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx) */

2
common/flash.c
View File

@ -104,7 +104,7 @@ addr2info (ulong addr)
flash_info_t *info;
int i;
for (i=0, info=&flash_info[0]; i<CFG_MAX_FLASH_BANKS; ++i, ++info) {
for (i=0, info = &flash_info[0]; i<CFG_MAX_FLASH_BANKS; ++i, ++info) {
if (info->flash_id != FLASH_UNKNOWN &&
addr >= info->start[0] &&
/* WARNING - The '- 1' is needed if the flash

6
common/hush.c
View File

@ -953,7 +953,7 @@ static int b_adduint(o_string *o, unsigned int i)
static int static_get(struct in_str *i)
{
int ch=*i->p++;
int ch = *i->p++;
if (ch=='\0') return EOF;
return ch;
}
@ -1104,7 +1104,7 @@ static int file_get(struct in_str *i)
ch = 0;
/* If there is data waiting, eat it up */
if (i->p && *i->p) {
ch=*i->p++;
ch = *i->p++;
} else {
/* need to double check i->file because we might be doing something
* more complicated by now, like sourcing or substituting. */
@ -1121,7 +1121,7 @@ static int file_get(struct in_str *i)
i->__promptme = 0;
#endif
if (i->p && *i->p) {
ch=*i->p++;
ch = *i->p++;
}
#ifndef __U_BOOT__
} else {

4
common/lcd.c
View File

@ -539,7 +539,7 @@ void bitmap_plot (int x, int y)
debug ("Logo: width %d height %d colors %d cmap %d\n",
BMP_LOGO_WIDTH, BMP_LOGO_HEIGHT, BMP_LOGO_COLORS,
sizeof(bmp_logo_palette)/(sizeof(ushort)));
(int)(sizeof(bmp_logo_palette)/(sizeof(ushort))));
bmap = &bmp_logo_bitmap[0];
fb = (uchar *)(lcd_base + y * lcd_line_length + x);
@ -728,7 +728,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
WATCHDOG_RESET();
for (j = 0; j < width ; j++)
#if defined(CONFIG_PXA250)
*(fb++)=*(bmap++);
*(fb++) = *(bmap++);
#elif defined(CONFIG_MPC823) || defined(CONFIG_MCC200)
*(fb++)=255-*(bmap++);
#endif

6
common/usb.c
View File

@ -252,7 +252,7 @@ int usb_set_maxpacket(struct usb_device *dev)
for(i=0; i<dev->config.bNumInterfaces;i++) {
for(ii=0; ii<dev->config.if_desc[i].bNumEndpoints; ii++) {
ep=&dev->config.if_desc[i].ep_desc[ii];
ep = &dev->config.if_desc[i].ep_desc[ii];
b=ep->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
if((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)==USB_ENDPOINT_XFER_CONTROL) { /* Control => bidirectional */
@ -627,7 +627,7 @@ int usb_string(struct usb_device *dev, int index, char *buf, size_t size)
if (size <= 0 || !buf || !index)
return -1;
buf[0] = 0;
tbuf=&mybuf[0];
tbuf = &mybuf[0];
/* get langid for strings if it's not yet known */
if (!dev->have_langid) {
@ -857,7 +857,7 @@ void usb_scan_devices(void)
/* first make all devices unknown */
for(i=0;i<USB_MAX_DEVICE;i++) {
memset(&usb_dev[i],0,sizeof(struct usb_device));
usb_dev[i].devnum=-1;
usb_dev[i].devnum = -1;
}
dev_index=0;
/* device 0 is always present (root hub, so let it analyze) */

4
common/usb_kbd.c
View File

@ -730,8 +730,8 @@ static int usb_kbd_get_hid_desc(struct usb_device *dev)
return -1;
}
printf(" report descriptor (size %u, read %d)\n", len, index);
start=&buffer[0];
end=&buffer[len];
start = &buffer[0];
end = &buffer[len];
i=0;
do {
index=fetch_item(start,end,&item);

6
common/usb_storage.c
View File

@ -731,7 +731,7 @@ int usb_stor_CB_transport(ccb *srb, struct us_data *us)
ccb reqsrb;
int retry,notready;
psrb=&reqsrb;
psrb = &reqsrb;
status=USB_STOR_TRANSPORT_GOOD;
retry=0;
notready=0;
@ -776,7 +776,7 @@ do_retry:
psrb->cmd[1]=srb->lun<<5;
psrb->cmd[4]=18;
psrb->datalen=18;
psrb->pdata=&srb->sense_buf[0];
psrb->pdata = &srb->sense_buf[0];
psrb->cmdlen=12;
/* issue the command */
result=usb_stor_CB_comdat(psrb,us);
@ -858,7 +858,7 @@ static int usb_request_sense(ccb *srb,struct us_data *ss)
srb->cmd[1]=srb->lun<<5;
srb->cmd[4]=18;
srb->datalen=18;
srb->pdata=&srb->sense_buf[0];
srb->pdata = &srb->sense_buf[0];
srb->cmdlen=12;
ss->transport(srb,ss);
USB_STOR_PRINTF("Request Sense returned %02X %02X %02X\n",srb->sense_buf[2],srb->sense_buf[12],srb->sense_buf[13]);

2
cpu/arm926ejs/davinci/ether.c
View File

@ -357,6 +357,8 @@ static int dm644x_eth_hw_init(void)
phy.auto_negotiate = gen_auto_negotiate;
}
printf("Ethernet PHY: %s\n", phy.name);
return(1);
}

4
cpu/i386/serial.c
View File

@ -413,8 +413,8 @@ void kgdb_serial_init(void)
* Init onboard 16550 UART
*/
outb(0x80, UART1_BASE + UART_LCR); /* set DLAB bit */
outb(bdiv & 0xff), UART1_BASE + UART_DLL); /* set divisor for 9600 baud */
outb(bdiv >> 8), UART1_BASE + UART_DLM); /* set divisor for 9600 baud */
outb((bdiv & 0xff), UART1_BASE + UART_DLL); /* set divisor for 9600 baud */
outb((bdiv >> 8 ), UART1_BASE + UART_DLM); /* set divisor for 9600 baud */
outb(0x03, UART1_BASE + UART_LCR); /* line control 8 bits no parity */
outb(0x00, UART1_BASE + UART_FCR); /* disable FIFO */
outb(0x00, UART1_BASE + UART_MCR); /* no modem control DTR RTS */

2
cpu/ixp/npe/npe.c
View File

@ -67,7 +67,7 @@ static void *npe_alloc(int size)
p = npe_alloc_free;
npe_alloc_free += size;
} else {
printf("%s: failed (count=%d, size=%d)!\n", count, size);
printf("npe_alloc: failed (count=%d, size=%d)!\n", count, size);
}
return p;
}

20
cpu/mpc83xx/fdt.c
View File

@ -26,6 +26,7 @@
#include <common.h>
#include <libfdt.h>
#include <fdt_support.h>
#include <asm/processor.h>
extern void ft_qe_setup(void *blob);
@ -33,6 +34,23 @@ DECLARE_GLOBAL_DATA_PTR;
void ft_cpu_setup(void *blob, bd_t *bd)
{
immap_t *immr = (immap_t *)CFG_IMMR;
int spridr = immr->sysconf.spridr;
/*
* delete crypto node if not on an E-processor
* initial revisions of the MPC834xE/6xE have the original SEC 2.0.
* EA revisions got the SEC uprevved to 2.4 but since the default device
* tree contains SEC 2.0 properties we uprev them here.
*/
if (!IS_E_PROCESSOR(spridr))
fdt_fixup_crypto_node(blob, 0);
else if (IS_E_PROCESSOR(spridr) &&
(SPR_FAMILY(spridr) == SPR_834X_FAMILY ||
SPR_FAMILY(spridr) == SPR_836X_FAMILY) &&
REVID_MAJOR(spridr) >= 2)
fdt_fixup_crypto_node(blob, 0x0204);
#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
fdt_fixup_ethernet(blob, bd);
@ -60,7 +78,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
#ifdef CFG_NS16550
do_fixup_by_compat_u32(blob, "ns16550",
"clock-frequency", bd->bi_busfreq, 1);
"clock-frequency", CFG_NS16550_CLK, 1);
#endif
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);

2
cpu/mpc85xx/cpu.c
View File

@ -97,7 +97,7 @@ int checkcpu (void)
if (cpu) {
puts(cpu->name);
if (svr & 0x80000)
if (IS_E_PROCESSOR(svr))
puts("E");
} else {
puts("Unknown");

51
cpu/mpc85xx/cpu_init.c
View File

@ -261,37 +261,50 @@ int cpu_init_r(void)
volatile uint cache_ctl;
uint svr, ver;
uint l2srbar;
u32 l2siz_field;
svr = get_svr();
ver = SVR_SOC_VER(svr);
asm("msync;isync");
cache_ctl = l2cache->l2ctl;
l2siz_field = (cache_ctl >> 28) & 0x3;
switch (cache_ctl & 0x30000000) {
case 0x20000000:
if (ver == SVR_8548 || ver == SVR_8548_E ||
ver == SVR_8544 || ver == SVR_8568_E) {
puts ("512 KB ");
/* set L2E=1, L2I=1, & L2SRAM=0 */
cache_ctl = 0xc0000000;
switch (l2siz_field) {
case 0x0:
printf(" unknown size (0x%08x)\n", cache_ctl);
return -1;
break;
case 0x1:
if (ver == SVR_8540 || ver == SVR_8560 ||
ver == SVR_8541 || ver == SVR_8541_E ||
ver == SVR_8555 || ver == SVR_8555_E) {
puts("128 KB ");
/* set L2E=1, L2I=1, & L2BLKSZ=1 (128 Kbyte) */
cache_ctl = 0xc4000000;
} else {
puts("256 KB ");
/* set L2E=1, L2I=1, & L2BLKSZ=2 (256 Kbyte) */
cache_ctl = 0xc8000000;
}
break;
case 0x10000000:
puts("256 KB ");
if (ver == SVR_8544 || ver == SVR_8544_E) {
cache_ctl = 0xc0000000; /* set L2E=1, L2I=1, & L2SRAM=0 */
}
break;
case 0x30000000:
case 0x00000000:
default:
printf(" unknown size (0x%08x)\n", cache_ctl);
return -1;
case 0x2:
if (ver == SVR_8540 || ver == SVR_8560 ||
ver == SVR_8541 || ver == SVR_8541_E ||
ver == SVR_8555 || ver == SVR_8555_E) {
puts("256 KB ");
/* set L2E=1, L2I=1, & L2BLKSZ=2 (256 Kbyte) */
cache_ctl = 0xc8000000;
} else {
puts ("512 KB ");
/* set L2E=1, L2I=1, & L2SRAM=0 */
cache_ctl = 0xc0000000;
}
break;
case 0x3:
puts("1024 KB ");
/* set L2E=1, L2I=1, & L2SRAM=0 */
cache_ctl = 0xc0000000;
break;
}
if (l2cache->l2ctl & 0x80000000) {

7
cpu/mpc85xx/fdt.c
View File

@ -29,6 +29,7 @@
#include <asm/processor.h>
extern void ft_qe_setup(void *blob);
#ifdef CONFIG_MP
#include "mp.h"
DECLARE_GLOBAL_DATA_PTR;
@ -205,6 +206,10 @@ static inline void ft_fixup_cache(void *blob)
void ft_cpu_setup(void *blob, bd_t *bd)
{
/* delete crypto node if not on an E-processor */
if (!IS_E_PROCESSOR(get_svr()))
fdt_fixup_crypto_node(blob, 0);
#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
fdt_fixup_ethernet(blob, bd);
@ -224,7 +229,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
#ifdef CFG_NS16550
do_fixup_by_compat_u32(blob, "ns16550",
"clock-frequency", bd->bi_busfreq, 1);
"clock-frequency", CFG_NS16550_CLK, 1);
#endif
#ifdef CONFIG_CPM2

4
cpu/mpc85xx/mp.c
View File

@ -50,12 +50,12 @@ int cpu_status(int nr)
if (nr == id) {
table = (u32 *)get_spin_addr();
printf("table base @ 0x%08x\n", table);
printf("table base @ 0x%p\n", table);
} else {
table = (u32 *)get_spin_addr() + nr * NUM_BOOT_ENTRY;
printf("Running on cpu %d\n", id);
printf("\n");
printf("table @ 0x%08x:\n", table);
printf("table @ 0x%p\n", table);
printf(" addr - 0x%08x\n", table[BOOT_ENTRY_ADDR_LOWER]);
printf(" pir - 0x%08x\n", table[BOOT_ENTRY_PIR]);
printf(" r3 - 0x%08x\n", table[BOOT_ENTRY_R3_LOWER]);

9
cpu/mpc85xx/start.S
View File

@ -188,11 +188,12 @@ _start_e500:
lis r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_16M)@h
ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_16M)@l
lis r8,FSL_BOOKE_MAS2(TEXT_BASE, (MAS2_I|MAS2_G))@h
ori r8,r8,FSL_BOOKE_MAS2(TEXT_BASE, (MAS2_I|MAS2_G))@l
/* Align the mapping to 16MB */
lis r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xff000000, (MAS2_I|MAS2_G))@h
ori r8,r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xff000000, (MAS2_I|MAS2_G))@l
lis r9,FSL_BOOKE_MAS3(0xff800000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h
ori r9,r9,FSL_BOOKE_MAS3(0xff800000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l
lis r9,FSL_BOOKE_MAS3(0xff000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h
ori r9,r9,FSL_BOOKE_MAS3(0xff000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l
mtspr MAS0,r6
mtspr MAS1,r7

2
cpu/mpc86xx/fdt.c
View File

@ -30,6 +30,6 @@ void ft_cpu_setup(void *blob, bd_t *bd)
#ifdef CFG_NS16550
do_fixup_by_compat_u32(blob, "ns16550",
"clock-frequency", bd->bi_busfreq, 1);
"clock-frequency", CFG_NS16550_CLK, 1);
#endif
}

4
cpu/mpc8xx/video.c
View File

@ -833,10 +833,10 @@ static void video_encoder_init (void)
puts ("[VIDEO ENCODER] Configuring the encoder...\n");
printf ("Sending %d bytes (@ %08lX) to I2C 0x%X:\n ",
printf ("Sending %zu bytes (@ %08lX) to I2C 0x%lX:\n ",
sizeof(video_encoder_data),
(ulong)video_encoder_data,
VIDEO_I2C_ADDR);
(ulong)VIDEO_I2C_ADDR);
for (i=0; i<sizeof(video_encoder_data); ++i) {
printf(" %02X", video_encoder_data[i]);
}

6
cpu/ppc4xx/40x_spd_sdram.c
View File

@ -126,9 +126,9 @@ long int spd_sdram(int(read_spd)(uint addr))
int sdram0_pmit=0x07c00000;
#ifndef CONFIG_405EP /* not on PPC405EP */
int sdram0_besr0=-1;
int sdram0_besr1=-1;
int sdram0_eccesr=-1;
int sdram0_besr0 = -1;
int sdram0_besr1 = -1;
int sdram0_eccesr = -1;
#endif
int sdram0_ecccfg;

73
doc/README.mvbc_p Normal file
View File

@ -0,0 +1,73 @@
Matrix Vision mvBlueCOUGAR-P (mvBC-P)
-------------------------------------
1. Board Description
The mvBC-P is a 70x40x40mm multi board gigabit ethernet network camera
with main focus on GigEVision protocol in combination with local image
preprocessing.
Power Supply is either VDC 48V or Pover over Ethernet (PoE).
2 System Components
2.1 CPU
Freescale MPC5200B CPU running at 400MHz core and 133MHz XLB/IPB.
64MB SDRAM @ 133MHz.
8 MByte Nor Flash on local bus.
1 serial ports. Console running on ttyS0 @ 115200 8N1.
2.2 PCI
PCI clock fixed at 66MHz. Arbitration inside FPGA.
Intel GD82541ER network MAC/PHY and FPGA connected.
2.3 FPGA
Altera Cyclone-II EP2C8 with PCI DMA engine.
Connects to Matrix Vision specific CCD/CMOS sensor interface.
Utilizes 64MB Nand Flash.
2.3.1 I/O @ FPGA
2 Outputs : photo coupler
2 Inputs : photo coupler
2.4 I2C
LM75 @ 0x90 for temperature monitoring.
EEPROM @ 0xA0 for vendor specifics.
image sensor interface (slave adresses depend on sensor)
3 Flash layout.
reset vector is 0x00000100, i.e. "LOWBOOT".
FF800000 u-boot
FF840000 u-boot script image
FF850000 redundant u-boot script image
FF860000 FPGA raw bit file
FF8A0000 tbd.
FF900000 root FS
FFC00000 kernel
FFFC0000 device tree blob
FFFD0000 redundant device tree blob
FFFE0000 environment
FFFF0000 redundant environment
mtd partitions are propagated to linux kernel via device tree blob.
4 Booting
On startup the bootscript @ FF840000 is executed. This script can be
exchanged easily. Default boot mode is "boot from flash", i.e. system
works stand-alone.
This behaviour depends on some environment variables :
"netboot" : yes ->try dhcp/bootp and boot from network.
A "dhcp_client_id" and "dhcp_vendor-class-identifier" can be used for
DHCP server configuration, e.g. to provide different images to
different devices.
During netboot the system tries to get 3 image files:
1. Kernel - name + data is given during BOOTP.
2. Initrd - name is stored in "initrd_name"
3. device tree blob - name is stored in "dtb_name"
Fallback files are the flash versions.

2
drivers/block/sym53c8xx.c
View File

@ -784,7 +784,7 @@ retry:
pccb->msgout[0]=SCSI_IDENTIFY;
transbytes=pccb->trans_bytes;
tmpptr=pccb->pdata;
pccb->pdata=&pccb->sense_buf[0];
pccb->pdata = &pccb->sense_buf[0];
datalen=pccb->datalen;
pccb->datalen=14;
tmpstat=pccb->status;

2
drivers/input/pc_keyb.c
View File

@ -64,7 +64,7 @@ static int kbd_read_data(void)
int val;
unsigned char status;
val=-1;
val = -1;
status = kbd_read_status();
if (status & KBD_STAT_OBF) {
val = kbd_read_input();

8
drivers/mtd/cfi_flash.c
View File

@ -301,7 +301,7 @@ static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
/*-----------------------------------------------------------------------
* make a proper sized command based on the port and chip widths
*/
static void flash_make_cmd (flash_info_t * info, ulong cmd, void *cmdbuf)
static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
{
int i;
int cword_offset;
@ -316,9 +316,9 @@ static void flash_make_cmd (flash_info_t * info, ulong cmd, void *cmdbuf)
val = *((uchar*)&cmd + cword_offset);
#else
cp_offset = i - 1;
val = *((uchar*)&cmd + sizeof(ulong) - cword_offset - 1);
val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
#endif
cp[cp_offset] = (cword_offset >= sizeof(ulong)) ? 0x00 : val;
cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
}
}
@ -433,7 +433,7 @@ static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
* Write a proper sized command to the correct address
*/
static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
uint offset, ulong cmd)
uint offset, u32 cmd)
{
void *addr;

4
drivers/pci/fsl_pci_init.c
View File

@ -59,8 +59,8 @@ fsl_pci_init(struct pci_controller *hose)
pci_dev_t dev = PCI_BDF(busno,0,0);
/* Initialize ATMU registers based on hose regions and flags */
volatile pot_t *po=&pci->pot[1]; /* skip 0 */
volatile pit_t *pi=&pci->pit[0]; /* ranges from: 3 to 1 */
volatile pot_t *po = &pci->pot[1]; /* skip 0 */
volatile pit_t *pi = &pci->pit[0]; /* ranges from: 3 to 1 */
#ifdef DEBUG
int neg_link_w;

12
drivers/pci/pci_sh4.c
View File

@ -74,3 +74,15 @@ int pci_sh4_init(struct pci_controller *hose)
hose->last_busno = pci_hose_scan(hose);
return 0;
}
int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)
{
return 0;
}
#ifdef CONFIG_PCI_SCAN_SHOW
int pci_print_dev(struct pci_controller *hose, pci_dev_t dev)
{
return 1;
}
#endif /* CONFIG_PCI_SCAN_SHOW */

12
drivers/serial/serial.c
View File

@ -124,8 +124,6 @@ static NS16550_t serial_ports[4] = {
static int calc_divisor (NS16550_t port)
{
uint32_t clk_divisor;
#ifdef CONFIG_OMAP1510
/* If can't cleanly clock 115200 set div to 1 */
if ((CFG_NS16550_CLK == 12000000) && (gd->baudrate == 115200)) {
@ -149,15 +147,11 @@ static int calc_divisor (NS16550_t port)
/* Compute divisor value. Normally, we should simply return:
* CFG_NS16550_CLK) / MODE_X_DIV / gd->baudrate
* but we need to round that value by adding 0.5 (2/4).
* but we need to round that value by adding 0.5.
* Rounding is especially important at high baud rates.
*/
clk_divisor = (((4 * CFG_NS16550_CLK) /
(MODE_X_DIV * gd->baudrate)) + 2) / 4;
debug("NS16550 clock divisor = %d\n", clk_divisor);
return clk_divisor;
return (CFG_NS16550_CLK + (gd->baudrate * (MODE_X_DIV / 2))) /
(MODE_X_DIV * gd->baudrate);
}
#if !defined(CONFIG_SERIAL_MULTI)

4
drivers/serial/usbtty.c
View File

@ -529,8 +529,8 @@ int drv_usbtty_init (void)
}
snlen = strlen(sn);
if (snlen > sizeof(serial_number) - 1) {
printf ("Warning: serial number %s is too long (%d > %d)\n",
sn, snlen, sizeof(serial_number) - 1);
printf ("Warning: serial number %s is too long (%d > %lu)\n",
sn, snlen, (ulong)(sizeof(serial_number) - 1));
snlen = sizeof(serial_number) - 1;
}
memcpy (serial_number, sn, snlen);

10
fs/jffs2/jffs2_1pass.c
View File

@ -1213,16 +1213,18 @@ jffs2_1pass_build_lists(struct part_info * part)
} else if (node->nodetype == JFFS2_NODETYPE_CLEANMARKER) {
if (node->totlen != sizeof(struct jffs2_unknown_node))
printf("OOPS Cleanmarker has bad size "
"%d != %u\n", node->totlen,
"%d != %zu\n",
node->totlen,
sizeof(struct jffs2_unknown_node));
} else if (node->nodetype == JFFS2_NODETYPE_PADDING) {
if (node->totlen < sizeof(struct jffs2_unknown_node))
printf("OOPS Padding has bad size "
"%d < %u\n", node->totlen,
"%d < %zu\n",
node->totlen,
sizeof(struct jffs2_unknown_node));
} else {
printf("Unknown node type: %x len %d "
"offset 0x%x\n", node->nodetype,
printf("Unknown node type: %x len %d offset 0x%x\n",
node->nodetype,
node->totlen, offset);
}
offset += ((node->totlen + 3) & ~3);

10
fs/jffs2/jffs2_nand_1pass.c
View File

@ -864,16 +864,18 @@ jffs2_1pass_build_lists(struct part_info * part)
} else if (node->nodetype == JFFS2_NODETYPE_CLEANMARKER) {
if (node->totlen != sizeof(struct jffs2_unknown_node))
printf("OOPS Cleanmarker has bad size "
"%d != %d\n", node->totlen,
"%d != %zu\n",
node->totlen,
sizeof(struct jffs2_unknown_node));
} else if (node->nodetype == JFFS2_NODETYPE_PADDING) {
if (node->totlen < sizeof(struct jffs2_unknown_node))
printf("OOPS Padding has bad size "
"%d < %d\n", node->totlen,
"%d < %zu\n",
node->totlen,
sizeof(struct jffs2_unknown_node));
} else {
printf("Unknown node type: %x len %d "
"offset 0x%x\n", node->nodetype,
printf("Unknown node type: %x len %d offset 0x%x\n",
node->nodetype,
node->totlen, offset);
}
offset += ((node->totlen + 3) & ~3);

29
include/asm-ppc/processor.h
View File

@ -426,6 +426,7 @@
/* e500 definitions */
#define SPRN_L1CFG0 0x203 /* L1 Cache Configuration Register 0 */
#define SPRN_L1CFG1 0x204 /* L1 Cache Configuration Register 1 */
#define SPRN_L2CFG0 0x207 /* L2 Cache Configuration Register 0 */
#define SPRN_L1CSR0 0x3f2 /* L1 Data Cache Control and Status Register 0 */
#define L1CSR0_CPE 0x00010000 /* Data Cache Parity Enable */
#define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */
@ -434,6 +435,21 @@
#define L1CSR1_CPE 0x00010000 /* Instruction Cache Parity Enable */
#define L1CSR1_ICFI 0x00000002 /* Instruction Cache Flash Invalidate */
#define L1CSR1_ICE 0x00000001 /* Instruction Cache Enable */
#define SPRN_L1CSR2 0x25e /* L1 Data Cache Control and Status Register 2 */
#define SPRN_L2CSR0 0x3f9 /* L2 Data Cache Control and Status Register 0 */
#define L2CSR0_L2E 0x80000000 /* L2 Cache Enable */
#define L2CSR0_L2PE 0x40000000 /* L2 Cache Parity/ECC Enable */
#define L2CSR0_L2WP 0x1c000000 /* L2 I/D Way Partioning */
#define L2CSR0_L2CM 0x03000000 /* L2 Cache Coherency Mode */
#define L2CSR0_L2FI 0x00200000 /* L2 Cache Flash Invalidate */
#define L2CSR0_L2IO 0x00100000 /* L2 Cache Instruction Only */
#define L2CSR0_L2DO 0x00010000 /* L2 Cache Data Only */
#define L2CSR0_L2REP 0x00003000 /* L2 Line Replacement Algo */
#define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */
#define L2CSR0_L2LFC 0x00000400 /* L2 Cache Lock Flash Clear */
#define L2CSR0_L2LOA 0x00000080 /* L2 Cache Lock Overflow Allocate */
#define L2CSR0_L2LO 0x00000020 /* L2 Cache Lock Overflow */
#define SPRN_L2CSR1 0x3fa /* L2 Data Cache Control and Status Register 1 */
#define SPRN_MMUCSR0 0x3f4 /* MMU control and status register 0 */
#define SPRN_MAS0 0x270 /* MMU Assist Register 0 */
@ -624,8 +640,12 @@
#define MCSRR1 SPRN_MCSRR1
#define L1CSR0 SPRN_L1CSR0
#define L1CSR1 SPRN_L1CSR1
#define L1CSR2 SPRN_L1CSR2
#define L1CFG0 SPRN_L1CFG0
#define L1CFG1 SPRN_L1CFG1
#define L2CFG0 SPRN_L2CFG0
#define L2CSR0 SPRN_L2CSR0
#define L2CSR1 SPRN_L2CSR1
#define MCSR SPRN_MCSR
#define MMUCSR0 SPRN_MMUCSR0
#define BUCSR SPRN_BUCSR
@ -889,6 +909,15 @@
/* Some parts define SVR[0:23] as the SOC version */
#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFFFFF) /* SOC Version fields */
/* whether MPC8xxxE (i.e. has SEC) */
#if defined(CONFIG_MPC85xx)
#define IS_E_PROCESSOR(svr) (svr & 0x80000)
#else
#if defined(CONFIG_MPC83XX)
#define IS_E_PROCESSOR(spridr) (!(spridr & 0x00010000))
#endif
#endif
/*
* SVR_SOC_VER() Version Values
*/

50
include/configs/MPC8544DS.h
View File

@ -148,8 +148,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
*/
#define CFG_BOOT_BLOCK 0xfc000000 /* boot TLB */
#define CFG_LBC_CACHE_BASE 0xf0000000 /* Localbus cacheable */
#define CFG_FLASH_BASE 0xff800000 /* start of FLASH 8M */
#define CFG_BR0_PRELIM 0xff801001
@ -158,10 +156,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CFG_OR0_PRELIM 0xff806e65
#define CFG_OR1_PRELIM 0xff806e65
#define CFG_FLASH_BANKS_LIST {0xfe800000,CFG_FLASH_BASE}
#define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE}
#define CFG_FLASH_QUIET_TEST
#define CFG_MAX_FLASH_BANKS 2 /* number of banks */
#define CFG_MAX_FLASH_BANKS 1 /* number of banks */
#define CFG_MAX_FLASH_SECT 128 /* sectors per device */
#undef CFG_FLASH_CHECKSUM
#define CFG_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
@ -203,30 +201,18 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
/* define to use L1 as initial stack */
#define CONFIG_L1_INIT_RAM 1
#define CFG_INIT_L1_LOCK 1
#define CFG_INIT_L1_ADDR 0xf4010000 /* Initial L1 address */
#define CFG_INIT_L1_END 0x00004000 /* End of used area in RAM */
#define CONFIG_L1_INIT_RAM
#define CFG_INIT_RAM_LOCK 1
#define CFG_INIT_RAM_ADDR 0xf4010000 /* Initial L1 address */
#define CFG_INIT_RAM_END 0x00004000 /* End of used area in RAM */
/* define to use L2SRAM as initial stack */
#undef CONFIG_L2_INIT_RAM
#define CFG_INIT_L2_ADDR 0xf8fc0000
#define CFG_INIT_L2_END 0x00040000 /* End of used area in RAM */
#ifdef CONFIG_L1_INIT_RAM
#define CFG_INIT_RAM_ADDR CFG_INIT_L1_ADDR
#define CFG_INIT_RAM_END CFG_INIT_L1_END
#else
#define CFG_INIT_RAM_ADDR CFG_INIT_L2_ADDR
#define CFG_INIT_RAM_END CFG_INIT_L2_END
#endif
#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
#define CFG_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
/* Serial Port - controlled on board with jumper J8
* open - index 2
@ -314,6 +300,26 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#if defined(CONFIG_PCI)
/*PCIE video card used*/
#define VIDEO_IO_OFFSET CFG_PCIE2_IO_PHYS
/*PCI video card used*/
/*#define VIDEO_IO_OFFSET CFG_PCI1_IO_PHYS*/
/* video */
#define CONFIG_VIDEO
#if defined(CONFIG_VIDEO)
#define CONFIG_BIOSEMU
#define CONFIG_CFB_CONSOLE
#define CONFIG_VIDEO_SW_CURSOR
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_ATI_RADEON_FB
#define CONFIG_VIDEO_LOGO
/*#define CONFIG_CONSOLE_CURSOR*/
#define CFG_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET
#endif
#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
@ -382,7 +388,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#if CFG_MONITOR_BASE > 0xfff80000
#define CFG_ENV_ADDR 0xfff80000
#else
#define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x40000)
#define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x70000)
#endif
#define CFG_ENV_SIZE 0x2000
#define CFG_ENV_SECT_SIZE 0x10000 /* 64K (one sector) */

38
include/configs/MPC8560ADS.h
View File

@ -538,29 +538,29 @@
#define CONFIG_BAUDRATE 115200
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyCPM\0" \
"ramdiskaddr=1000000\0" \
"ramdiskfile=your.ramdisk.u-boot\0" \
"fdtaddr=400000\0" \
"fdtfile=mpc8560ads.dtb\0"
"netdev=eth0\0" \
"consoledev=ttyCPM\0" \
"ramdiskaddr=1000000\0" \
"ramdiskfile=your.ramdisk.u-boot\0" \
"fdtaddr=400000\0" \
"fdtfile=mpc8560ads.dtb\0"
#define CONFIG_NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define CONFIG_RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND

8
include/configs/MPC8610HPCD.h
View File

@ -140,11 +140,11 @@
#endif
#endif
#define CFG_ID_EEPROM
#ifdef CFG_ID_EEPROM
#define CONFIG_ID_EEPROM
#endif
#define ID_EEPROM_ADDR 0x57
#define CFG_I2C_EEPROM_NXID
#define CFG_ID_EEPROM
#define CFG_I2C_EEPROM_ADDR 0x57
#define CFG_I2C_EEPROM_ADDR_LEN 1
#define CFG_FLASH_BASE 0xf0000000 /* start of FLASH 128M */

8
include/configs/MPC8641HPCN.h
View File

@ -152,11 +152,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CFG_DDR_CS5_BNDS 0x00000FFF /* Not done */
#endif
#define CFG_ID_EEPROM 1
#ifdef CFG_ID_EEPROM
#define CONFIG_ID_EEPROM
#endif
#define ID_EEPROM_ADDR 0x57
#define CFG_I2C_EEPROM_NXID
#define CFG_ID_EEPROM
#define CFG_I2C_EEPROM_ADDR 0x57
#define CFG_I2C_EEPROM_ADDR_LEN 1
/*
* In MPC8641HPCN, allocate 16MB flash spaces at fe000000 and ff000000.

316
include/configs/MVBC_P.h Normal file
View File

@ -0,0 +1,316 @@
/*
* (C) Copyright 2003-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* (C) Copyright 2004-2008
* Matrix-Vision GmbH, andre.schwarz@matrix-vision.de
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include <version.h>
#define CONFIG_MPC5xxx 1
#define CONFIG_MPC5200 1
#define CFG_MPC5XXX_CLKIN 33000000
#define BOOTFLAG_COLD 0x01
#define BOOTFLAG_WARM 0x02
#define CONFIG_MISC_INIT_R 1
#define CFG_CACHELINE_SIZE 32
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5
#endif
#define CONFIG_PSC_CONSOLE 1
#define CONFIG_BAUDRATE 115200
#define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200, 230400}
#define CONFIG_PCI 1
#define CONFIG_PCI_PNP 1
#undef CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
#define CONFIG_PCI_MEM_BUS 0x40000000
#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
#define CONFIG_PCI_MEM_SIZE 0x10000000
#define CONFIG_PCI_IO_BUS 0x50000000
#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
#define CONFIG_PCI_IO_SIZE 0x01000000
#define CFG_XLB_PIPELINING 1
#define CONFIG_HIGH_BATS 1
#define MV_CI mvBlueCOUGAR-P
#define MV_VCI mvBlueCOUGAR-P
#define MV_FPGA_DATA 0xff860000
#define MV_FPGA_SIZE 0x0003c886
#define MV_KERNEL_ADDR 0xffc00000
#define MV_INITRD_ADDR 0xff900000
#define MV_INITRD_LENGTH 0x00300000
#define MV_SCRATCH_ADDR 0x00000000
#define MV_SCRATCH_LENGTH MV_INITRD_LENGTH
#define MV_AUTOSCR_ADDR 0xff840000
#define MV_AUTOSCR_ADDR2 0xff850000
#define MV_DTB_ADDR 0xfffc0000
#define CONFIG_SHOW_BOOT_PROGRESS 1
#define MV_KERNEL_ADDR_RAM 0x00100000
#define MV_DTB_ADDR_RAM 0x00600000
#define MV_INITRD_ADDR_RAM 0x01000000
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
#define OF_CPU "PowerPC,5200@0"
#define OF_SOC "soc5200@f0000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
#define MV_DTB_NAME mvbc-p.dtb
#define CONFIG_OF_STDOUT_VIA_ALIAS 1
/*
* Supported commands
*/
#include <config_cmd_default.h>
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_PCI
#define CONFIG_CMD_FPGA
#undef CONFIG_WATCHDOG
#define CONFIG_BOOTP_VENDOREX
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_NTPSERVER
#define CONFIG_BOOTP_RANDOM_DELAY
#define CONFIG_BOOTP_SEND_HOSTNAME
/*
* Autoboot
*/
#define CONFIG_BOOTDELAY 2
#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_STOP_STR "s"
#define CONFIG_ZERO_BOOTDELAY_CHECK
#define CONFIG_RESET_TO_RETRY 1000
#define CONFIG_BOOTCOMMAND "if imi ${autoscr_addr}; \
then autoscr ${autoscr_addr}; \
else autoscr ${autoscr_addr2}; \
fi;"
#define CONFIG_BOOTARGS "root=/dev/ram ro rootfstype=squashfs"
#define CONFIG_ENV_OVERWRITE
#define XMK_STR(x) #x
#define MK_STR(x) XMK_STR(x)
#define CONFIG_EXTRA_ENV_SETTINGS \
"console_nr=0\0" \
"console=yes\0" \
"stdin=serial\0" \
"stdout=serial\0" \
"stderr=serial\0" \
"fpga=0\0" \
"fpgadata=" MK_STR(MV_FPGA_DATA) "\0" \
"fpgadatasize=" MK_STR(MV_FPGA_SIZE) "\0" \
"autoscr_addr=" MK_STR(MV_AUTOSCR_ADDR) "\0" \
"autoscr_addr2=" MK_STR(MV_AUTOSCR_ADDR2) "\0" \
"mv_kernel_addr=" MK_STR(MV_KERNEL_ADDR) "\0" \
"mv_kernel_addr_ram=" MK_STR(MV_KERNEL_ADDR_RAM) "\0" \
"mv_initrd_addr=" MK_STR(MV_INITRD_ADDR) "\0" \
"mv_initrd_addr_ram=" MK_STR(MV_INITRD_ADDR_RAM) "\0" \
"mv_initrd_length=" MK_STR(MV_INITRD_LENGTH) "\0" \
"mv_dtb_addr=" MK_STR(MV_DTB_ADDR) "\0" \
"mv_dtb_addr_ram=" MK_STR(MV_DTB_ADDR_RAM) "\0" \
"dtb_name=" MK_STR(MV_DTB_NAME) "\0" \
"mv_scratch_addr=" MK_STR(MV_SCRATCH_ADDR) "\0" \
"mv_scratch_length=" MK_STR(MV_SCRATCH_LENGTH) "\0" \
"mv_version=" U_BOOT_VERSION "\0" \
"dhcp_client_id=" MK_STR(MV_CI) "\0" \
"dhcp_vendor-class-identifier=" MK_STR(MV_VCI) "\0" \
"netretry=no\0" \
"use_static_ipaddr=no\0" \
"static_ipaddr=192.168.90.10\0" \
"static_netmask=255.255.255.0\0" \
"static_gateway=0.0.0.0\0" \
"initrd_name=uInitrd.mvbc-p-rfs\0" \
"zcip=no\0" \
"netboot=yes\0" \
"mvtest=Ff\0" \
"tried_bootfromflash=no\0" \
"tried_bootfromnet=no\0" \
"use_dhcp=yes\0" \
"gev_start=yes\0" \
"mvbcdma_debug=0\0" \
"mvbcia_debug=0\0" \
"propdev_debug=0\0" \
"gevss_debug=0\0" \
"watchdog=1\0" \
""
#undef XMK_STR
#undef MK_STR
/*
* IPB Bus clocking configuration.
*/
#define CFG_IPBCLK_EQUALS_XLBCLK
#define CFG_PCICLK_EQUALS_IPBCLK_DIV2
/*
* Flash configuration
*/
#undef CONFIG_FLASH_16BIT
#define CFG_FLASH_CFI
#define CFG_FLASH_CFI_DRIVER
#define CFG_FLASH_CFI_AMD_RESET 1
#define CFG_FLASH_EMPTY_INFO
#define CFG_FLASH_ERASE_TOUT 50000
#define CFG_FLASH_WRITE_TOUT 1000
#define CFG_MAX_FLASH_BANKS 1
#define CFG_MAX_FLASH_SECT 256
#define CFG_LOWBOOT
#define CFG_FLASH_BASE TEXT_BASE
#define CFG_FLASH_SIZE 0x00800000
/*
* Environment settings
*/
#define CFG_ENV_IS_IN_FLASH
#undef CFG_FLASH_PROTECTION
#define CFG_ENV_ADDR 0xFFFE0000
#define CFG_ENV_SIZE 0x10000
#define CFG_ENV_SECT_SIZE 0x10000
#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR+CFG_ENV_SIZE)
#define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE
/*
* Memory map
*/
#define CFG_MBAR 0xF0000000
#define CFG_SDRAM_BASE 0x00000000
#define CFG_DEFAULT_MBAR 0x80000000
#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
#define CFG_GBL_DATA_SIZE 128
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
#define CFG_MONITOR_BASE TEXT_BASE
#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
#define CFG_RAMBOOT 1
#endif
/* CFG_MONITOR_LEN must be a multiple of CFG_ENV_SECT_SIZE */
#define CFG_MONITOR_LEN (512 << 10)
#define CFG_MALLOC_LEN (512 << 10)
#define CFG_BOOTMAPSZ (8 << 20)
/*
* Ethernet configuration
*/
#define CONFIG_NET_MULTI
#define CONFIG_NET_RETRY_COUNT 5
#define CONFIG_E1000
#define CONFIG_E1000_FALLBACK_MAC 0xb6b445ebfbc0
#undef CONFIG_MPC5xxx_FEC
#undef CONFIG_PHY_ADDR
#define CONFIG_NETDEV eth0
/*
* Miscellaneous configurable options
*/
#define CFG_HUSH_PARSER
#define CONFIG_CMDLINE_EDITING
#define CFG_PROMPT_HUSH_PS2 "> "
#undef CFG_LONGHELP
#define CFG_PROMPT "=> "
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CBSIZE 1024
#else
#define CFG_CBSIZE 256
#endif
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
#define CFG_MAXARGS 16
#define CFG_BARGSIZE CFG_CBSIZE
#define CFG_MEMTEST_START 0x00800000
#define CFG_MEMTEST_END 0x02f00000
#define CFG_HZ 1000
/* default load address */
#define CFG_LOAD_ADDR 0x02000000
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 0x00200000
/*
* Various low-level settings
*/
#define CFG_GPS_PORT_CONFIG 0x20000004
#define CFG_HID0_INIT (HID0_ICE | HID0_ICFI)
#define CFG_HID0_FINAL HID0_ICE
#define CFG_BOOTCS_START CFG_FLASH_BASE
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
#define CFG_BOOTCS_CFG 0x00047800
#define CFG_CS0_START CFG_FLASH_BASE
#define CFG_CS0_SIZE CFG_FLASH_SIZE
#define CFG_CS_BURST 0x000000f0
#define CFG_CS_DEADCYCLE 0x33333303
#define CFG_RESET_ADDRESS 0x00000100
#undef FPGA_DEBUG
#undef CFG_FPGA_PROG_FEEDBACK
#define CONFIG_FPGA CFG_ALTERA_CYCLON2
#define CONFIG_FPGA_ALTERA 1
#define CONFIG_FPGA_CYCLON2 1
#define CONFIG_FPGA_COUNT 1
#endif

9
include/configs/pxa255_idp.h
View File

@ -126,7 +126,10 @@
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTCOMMAND "bootm 40000"
#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200"
#define CONFIG_CMDLINE_TAG
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
/* #define CONFIG_INITRD_TAG 1 */
/*
* Current memory map for Vibren supplied Linux images:
@ -208,10 +211,6 @@
/* "protect off" */
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
/* #define CONFIG_INITRD_TAG 1 */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */

128
include/configs/sbc8560.h
View File

@ -24,8 +24,8 @@
* MA 02111-1307 USA
*/
/* mpc8560ads board configuration file */
/* please refer to doc/README.mpc85xx for more info */
/* sbc8560 board configuration file */
/* please refer to doc/README.sbc8560 for more info */
/* make sure you change the MAC address and other network params first,
* search for CONFIG_ETHADDR,CONFIG_SERVERIP,etc in this file
*/
@ -102,11 +102,11 @@
#define CFG_SDRAM_SIZE 512 /* DDR is 512MB */
#define SPD_EEPROM_ADDRESS 0x55 /* DDR DIMM */
#undef CONFIG_DDR_ECC /* only for ECC DDR module */
#undef CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
#undef CONFIG_DDR_ECC /* only for ECC DDR module */
#undef CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
#if defined(CONFIG_MPC85xx_REV1)
#define CONFIG_DDR_DLL /* possible DLL fix needed */
#define CONFIG_DDR_DLL /* possible DLL fix needed */
#endif
#undef CONFIG_CLOCKS_IN_MHZ
@ -177,8 +177,8 @@
#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
/* Serial Port */
#undef CONFIG_CONS_ON_SCC /* define if console on SCC */
#undef CONFIG_CONS_NONE /* define if console on something else */
#undef CONFIG_CONS_ON_SCC /* define if console on SCC */
#undef CONFIG_CONS_NONE /* define if console on something else */
#define CONFIG_CONS_INDEX 1
#undef CONFIG_SERIAL_SOFTWARE_FIFO
@ -200,6 +200,11 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_OF_STDOUT_VIA_ALIAS 1
/*
* I2C
*/
@ -215,16 +220,28 @@
#define CFG_PCI_MEM_PHYS 0xC0000000
#define CFG_PCI_MEM_SIZE 0x10000000
#if defined(CONFIG_TSEC_ENET) /* TSEC Ethernet port */
#ifdef CONFIG_TSEC_ENET
# define CONFIG_NET_MULTI 1
# define CONFIG_MII 1 /* MII PHY management */
# define CONFIG_MPC85xx_TSEC1
# define CONFIG_MPC85xx_TSEC1_NAME "TSEC0"
# define TSEC1_PHY_ADDR 25
# define TSEC1_PHYIDX 0
/* Options are: TSEC0 */
# define CONFIG_ETHPRIME "TSEC0"
#ifndef CONFIG_NET_MULTI
#define CONFIG_NET_MULTI 1
#endif
#ifndef CONFIG_MII
#define CONFIG_MII 1 /* MII PHY management */
#endif
#define CONFIG_TSEC1 1
#define CONFIG_TSEC1_NAME "TSEC0"
#define CONFIG_TSEC2 1
#define CONFIG_TSEC2_NAME "TSEC1"
#define TSEC1_PHY_ADDR 0x19
#define TSEC2_PHY_ADDR 0x1a
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
#define TSEC1_FLAGS TSEC_GIGABIT
#define TSEC2_FLAGS TSEC_GIGABIT
/* Options are: TSEC[0-1] */
#define CONFIG_ETHPRIME "TSEC0"
#elif defined(CONFIG_ETHER_ON_FCC) /* CPM FCC Ethernet */
@ -272,20 +289,20 @@
* FLASH and environment organization
*/
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
#if 0
#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
#define CFG_FLASH_PROTECTION /* use hardware protection */
#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
#define CFG_FLASH_PROTECTION /* use hardware protection */
#endif
#define CFG_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
#define CFG_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
#undef CFG_FLASH_CHECKSUM
#define CFG_FLASH_ERASE_TOUT 200000 /* Timeout for Flash Erase (in ms) */
#define CFG_FLASH_WRITE_TOUT 50000 /* Timeout for Flash Write (in ms) */
#define CFG_FLASH_ERASE_TOUT 200000 /* Timeout for Flash Erase (in ms) */
#define CFG_FLASH_WRITE_TOUT 50000 /* Timeout for Flash Write (in ms) */
#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
#if 0
/* XXX This doesn't work and I don't want to fix it */
@ -315,9 +332,8 @@
#define CFG_ENV_SIZE 0x2000
#endif
#define CONFIG_BOOTARGS "root=/dev/nfs rw nfsroot=192.168.0.251:/tftpboot ip=192.168.0.105:192.168.0.251::255.255.255.0:sbc8560:eth0:off console=ttyS0,9600"
#define CONFIG_BOOTARGS "root=/dev/nfs rw ip=dhcp console=ttyS0,9600"
/*#define CONFIG_BOOTARGS "root=/dev/ram rw console=ttyS0,115200"*/
#define CONFIG_BOOTCOMMAND "bootm 0xff800000 0xffa00000"
#define CONFIG_BOOTDELAY 5 /* -1 disable autoboot */
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
@ -389,25 +405,57 @@
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
/*Note: change below for your network setting!!! */
#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC)
# define CONFIG_ETHADDR 00:01:af:07:9b:8a
# define CONFIG_HAS_ETH1
# define CONFIG_ETH1ADDR 00:01:af:07:9b:8b
# define CONFIG_HAS_ETH2
# define CONFIG_ETH2ADDR 00:01:af:07:9b:8c
#define CONFIG_HAS_ETH0
#define CONFIG_HAS_ETH1
#endif
#define CONFIG_SERVERIP 192.168.0.131
#define CONFIG_IPADDR 192.168.0.105
#define CONFIG_GATEWAYIP 0.0.0.0
#define CONFIG_NETMASK 255.255.255.0
/* You can compile in a MAC address and your custom net settings by using
* the following syntax. Your board should be marked with the assigned
* MAC addresses directly on it.
*
* #define CONFIG_ETHADDR de:ad:be:ef:00:00
* #define CONFIG_ETH1ADDR fa:ke:ad:dr:es:s!
* #define CONFIG_SERVERIP <server ip>
* #define CONFIG_IPADDR <board ip>
* #define CONFIG_GATEWAYIP <gateway ip>
* #define CONFIG_NETMASK <your netmask>
*/
#define CONFIG_HOSTNAME SBC8560
#define CONFIG_ROOTPATH /home/ppc
#define CONFIG_BOOTFILE pImage
#define CONFIG_BOOTFILE uImage
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
"ramdiskaddr=2000000\0" \
"ramdiskfile=ramdisk.uboot\0" \
"fdtaddr=c00000\0" \
"fdtfile=sbc8560.dtb\0"
#define CONFIG_NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define CONFIG_RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
#endif /* __CONFIG_H */

6
include/fdt_support.h
View File

@ -56,6 +56,12 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd);
static inline void fdt_fixup_dr_usb(void *blob, bd_t *bd) {}
#endif /* CONFIG_HAS_FSL_DR_USB */
#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83XX)
void fdt_fixup_crypto_node(void *blob, int sec_rev);
#else
static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {}
#endif
#ifdef CONFIG_OF_BOARD_SETUP
void ft_board_setup(void *blob, bd_t *bd);
void ft_cpu_setup(void *blob, bd_t *bd);

29
include/mpc5xxx.h
View File

@ -198,6 +198,35 @@
#define GPIO_PSC3_9 0x04000000UL
#define GPIO_PSC1_4 0x01000000UL
#define MPC5XXX_GPIO_SIMPLE_PSC6_3 0x20000000UL
#define MPC5XXX_GPIO_SIMPLE_PSC6_2 0x10000000UL
#define MPC5XXX_GPIO_SIMPLE_PSC3_7 0x00002000UL
#define MPC5XXX_GPIO_SIMPLE_PSC3_6 0x00001000UL
#define MPC5XXX_GPIO_SIMPLE_PSC3_3 0x00000800UL
#define MPC5XXX_GPIO_SIMPLE_PSC3_2 0x00000400UL
#define MPC5XXX_GPIO_SIMPLE_PSC3_1 0x00000200UL
#define MPC5XXX_GPIO_SIMPLE_PSC3_0 0x00000100UL
#define MPC5XXX_GPIO_SIMPLE_PSC2_3 0x00000080UL
#define MPC5XXX_GPIO_SIMPLE_PSC2_2 0x00000040UL
#define MPC5XXX_GPIO_SIMPLE_PSC2_1 0x00000020UL
#define MPC5XXX_GPIO_SIMPLE_PSC2_0 0x00000010UL
#define MPC5XXX_GPIO_SIMPLE_PSC1_3 0x00000008UL
#define MPC5XXX_GPIO_SIMPLE_PSC1_2 0x00000004UL
#define MPC5XXX_GPIO_SIMPLE_PSC1_1 0x00000002UL
#define MPC5XXX_GPIO_SIMPLE_PSC1_0 0x00000001UL
#define MPC5XXX_GPIO_SINT_PSC3_5 0x02
#define MPC5XXX_GPIO_SINT_PSC3_4 0x01
#define MPC5XXX_GPIO_WKUP_7 0x80
#define MPC5XXX_GPIO_WKUP_6 0x40
#define MPC5XXX_GPIO_WKUP_PSC6_1 0x20
#define MPC5XXX_GPIO_WKUP_PSC6_0 0x10
#define MPC5XXX_GPIO_WKUP_ETH17 0x08
#define MPC5XXX_GPIO_WKUP_PSC3_9 0x04
#define MPC5XXX_GPIO_WKUP_PSC2_4 0x02
#define MPC5XXX_GPIO_WKUP_PSC1_4 0x01
/* PCI registers */
#define MPC5XXX_PCI_CMD (MPC5XXX_PCI + 0x04)
#define MPC5XXX_PCI_CFG (MPC5XXX_PCI + 0x0c)

7
include/mpc83xx.h
View File

@ -61,21 +61,26 @@
#endif
#define PARTID_NO_E(spridr) ((spridr & 0xFFFE0000) >> 16)
#define IS_E_PROCESSOR(spridr) (!(spridr & 0x00010000)) /* has SEC */
#define SPR_FAMILY(spridr) ((spridr & 0xFFF00000) >> 20)
#define SPR_831X_FAMILY 0x80B
#define SPR_8311 0x80B2
#define SPR_8313 0x80B0
#define SPR_8314 0x80B6
#define SPR_8315 0x80B4
#define SPR_832X_FAMILY 0x806
#define SPR_8321 0x8066
#define SPR_8323 0x8062
#define SPR_834X_FAMILY 0x803
#define SPR_8343 0x8036
#define SPR_8347_TBGA_ 0x8032
#define SPR_8347_PBGA_ 0x8034
#define SPR_8349 0x8030
#define SPR_836X_FAMILY 0x804
#define SPR_8358_TBGA_ 0x804A
#define SPR_8358_PBGA_ 0x804E
#define SPR_8360 0x8048
#define SPR_837X_FAMILY 0x80C
#define SPR_8377 0x80C6
#define SPR_8378 0x80C4
#define SPR_8379 0x80C2

12
lib_generic/vsprintf.c
View File

@ -262,7 +262,9 @@ int vsprintf(char *buf, const char *fmt, va_list args)
/* get the conversion qualifier */
qualifier = -1;
if (*fmt == 'h' || *fmt == 'l' || *fmt == 'q') {
if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' ||
*fmt == 'Z' || *fmt == 'z' || *fmt == 't' ||
*fmt == 'q' ) {
qualifier = *fmt;
if (qualifier == 'l' && *(fmt+1) == 'l') {
qualifier = 'q';
@ -355,9 +357,13 @@ int vsprintf(char *buf, const char *fmt, va_list args)
num = va_arg(args, unsigned long long);
else
#endif
if (qualifier == 'l')
if (qualifier == 'l') {
num = va_arg(args, unsigned long);
else if (qualifier == 'h') {
} else if (qualifier == 'Z' || qualifier == 'z') {
num = va_arg(args, size_t);
} else if (qualifier == 't') {
num = va_arg(args, ptrdiff_t);
} else if (qualifier == 'h') {
num = (unsigned short) va_arg(args, int);
if (flags & SIGN)
num = (short) num;

4
lib_m68k/board.c
View File

@ -347,11 +347,11 @@ board_init_f (ulong bootflag)
addr_sp -= sizeof (bd_t);
bd = (bd_t *) addr_sp;
gd->bd = bd;
debug ("Reserving %d Bytes for Board Info at: %08lx\n",
debug ("Reserving %zu Bytes for Board Info at: %08lx\n",
sizeof (bd_t), addr_sp);
addr_sp -= sizeof (gd_t);
id = (gd_t *) addr_sp;
debug ("Reserving %d Bytes for Global Data at: %08lx\n",
debug ("Reserving %zu Bytes for Global Data at: %08lx\n",
sizeof (gd_t), addr_sp);
/* Reserve memory for boot params. */

4
lib_mips/board.c
View File

@ -242,12 +242,12 @@ void board_init_f(ulong bootflag)
addr_sp -= sizeof(bd_t);
bd = (bd_t *)addr_sp;
gd->bd = bd;
debug ("Reserving %d Bytes for Board Info at: %08lx\n",
debug ("Reserving %zu Bytes for Board Info at: %08lx\n",
sizeof(bd_t), addr_sp);
addr_sp -= sizeof(gd_t);
id = (gd_t *)addr_sp;
debug ("Reserving %d Bytes for Global Data at: %08lx\n",
debug ("Reserving %zu Bytes for Global Data at: %08lx\n",
sizeof (gd_t), addr_sp);
/* Reserve memory for boot params.

14
lib_mips/bootm.c
View File

@ -54,7 +54,7 @@ void do_bootm_linux (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[],
char *commandline = getenv ("bootargs");
char env_buf[12];
int ret;
const char *cp;
char *cp;
/* find kernel entry point */
if (images->legacy_hdr_valid) {
@ -89,15 +89,11 @@ void do_bootm_linux (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[],
linux_params_init (UNCACHED_SDRAM (gd->bd->bi_boot_params), commandline);
#ifdef CONFIG_MEMSIZE_IN_BYTES
sprintf (env_buf, "%lu", gd->ram_size);
#ifdef DEBUG
printf ("## Giving linux memsize in bytes, %lu\n", gd->ram_size);
#endif
sprintf (env_buf, "%lu", (ulong)gd->ram_size);
debug ("## Giving linux memsize in bytes, %lu\n", (ulong)gd->ram_size);
#else
sprintf (env_buf, "%lu", gd->ram_size >> 20);
#ifdef DEBUG
printf ("## Giving linux memsize in MB, %lu\n", gd->ram_size >> 20);
#endif
sprintf (env_buf, "%lu", (ulong)(gd->ram_size >> 20));
debug ("## Giving linux memsize in MB, %lu\n", (ulong)(gd->ram_size >> 20));
#endif /* CONFIG_MEMSIZE_IN_BYTES */
linux_env_set ("memsize", env_buf);

4
lib_ppc/board.c
View File

@ -524,11 +524,11 @@ void board_init_f (ulong bootflag)
addr_sp -= sizeof (bd_t);
bd = (bd_t *) addr_sp;
gd->bd = bd;
debug ("Reserving %d Bytes for Board Info at: %08lx\n",
debug ("Reserving %zu Bytes for Board Info at: %08lx\n",
sizeof (bd_t), addr_sp);
addr_sp -= sizeof (gd_t);
id = (gd_t *) addr_sp;
debug ("Reserving %d Bytes for Global Data at: %08lx\n",
debug ("Reserving %zu Bytes for Global Data at: %08lx\n",
sizeof (gd_t), addr_sp);
/*

4
net/bootp.c
View File

@ -313,7 +313,7 @@ BootpHandler(uchar * pkt, unsigned dest, unsigned src, unsigned len)
Bootp_t *bp;
char *s;
debug ("got BOOTP packet (src=%d, dst=%d, len=%d want_len=%d)\n",
debug ("got BOOTP packet (src=%d, dst=%d, len=%d want_len=%zu)\n",
src, dest, len, sizeof (Bootp_t));
bp = (Bootp_t *)pkt;
@ -924,8 +924,6 @@ DhcpHandler(uchar * pkt, unsigned dest, unsigned src, unsigned len)
if (NetReadLong((ulong*)&bp->bp_vend[0]) == htonl(BOOTP_VENDOR_MAGIC))
DhcpOptionsProcess((u8 *)&bp->bp_vend[4], bp);
BootpCopyNetParams(bp); /* Store net params from reply */
NetSetTimeout(TIMEOUT * CFG_HZ, BootpTimeout);
DhcpSendRequestPkt(bp);
#ifdef CFG_BOOTFILE_PREFIX

2
net/eth.c
View File

@ -627,7 +627,7 @@ int eth_initialize(bd_t *bis)
#if defined(CONFIG_MCF52x2)
mcf52x2_miiphy_initialize(bis);
#endif
#if defined(CONFIG_NETARM)
#if defined(CONFIG_DRIVER_NS7520_ETHERNET)
ns7520_miiphy_initialize(bis);
#endif
#if defined(CONFIG_DRIVER_TI_EMAC)

2
net/net.c
View File

@ -1390,7 +1390,7 @@ NetReceive(volatile uchar * inpkt, int len)
puts ("Got IP\n");
#endif
if (len < IP_HDR_SIZE) {
debug ("len bad %d < %ld\n", len, IP_HDR_SIZE);
debug ("len bad %d < %lu\n", len, (ulong)IP_HDR_SIZE);
return;
}
if (len < ntohs(ip->ip_len)) {

3
tools/.gitignore vendored
View File

@ -6,8 +6,11 @@
/img2srec
/md5.c
/mkimage
/mpc86x_clk
/ncp
/sha1.c
/ubsha1
/inca-swap-bytes
/image.c
/fdt.c
/fdt_ro.c

4
tools/updater/cmd_flash.c
View File

@ -187,7 +187,7 @@ int flash_sect_erase (ulong addr_first, ulong addr_last)
erased = 0;
for (bank=0,info=&flash_info[0]; bank < CFG_MAX_FLASH_BANKS; ++bank, ++info) {
for (bank=0,info = &flash_info[0]; bank < CFG_MAX_FLASH_BANKS; ++bank, ++info) {
ulong b_end;
int sect;
@ -366,7 +366,7 @@ int flash_sect_protect (int p, ulong addr_first, ulong addr_last)
protected = 0;
for (bank=0,info=&flash_info[0]; bank < CFG_MAX_FLASH_BANKS; ++bank, ++info) {
for (bank=0,info = &flash_info[0]; bank < CFG_MAX_FLASH_BANKS; ++bank, ++info) {
ulong b_end;
int sect;

2
tools/updater/flash.c
View File

@ -93,7 +93,7 @@ addr2info (ulong addr)
flash_info_t *info;
int i;
for (i=0, info=&flash_info[0]; i<CFG_MAX_FLASH_BANKS; ++i, ++info) {
for (i=0, info = &flash_info[0]; i<CFG_MAX_FLASH_BANKS; ++i, ++info) {
if (info->flash_id != FLASH_UNKNOWN &&
addr >= info->start[0] &&
/* WARNING - The '- 1' is needed if the flash