Convert CONFIG_SYS_NAND_HW_ECC to Kconfig
This converts the following to Kconfig: CONFIG_SYS_NAND_HW_ECC Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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@ -86,7 +86,6 @@ CONFIG_DM_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_USE_FLASH_BBT=y
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CONFIG_NAND_DAVINCI=y
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CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
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CONFIG_SYS_NAND_HW_ECC_OOBFIRST=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
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CONFIG_SYS_NAND_PAGE_COUNT=0x40
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@ -79,7 +79,6 @@ CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_USE_FLASH_BBT=y
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CONFIG_NAND_DAVINCI=y
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CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=30000000
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CONFIG_SPI_FLASH_STMICRO=y
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@ -54,7 +54,6 @@ CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_USE_FLASH_BBT=y
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CONFIG_NAND_DAVINCI=y
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CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=30000000
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CONFIG_SPI_FLASH_STMICRO=y
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@ -79,7 +79,6 @@ CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_USE_FLASH_BBT=y
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CONFIG_NAND_DAVINCI=y
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CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=30000000
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CONFIG_SPI_FLASH_STMICRO=y
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@ -54,7 +54,6 @@ CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_USE_FLASH_BBT=y
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CONFIG_NAND_DAVINCI=y
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CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=30000000
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CONFIG_SPI_FLASH_STMICRO=y
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@ -79,7 +79,6 @@ CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_USE_FLASH_BBT=y
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CONFIG_NAND_DAVINCI=y
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CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=30000000
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CONFIG_SPI_FLASH_STMICRO=y
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@ -57,7 +57,6 @@ CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_USE_FLASH_BBT=y
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CONFIG_NAND_DAVINCI=y
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CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=30000000
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CONFIG_SPI_FLASH_STMICRO=y
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@ -83,7 +83,6 @@ CONFIG_DM_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_USE_FLASH_BBT=y
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CONFIG_NAND_DAVINCI=y
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CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST=y
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CONFIG_SYS_NAND_HW_ECC_OOBFIRST=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
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CONFIG_SYS_NAND_PAGE_COUNT=0x40
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@ -148,9 +148,21 @@ config NAND_DAVINCI
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Enable this driver for NAND flash controllers available in TI Davinci
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and Keystone2 platforms
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choice
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prompt "Type of ECC used on NAND"
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default SYS_NAND_4BIT_HW_ECC_OOBFIRST
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depends on NAND_DAVINCI
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config SYS_NAND_HW_ECC
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bool "Use 1-bit HW ECC"
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config SYS_NAND_4BIT_HW_ECC_OOBFIRST
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bool "Use 4-bit HW ECC with OOB at the front"
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depends on NAND_DAVINCI
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config SYS_NAND_SOFT_ECC
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bool "Use software ECC"
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endchoice
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config KEYSTONE_RBL_NAND
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depends on ARCH_KEYSTONE
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@ -766,10 +766,7 @@ static void davinci_nand_init(struct nand_chip *nand)
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nand->ecc.calculate = nand_davinci_calculate_ecc;
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nand->ecc.correct = nand_davinci_correct_data;
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nand->ecc.hwctl = nand_davinci_enable_hwecc;
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#else
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nand->ecc.mode = NAND_ECC_SOFT;
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#endif /* CONFIG_SYS_NAND_HW_ECC */
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#ifdef CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
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#elif defined(CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST)
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nand->ecc.mode = NAND_ECC_HW_OOB_FIRST;
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nand->ecc.size = 512;
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nand->ecc.bytes = 10;
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@ -778,6 +775,8 @@ static void davinci_nand_init(struct nand_chip *nand)
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nand->ecc.correct = nand_davinci_4bit_correct_data;
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nand->ecc.hwctl = nand_davinci_4bit_enable_hwecc;
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nand->ecc.layout = &nand_davinci_4bit_layout_oobfirst;
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#elif defined(CONFIG_SYS_NAND_SOFT_ECC)
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nand->ecc.mode = NAND_ECC_SOFT;
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#endif
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/* Set address of hardware control function */
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nand->cmd_ctrl = nand_davinci_hwcontrol;
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@ -112,7 +112,6 @@
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#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
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#define CONFIG_SYS_NAND_MASK_CLE 0x10
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#define CONFIG_SYS_NAND_MASK_ALE 0x8
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#undef CONFIG_SYS_NAND_HW_ECC
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#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000
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#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
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@ -110,7 +110,6 @@
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#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
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#define CONFIG_SYS_NAND_MASK_CLE 0x10
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#define CONFIG_SYS_NAND_MASK_ALE 0x8
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#undef CONFIG_SYS_NAND_HW_ECC
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#define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
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#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
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#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000
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