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arm: ls1012a: Enable PCIe and E1000 in defconfigs

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The patch enables PCIe and E1000 in ls1012a defconfigs and
removes unused PCIe related macro defines

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Minghuan Lian 2016-12-13 14:54:19 +08:00 committed by York Sun
parent 8808aeb7a9
commit 41873d1571
5 changed files with 13 additions and 34 deletions
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5
configs/ls1012afrdm_qspi_defconfig
View File

@ -30,9 +30,14 @@ CONFIG_DM=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y

5
configs/ls1012aqds_qspi_defconfig
View File

@ -31,7 +31,6 @@ CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
@ -39,3 +38,7 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y

5
configs/ls1012ardb_qspi_defconfig
View File

@ -31,7 +31,6 @@ CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
@ -39,3 +38,7 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y

16
include/configs/ls1012aqds.h
View File

@ -154,24 +154,8 @@
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
#define FSL_PCIE_COMPAT "fsl,ls1043a-pcie"
#define CONFIG_SYS_PCI_64BIT
#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF 0x00000000
#define CONFIG_SYS_PCIE_CFG0_SIZE 0x00001000 /* 4k */
#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF 0x00001000
#define CONFIG_SYS_PCIE_CFG1_SIZE 0x00001000 /* 4k */
#define CONFIG_SYS_PCIE_IO_BUS 0x00000000
#define CONFIG_SYS_PCIE_IO_PHYS_OFF 0x00010000
#define CONFIG_SYS_PCIE_IO_SIZE 0x00010000 /* 64k */
#define CONFIG_SYS_PCIE_MEM_BUS 0x08000000
#define CONFIG_SYS_PCIE_MEM_PHYS_OFF 0x04000000
#define CONFIG_SYS_PCIE_MEM_SIZE 0x80000000 /* 128M */
#define CONFIG_NET_MULTI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_CMD_PCI

16
include/configs/ls1012ardb.h
View File

@ -67,24 +67,8 @@
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
#define FSL_PCIE_COMPAT "fsl,ls1043a-pcie"
#define CONFIG_SYS_PCI_64BIT
#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF 0x00000000
#define CONFIG_SYS_PCIE_CFG0_SIZE 0x00001000 /* 4k */
#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF 0x00001000
#define CONFIG_SYS_PCIE_CFG1_SIZE 0x00001000 /* 4k */
#define CONFIG_SYS_PCIE_IO_BUS 0x00000000
#define CONFIG_SYS_PCIE_IO_PHYS_OFF 0x00010000
#define CONFIG_SYS_PCIE_IO_SIZE 0x00010000 /* 64k */
#define CONFIG_SYS_PCIE_MEM_BUS 0x08000000
#define CONFIG_SYS_PCIE_MEM_PHYS_OFF 0x04000000
#define CONFIG_SYS_PCIE_MEM_SIZE 0x80000000 /* 128M */
#define CONFIG_NET_MULTI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_CMD_PCI