Prepare for SoC rework of ARM code:
- rename CONFIG_BOOTBINFUNC into CONFIG_INIT_CRITICAL - rename memsetup into lowlevel_init (function name and source files)
This commit is contained in:
wdenk
parent
414eec35e3
commit
400558b561
@ -2,6 +2,10 @@
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Changes for U-Boot 1.1.3:
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======================================================================
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* Prepare for SoC rework of ARM code:
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- rename CONFIG_BOOTBINFUNC into CONFIG_INIT_CRITICAL
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- rename memsetup into lowlevel_init (function name and source files)
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* Fix problems with SNTP support;
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enable SNTP support in some boards.
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9
README
9
README
@ -2128,6 +2128,15 @@ Low Level (hardware related) configuration options:
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This only takes effect if the memory commands are activated
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globally (CFG_CMD_MEM).
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- CONFIG_INIT_CRITICAL
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[ARM only] If this variable is NOT defined, then
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certain critical initializations (like setting up the
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memory controller) are omitted. Normally this
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variable MUST be defined for all boards. The only
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exception is when U-Boot is loaded (to RAM) by some
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other boot loader or by a debugger which performs
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these intializations itself.
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Building the Software:
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======================
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@ -80,8 +80,8 @@ BCR_DB1110: .long ASSABET_BCR_DB1110
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LEDS: .long NEPONSET_LEDS
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.globl memsetup
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memsetup:
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.globl lowlevel_init
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lowlevel_init:
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/* Setting up the memory and stuff */
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@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS := cerf250.o flash.o
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SOBJS := memsetup.o
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SOBJS := lowlevel_init.o
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$(LIB): $(OBJS) $(SOBJS)
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$(AR) crv $@ $(OBJS) $(SOBJS)
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@ -3,7 +3,7 @@
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*
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* NOTE: I haven't clean this up considerably, just enough to get it
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* running. See hal_platform_setup.h for the source. See
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* board/cradle/memsetup.S for another PXA250 setup that is
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* board/cradle/lowlevel_init.S for another PXA250 setup that is
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* much cleaner.
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*
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* See file CREDITS for list of people who contributed to this
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@ -43,8 +43,8 @@ DRAM_SIZE: .long CFG_DRAM_SIZE
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* Memory setup
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*/
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.globl memsetup
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memsetup:
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.globl lowlevel_init
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lowlevel_init:
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/* Set up GPIO pins first ----------------------------------------- */
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@ -403,9 +403,9 @@ initclks:
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#endif
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/* ---------------------------------------------------------------- */
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/* End memsetup */
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/* End lowlevel_init */
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/* ---------------------------------------------------------------- */
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endmemsetup:
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endlowlevel_init:
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mov pc, lr
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@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS := cradle.o flash.o
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SOBJS := memsetup.o
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SOBJS := lowlevel_init.o
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$(LIB): $(OBJS) $(SOBJS)
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$(AR) crv $@ $(OBJS) $(SOBJS)
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@ -43,8 +43,8 @@ DRAM_SIZE: .long CFG_DRAM_SIZE
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.endm
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.globl memsetup
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memsetup:
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.globl lowlevel_init
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lowlevel_init:
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mov r10, lr
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@ -512,4 +512,4 @@ mem_init:
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mov pc, r10
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@ End memsetup
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@ End lowlevel_init
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@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS := csb226.o flash.o
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SOBJS := memsetup.o
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SOBJS := lowlevel_init.o
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$(LIB): $(OBJS) $(SOBJS)
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$(AR) crv $@ $(OBJS) $(SOBJS)
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@ -3,7 +3,7 @@
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*
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* NOTE: I haven't clean this up considerably, just enough to get it
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* running. See hal_platform_setup.h for the source. See
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* board/cradle/memsetup.S for another PXA250 setup that is
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* board/cradle/lowlevel_init.S for another PXA250 setup that is
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* much cleaner.
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*
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* See file CREDITS for list of people who contributed to this
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@ -46,8 +46,8 @@ _TEXT_BASE:
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* Memory setup
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*/
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.globl memsetup
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memsetup:
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.globl lowlevel_init
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lowlevel_init:
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mov r10, lr
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@ -429,9 +429,9 @@ initclks:
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#endif
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/* ---------------------------------------------------------------- */
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/* End memsetup */
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/* End lowlevel_init */
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/* ---------------------------------------------------------------- */
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endmemsetup:
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endlowlevel_init:
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mov pc, lr
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@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS := B2.o flash.o
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SOBJS := memsetup.o
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SOBJS := lowlevel_init.o
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$(LIB): $(OBJS) $(SOBJS)
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$(AR) crv $@ $(OBJS) $(SOBJS)
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@ -149,8 +149,8 @@ MEMORY_CONFIG:
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.word 0x20 /*MRSR7*/
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.globl memsetup
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memsetup:
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.globl lowlevel_init
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lowlevel_init:
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/*
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the next instruction fail due memory relocation...
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@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS = $(BOARD).o flash.o
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SOBJS = memsetup.o
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SOBJS = lowlevel_init.o
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$(LIB): .depend $(OBJS) $(SOBJS)
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$(AR) crv $@ $(OBJS) $(SOBJS)
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@ -16,8 +16,8 @@
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.set noreorder
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.set mips32
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.globl memsetup
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memsetup:
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.globl lowlevel_init
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lowlevel_init:
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/*
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* Step 1) Establish CPU endian mode.
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* Db1500-specific:
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@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS := dnp1110.o flash.o
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SOBJS := memsetup.o
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SOBJS := lowlevel_init.o
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$(LIB): $(OBJS) $(SOBJS)
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$(AR) crv $@ $(OBJS) $(SOBJS)
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@ -63,8 +63,8 @@ smcnfg: .long 0x00000000
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/* setting up the memory */
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.globl memsetup
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memsetup:
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.globl lowlevel_init
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lowlevel_init:
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ldr r0, MEM_BASE
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@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS := ep7312.o flash.o
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SOBJS := memsetup.o
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SOBJS := lowlevel_init.o
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$(LIB): $(OBJS) $(SOBJS)
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$(AR) crv $@ $(OBJS) $(SOBJS)
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@ -45,8 +45,8 @@ sdrfpr_val: .long 0x00000240
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sdconf_val: .long 0x00000522
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/* setting up the memory */
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.globl memsetup
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memsetup:
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.globl lowlevel_init
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lowlevel_init:
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/*
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* SYSCON1-3
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*/
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@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS := evb4510.o flash.o
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SOBJS := memsetup.o
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SOBJS := lowlevel_init.o
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$(LIB): $(OBJS) $(SOBJS)
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$(AR) crv $@ $^
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@ -31,7 +31,7 @@
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*
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* This memory map allows us to relocate from FLASH to SRAM. After
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* power-on reset the CPU only knows about the FLASH memory at address
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* 0x00000000. After memsetup completes the memory map will be:
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* 0x00000000. After lowlevel_init completes the memory map will be:
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*
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* Memory Addr
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* 0x00000000
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@ -54,8 +54,8 @@
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*
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***********************************************************************/
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.globl memsetup
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memsetup:
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.globl lowlevel_init
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lowlevel_init:
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/* preserve the temp register (r12 AKA ip) and remap it. */
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ldr r1, =SRAM_BASE+0xC
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@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS := gcplus.o flash.o
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SOBJS := memsetup.o
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SOBJS := lowlevel_init.o
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$(LIB): $(OBJS) $(SOBJS)
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$(AR) crv $@ $(OBJS) $(SOBJS)
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@ -29,11 +29,11 @@
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#include "version.h"
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.globl memsetup
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memsetup:
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.globl lowlevel_init
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lowlevel_init:
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/* The ADS GC+ for Linux Boot Rom Ver. 1.73 does memory init for us.
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* However the darn thing leaves the MMU enabled before handing control
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* over to us. So we need to disable the MMU and we use memsetup
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* over to us. So we need to disable the MMU and we use lowlevel_init
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* to do it.
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*/
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@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS := impa7.o flash.o
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SOBJS := memsetup.o
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SOBJS := lowlevel_init.o
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$(LIB): $(OBJS) $(SOBJS)
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$(AR) crv $@ $(OBJS) $(SOBJS)
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@ -39,8 +39,8 @@ memcfg2_val: .long 0x00000000 @ upper 16 bits are reserved for CS7 + CS6
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drfpr_val: .long 0x00000081
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/* setting up the memory */
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.globl memsetup
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memsetup:
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.globl lowlevel_init
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lowlevel_init:
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/*
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* DRFPR
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* 64kHz DRAM refresh
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@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS = $(BOARD).o flash.o
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SOBJS = memsetup.o
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SOBJS = lowlevel_init.o
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$(LIB): .depend $(OBJS) $(SOBJS)
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$(AR) crv $@ $(OBJS) $(SOBJS)
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@ -269,9 +269,9 @@ sdram_init:
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.end sdram_init
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.globl memsetup
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.ent memsetup
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memsetup:
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.globl lowlevel_init
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.ent lowlevel_init
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lowlevel_init:
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/* EBU, CGU and SDRAM Initialization.
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*/
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@ -292,4 +292,4 @@ memsetup:
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j ra
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nop
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.end memsetup
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.end lowlevel_init
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@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS := innokom.o flash.o
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SOBJS := memsetup.o
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SOBJS := lowlevel_init.o
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$(LIB): $(OBJS) $(SOBJS)
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$(AR) crv $@ $(OBJS) $(SOBJS)
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@ -3,7 +3,7 @@
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*
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* NOTE: I haven't clean this up considerably, just enough to get it
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* running. See hal_platform_setup.h for the source. See
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* board/cradle/memsetup.S for another PXA250 setup that is
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* board/cradle/lowlevel_init.S for another PXA250 setup that is
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* much cleaner.
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*
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* See file CREDITS for list of people who contributed to this
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@ -46,8 +46,8 @@ _TEXT_BASE:
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* Memory setup
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*/
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.globl memsetup
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memsetup:
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.globl lowlevel_init
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lowlevel_init:
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mov r10, lr
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@ -429,9 +429,9 @@ initclks:
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#endif
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/* ---------------------------------------------------------------- */
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/* End memsetup */
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/* End lowlevel_init */
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/* ---------------------------------------------------------------- */
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endmemsetup:
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endlowlevel_init:
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mov pc, lr
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@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS := lart.o flash.o
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SOBJS := flashasm.o memsetup.o
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SOBJS := flashasm.o lowlevel_init.o
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$(LIB): $(OBJS) $(SOBJS)
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$(AR) crv $@ $(OBJS) $(SOBJS)
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@ -53,8 +53,8 @@ mecr: .long 0x00060006
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/* setting up the memory */
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.globl memsetup
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memsetup:
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.globl lowlevel_init
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lowlevel_init:
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ldr r0, MEM_BASE
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/* Setup the flash memory */
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@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS := logodl.o flash.o
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SOBJS := memsetup.o
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SOBJS := lowlevel_init.o
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$(LIB): $(OBJS) $(SOBJS)
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$(AR) crv $@ $^
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@ -3,7 +3,7 @@
|
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*
|
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* NOTE: I haven't clean this up considerably, just enough to get it
|
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* running. See hal_platform_setup.h for the source. See
|
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* board/cradle/memsetup.S for another PXA250 setup that is
|
||||
* board/cradle/lowlevel_init.S for another PXA250 setup that is
|
||||
* much cleaner.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
@ -46,8 +46,8 @@ _TEXT_BASE:
|
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* Memory setup
|
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*/
|
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|
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.globl memsetup
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memsetup:
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.globl lowlevel_init
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lowlevel_init:
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|
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mov r10, lr
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@ -429,9 +429,9 @@ initclks:
|
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#endif
|
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|
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/* ---------------------------------------------------------------- */
|
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/* End memsetup */
|
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/* End lowlevel_init */
|
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/* ---------------------------------------------------------------- */
|
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|
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endmemsetup:
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endlowlevel_init:
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|
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mov pc, lr
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@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
|
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LIB = lib$(BOARD).a
|
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|
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OBJS := lpd7a40x.o flash.o
|
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SOBJS := memsetup.o
|
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SOBJS := lowlevel_init.o
|
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|
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$(LIB): $(OBJS) $(SOBJS)
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$(AR) crv $@ $(OBJS) $(SOBJS)
|
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|
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@ -131,8 +131,8 @@
|
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_TEXT_BASE:
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.word TEXT_BASE
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.globl memsetup
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memsetup:
|
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.globl lowlevel_init
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lowlevel_init:
|
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mov r9, lr @ save return address
|
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|
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/* memory control configuration */
|
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@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
|
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LIB = lib$(BOARD).a
|
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|
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OBJS := lubbock.o flash.o
|
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SOBJS := memsetup.o
|
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SOBJS := lowlevel_init.o
|
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|
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$(LIB): $(OBJS) $(SOBJS)
|
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$(AR) crv $@ $(OBJS) $(SOBJS)
|
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|
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@ -3,7 +3,7 @@
|
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*
|
||||
* NOTE: I haven't clean this up considerably, just enough to get it
|
||||
* running. See hal_platform_setup.h for the source. See
|
||||
* board/cradle/memsetup.S for another PXA250 setup that is
|
||||
* board/cradle/lowlevel_init.S for another PXA250 setup that is
|
||||
* much cleaner.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
@ -43,8 +43,8 @@ DRAM_SIZE: .long CFG_DRAM_SIZE
|
||||
* Memory setup
|
||||
*/
|
||||
|
||||
.globl memsetup
|
||||
memsetup:
|
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.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
|
||||
mov r10, lr
|
||||
|
||||
@ -403,9 +403,9 @@ initclks:
|
||||
#endif
|
||||
|
||||
/* ---------------------------------------------------------------- */
|
||||
/* End memsetup */
|
||||
/* End lowlevel_init */
|
||||
/* ---------------------------------------------------------------- */
|
||||
|
||||
endmemsetup:
|
||||
endlowlevel_init:
|
||||
|
||||
mov pc, lr
|
||||
@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS := modnet50.o flash.o
|
||||
SOBJS := memsetup.o
|
||||
SOBJS := lowlevel_init.o
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS)
|
||||
$(AR) crv $@ $^
|
||||
|
||||
@ -51,8 +51,8 @@
|
||||
#define NETARM_MMAP_CS4_MASK (~(PHYS_EXT_SIZE - 1))
|
||||
|
||||
/* setting up the memory */
|
||||
.globl memsetup
|
||||
memsetup:
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
|
||||
#if defined(CONFIG_MODNET50)
|
||||
ldr pc, =(_jump_to_high + NETARM_MMAP_CS0_BASE - TEXT_BASE)
|
||||
@ -187,7 +187,7 @@ memsetup_cs3:
|
||||
#endif /* CONFIG_MODNET50 */
|
||||
|
||||
|
||||
memsetup_end:
|
||||
lowlevel_init_end:
|
||||
/*
|
||||
* manipulate address in lr and ip to match new
|
||||
* address space
|
||||
@ -28,7 +28,7 @@ LIB = lib$(BOARD).a
|
||||
OBJS := vcma9.o flash.o cmd_vcma9.o
|
||||
OBJS += ../common/common_util.o ../common/memtst.o
|
||||
|
||||
SOBJS := memsetup.o
|
||||
SOBJS := lowlevel_init.o
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS)
|
||||
$(AR) crv $@ $(OBJS) $(SOBJS)
|
||||
|
||||
@ -130,8 +130,8 @@
|
||||
_TEXT_BASE:
|
||||
.word TEXT_BASE
|
||||
|
||||
.globl memsetup
|
||||
memsetup:
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
/* memory control configuration */
|
||||
/* make r0 relative the current location so that it */
|
||||
/* reads SMRDATA out of FLASH rather than memory ! */
|
||||
@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS := mx1ads.o syncflash.o
|
||||
SOBJS := memsetup.o
|
||||
SOBJS := lowlevel_init.o
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS)
|
||||
$(AR) crv $@ $(OBJS) $(SOBJS)
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* board/mx1ads/memsetup.S
|
||||
* board/mx1ads/lowlevel_init.S
|
||||
*
|
||||
* (c) Copyright 2004
|
||||
* Techware Information Technology, Inc.
|
||||
@ -33,8 +33,8 @@
|
||||
_TEXT_BASE:
|
||||
.word TEXT_BASE
|
||||
|
||||
.globl memsetup
|
||||
memsetup:
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
/* memory controller init */
|
||||
|
||||
ldr r1, =SDCTL0
|
||||
@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS := mx1fs2.o flash.o
|
||||
SOBJS := memsetup.o
|
||||
SOBJS := lowlevel_init.o
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS)
|
||||
$(AR) crv $@ $^
|
||||
|
||||
@ -22,8 +22,8 @@
|
||||
#include <version.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
|
||||
.globl memsetup
|
||||
memsetup:
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
|
||||
mov r10, lr
|
||||
|
||||
@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS := pleb2.o flash.o
|
||||
SOBJS := memsetup.o
|
||||
SOBJS := lowlevel_init.o
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS)
|
||||
$(AR) crv $@ $(OBJS) $(SOBJS)
|
||||
|
||||
@ -33,8 +33,8 @@ DRAM_SIZE: .long CFG_DRAM_SIZE
|
||||
sub pc,pc,#4
|
||||
.endm
|
||||
|
||||
.globl memsetup
|
||||
memsetup:
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
|
||||
mov r10, lr
|
||||
|
||||
@ -485,4 +485,4 @@ mem_init:
|
||||
|
||||
mov pc, r10
|
||||
|
||||
@ End memsetup
|
||||
@ End lowlevel_init
|
||||
@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS = $(BOARD).o flash.o sconsole.o
|
||||
SOBJS = memsetup.o
|
||||
SOBJS = lowlevel_init.o
|
||||
|
||||
$(LIB): .depend $(OBJS) $(SOBJS)
|
||||
$(AR) crv $@ $(OBJS)
|
||||
|
||||
@ -28,8 +28,8 @@
|
||||
|
||||
#define MC_IOGP 0xBF800800
|
||||
|
||||
.globl memsetup
|
||||
memsetup:
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
li t0, MC_IOGP
|
||||
li t1, 0xf24
|
||||
sw t1, 0(t0)
|
||||
@ -35,7 +35,7 @@ SECTIONS
|
||||
.text :
|
||||
{
|
||||
cpu/mips/start.o (.text)
|
||||
board/purple/memsetup.o (.text)
|
||||
board/purple/lowlevel_init.o (.text)
|
||||
cpu/mips/cache.o (.text)
|
||||
common/main.o (.text)
|
||||
common/dlmalloc.o (.text)
|
||||
|
||||
@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS := scb9328.o flash.o
|
||||
SOBJS := memsetup.o
|
||||
SOBJS := lowlevel_init.o
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS)
|
||||
$(AR) crv $@ $^
|
||||
|
||||
@ -22,8 +22,8 @@
|
||||
#include <version.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
|
||||
.globl memsetup
|
||||
memsetup:
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
|
||||
mov r10, lr
|
||||
|
||||
@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS := shannon.o flash.o
|
||||
SOBJS := memsetup.o
|
||||
SOBJS := lowlevel_init.o
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS)
|
||||
$(AR) crv $@ $(OBJS) $(SOBJS)
|
||||
|
||||
@ -51,8 +51,8 @@ mecr: .long 0x7fff7fff @ 01000000
|
||||
|
||||
/* setting up the memory */
|
||||
|
||||
.globl memsetup
|
||||
memsetup:
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
ldr r0, MEM_BASE
|
||||
|
||||
/* Setup the flash memory */
|
||||
@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS := smdk2400.o flash.o
|
||||
SOBJS := memsetup.o
|
||||
SOBJS := lowlevel_init.o
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS)
|
||||
$(AR) crv $@ $(OBJS) $(SOBJS)
|
||||
|
||||
@ -125,8 +125,8 @@
|
||||
_TEXT_BASE:
|
||||
.word TEXT_BASE
|
||||
|
||||
.globl memsetup
|
||||
memsetup:
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
/* memory control configuration */
|
||||
/* make r0 relative the current location so that it */
|
||||
/* reads SMRDATA out of FLASH rather than memory ! */
|
||||
@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS := smdk2410.o flash.o
|
||||
SOBJS := memsetup.o
|
||||
SOBJS := lowlevel_init.o
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS)
|
||||
$(AR) crv $@ $(OBJS) $(SOBJS)
|
||||
|
||||
@ -129,8 +129,8 @@
|
||||
_TEXT_BASE:
|
||||
.word TEXT_BASE
|
||||
|
||||
.globl memsetup
|
||||
memsetup:
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
/* memory control configuration */
|
||||
/* make r0 relative the current location so that it */
|
||||
/* reads SMRDATA out of FLASH rather than memory ! */
|
||||
@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS = $(BOARD).o flash.o vr4131-pci.o
|
||||
SOBJS = memsetup.o
|
||||
SOBJS = lowlevel_init.o
|
||||
|
||||
$(LIB): .depend $(OBJS) $(SOBJS)
|
||||
$(AR) crv $@ $(OBJS) $(SOBJS)
|
||||
|
||||
@ -14,8 +14,8 @@
|
||||
#include <asm/regdef.h>
|
||||
|
||||
|
||||
.globl memsetup
|
||||
memsetup:
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
|
||||
/* BCUCNTREG1 = 0x0040 */
|
||||
la t0, 0xaf000000
|
||||
@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS := trab.o flash.o vfd.o cmd_trab.o memory.o tsc2000.o auto_update.o
|
||||
SOBJS := memsetup.o
|
||||
SOBJS := lowlevel_init.o
|
||||
|
||||
gcclibdir := $(shell dirname `$(CC) -print-libgcc-file-name`)
|
||||
|
||||
|
||||
@ -140,8 +140,8 @@
|
||||
_TEXT_BASE:
|
||||
.word TEXT_BASE
|
||||
|
||||
.globl memsetup
|
||||
memsetup:
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
/* memory control configuration */
|
||||
/* make r0 relative the current location so that it */
|
||||
/* reads SMRDATA out of FLASH rather than memory ! */
|
||||
@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS := wepep250.o flash.o
|
||||
SOBJS := memsetup.o
|
||||
SOBJS := lowlevel_init.o
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS)
|
||||
$(AR) crv $@ $(OBJS) $(SOBJS)
|
||||
|
||||
@ -35,8 +35,8 @@
|
||||
#include <version.h>
|
||||
#include <asm/arch/pxa-regs.h>
|
||||
|
||||
.globl memsetup
|
||||
memsetup:
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
|
||||
mov r10, lr
|
||||
|
||||
@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS := xaeniax.o flash.o
|
||||
SOBJS := memsetup.o
|
||||
SOBJS := lowlevel_init.o
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS)
|
||||
$(AR) crv $@ $(OBJS) $(SOBJS)
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
*
|
||||
* NOTE: I haven't clean this up considerably, just enough to get it
|
||||
* running. See hal_platform_setup.h for the source. See
|
||||
* board/cradle/memsetup.S for another PXA250 setup that is
|
||||
* board/cradle/lowlevel_init.S for another PXA250 setup that is
|
||||
* much cleaner.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
@ -39,8 +39,8 @@ DRAM_SIZE: .long CFG_DRAM_SIZE
|
||||
.endm
|
||||
|
||||
|
||||
.globl memsetup
|
||||
memsetup:
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
|
||||
mov r10, lr
|
||||
|
||||
@ -416,9 +416,9 @@ test:
|
||||
#endif
|
||||
|
||||
/* ---------------------------------------------------------------- */
|
||||
/* End memsetup */
|
||||
/* End lowlevel_init */
|
||||
/* ---------------------------------------------------------------- */
|
||||
|
||||
endmemsetup:
|
||||
endlowlevel_init:
|
||||
|
||||
mov pc, lr
|
||||
@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS := xm250.o flash.o
|
||||
SOBJS := memsetup.o
|
||||
SOBJS := lowlevel_init.o
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS)
|
||||
$(AR) crv $@ $^
|
||||
|
||||
@ -43,8 +43,8 @@ DRAM_SIZE: .long CFG_DRAM_SIZE
|
||||
.endm
|
||||
*/
|
||||
|
||||
.globl memsetup
|
||||
memsetup:
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
|
||||
mov r10, lr
|
||||
|
||||
@ -516,4 +516,4 @@ mem_init:
|
||||
|
||||
mov pc, r10
|
||||
|
||||
@ End memsetup
|
||||
@ End lowlevel_init
|
||||
@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS := xsengine.o flash.o
|
||||
SOBJS := memsetup.o
|
||||
SOBJS := lowlevel_init.o
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS)
|
||||
$(AR) crv $@ $(OBJS) $(SOBJS)
|
||||
|
||||
@ -4,8 +4,8 @@
|
||||
|
||||
DRAM_SIZE: .long CFG_DRAM_SIZE
|
||||
|
||||
.globl memsetup
|
||||
memsetup:
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
|
||||
mov r10, lr
|
||||
|
||||
@ -316,10 +316,10 @@ cpu_init_crit:
|
||||
/*
|
||||
* before relocating, we have to setup RAM timing
|
||||
* because memory timing is board-dependent, you will
|
||||
* find a memsetup.S in your board directory.
|
||||
* find a lowlevel_init.S in your board directory.
|
||||
*/
|
||||
mov ip, lr
|
||||
bl memsetup
|
||||
bl lowlevel_init
|
||||
mov lr, ip
|
||||
|
||||
mov pc, lr
|
||||
|
||||
@ -257,10 +257,10 @@ cpu_init_crit:
|
||||
/*
|
||||
* before relocating, we have to setup RAM timing
|
||||
* because memory timing is board-dependend, you will
|
||||
* find a memsetup.S in your board directory.
|
||||
* find a lowlevel_init.S in your board directory.
|
||||
*/
|
||||
mov ip, lr
|
||||
bl memsetup
|
||||
bl lowlevel_init
|
||||
mov lr, ip
|
||||
|
||||
mov pc, lr
|
||||
|
||||
@ -30,7 +30,7 @@
|
||||
#include <config.h>
|
||||
#include <version.h>
|
||||
|
||||
#ifdef CONFIG_BOOTBINFUNC
|
||||
#ifdef CONFIG_INIT_CRITICAL
|
||||
/*
|
||||
* some parameters for the board
|
||||
*
|
||||
@ -197,4 +197,4 @@ SMRDATA1:
|
||||
.word SDRAM
|
||||
.word SDRAM_VAL
|
||||
/* SMRDATA1 is 176 bytes long */
|
||||
#endif /* CONFIG_BOOTBINFUNC */
|
||||
#endif /* CONFIG_INIT_CRITICAL */
|
||||
|
||||
@ -115,7 +115,7 @@ reset:
|
||||
orr r0,r0,#0xd3 /* was 13 */
|
||||
msr cpsr,r0
|
||||
|
||||
#ifdef CONFIG_BOOTBINFUNC
|
||||
#ifdef CONFIG_INIT_CRITICAL
|
||||
/* scratch stack */
|
||||
ldr r1, =0x00204000
|
||||
/* Insure word alignment */
|
||||
@ -141,7 +141,7 @@ reset:
|
||||
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
|
||||
orr r0, r0, #0xC0000000 @ set bits 31:30 (iA, nF)
|
||||
mcr p15, 0, r0, c1, c0, 0 @ write r0 in cp15 control register (cp15 r1)
|
||||
#endif /* CONFIG_BOOTBINFUNC */
|
||||
#endif /* CONFIG_INIT_CRITICAL */
|
||||
/*
|
||||
* relocate exeception table
|
||||
*/
|
||||
@ -160,9 +160,7 @@ copyex:
|
||||
*/
|
||||
#ifdef CONFIG_INIT_CRITICAL
|
||||
bl cpu_init_crit
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOOTBINFUNC
|
||||
relocate: /* relocate U-Boot to RAM */
|
||||
adr r0, _start /* r0 <- current position of code */
|
||||
ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
|
||||
@ -179,7 +177,7 @@ copy_loop:
|
||||
stmia r1!, {r3-r10} /* copy to target address [r1] */
|
||||
cmp r0, r2 /* until source end addreee [r2] */
|
||||
ble copy_loop
|
||||
#endif /* CONFIG_BOOTBINFUNC */
|
||||
#endif /* CONFIG_INIT_CRITICAL */
|
||||
|
||||
/* Set up the stack */
|
||||
stack_setup:
|
||||
|
||||
@ -229,10 +229,10 @@ cpu_init_crit:
|
||||
/*
|
||||
* before relocating, we have to setup RAM timing
|
||||
* because memory timing is board-dependend, you will
|
||||
* find a memsetup.S in your board directory.
|
||||
* find a lowlevel_init.S in your board directory.
|
||||
*/
|
||||
mov ip, lr
|
||||
bl memsetup
|
||||
bl lowlevel_init
|
||||
mov lr, ip
|
||||
|
||||
mov pc, lr
|
||||
|
||||
@ -243,7 +243,7 @@ reset:
|
||||
|
||||
/* Initialize any external memory.
|
||||
*/
|
||||
bal memsetup
|
||||
bal lowlevel_init
|
||||
nop
|
||||
|
||||
/* Initialize caches...
|
||||
|
||||
@ -218,10 +218,10 @@ setspeed_done:
|
||||
/*
|
||||
* before relocating, we have to setup RAM timing
|
||||
* because memory timing is board-dependend, you will
|
||||
* find a memsetup.S in your board directory.
|
||||
* find a lowlevel_init.S in your board directory.
|
||||
*/
|
||||
mov ip, lr
|
||||
bl memsetup
|
||||
bl lowlevel_init
|
||||
mov lr, ip
|
||||
|
||||
/* Memory interfaces are working. Disable MMU and enable I-cache. */
|
||||
|
||||
@ -117,9 +117,9 @@ reset:
|
||||
/*
|
||||
* before relocating, we have to setup RAM timing
|
||||
* because memory timing is board-dependend, you will
|
||||
* find a memsetup.S in your board directory.
|
||||
* find a lowlevel_init.S in your board directory.
|
||||
*/
|
||||
bl memsetup
|
||||
bl lowlevel_init
|
||||
#endif
|
||||
|
||||
relocate: /* relocate U-Boot to RAM */
|
||||
|
||||
@ -213,10 +213,10 @@ cpu_init_crit:
|
||||
/*
|
||||
* before relocating, we have to setup RAM timing
|
||||
* because memory timing is board-dependend, you will
|
||||
* find a memsetup.S in your board directory.
|
||||
* find a lowlevel_init.S in your board directory.
|
||||
*/
|
||||
mov ip, lr
|
||||
bl memsetup
|
||||
bl lowlevel_init
|
||||
mov lr, ip
|
||||
|
||||
/*
|
||||
|
||||
@ -47,7 +47,7 @@ Files:
|
||||
|
||||
cpu/arm720t/serial_netarm.c .. serial I/O for the cpu
|
||||
|
||||
board/modnet50/memsetup.S .. memory setup for ModNET50
|
||||
board/modnet50/lowlevel_init.S .. memory setup for ModNET50
|
||||
board/modnet50/flash.c .. flash routines
|
||||
board/modnet50/modnet50.c .. some board init stuff
|
||||
|
||||
|
||||
@ -34,7 +34,7 @@
|
||||
* If we are developing, we might want to start armboot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
|
||||
@ -27,7 +27,7 @@
|
||||
* If we are developing, we might want to start armboot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
|
||||
@ -33,7 +33,7 @@
|
||||
* If we are developing, we might want to start armboot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
|
||||
@ -29,7 +29,7 @@
|
||||
* If we are developing, we might want to start armboot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
/* ARM asynchronous clock */
|
||||
#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
|
||||
@ -44,10 +44,7 @@
|
||||
#define CONFIG_SETUP_MEMORY_TAGS 1
|
||||
#define CONFIG_INITRD_TAG 1
|
||||
|
||||
/* define this to include the functionality of boot.bin in u-boot */
|
||||
#undef CONFIG_BOOTBINFUNC
|
||||
|
||||
#ifdef CONFIG_BOOTBINFUNC
|
||||
#ifdef CONFIG_INIT_CRITICAL
|
||||
#define CFG_USE_MAIN_OSCILLATOR 1
|
||||
/* flash */
|
||||
#define MC_PUIA_VAL 0x00000000
|
||||
@ -77,7 +74,7 @@
|
||||
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
|
||||
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
|
||||
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
|
||||
#endif
|
||||
#endif /* CONFIG_INIT_CRITICAL */
|
||||
/*
|
||||
* Size of malloc() pool
|
||||
*/
|
||||
@ -180,19 +177,19 @@
|
||||
#define CFG_ENV_SIZE 0x2000 /* 0x8000 */
|
||||
#else
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#ifdef CONFIG_BOOTBINFUNC
|
||||
#ifdef CONFIG_INIT_CRITICAL
|
||||
#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */
|
||||
#define CFG_ENV_SIZE 0x10000 /* sectors are 64K here */
|
||||
#else
|
||||
#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */
|
||||
#define CFG_ENV_SIZE 0x2000 /* 0x8000 */
|
||||
#endif
|
||||
#endif
|
||||
#endif /* CONFIG_INIT_CRITICAL */
|
||||
#endif /* CFG_ENV_IS_IN_DATAFLASH */
|
||||
|
||||
|
||||
#define CFG_LOAD_ADDR 0x21000000 /* default load address */
|
||||
|
||||
#ifdef CONFIG_BOOTBINFUNC
|
||||
#ifdef CONFIG_INIT_CRITICAL
|
||||
#define CFG_BOOT_SIZE 0x00 /* 0 KBytes */
|
||||
#define CFG_U_BOOT_BASE PHYS_FLASH_1
|
||||
#define CFG_U_BOOT_SIZE 0x60000 /* 384 KBytes */
|
||||
@ -200,7 +197,7 @@
|
||||
#define CFG_BOOT_SIZE 0x6000 /* 24 KBytes */
|
||||
#define CFG_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000)
|
||||
#define CFG_U_BOOT_SIZE 0x10000 /* 64 KBytes */
|
||||
#endif
|
||||
#endif /* CONFIG_INIT_CRITICAL */
|
||||
|
||||
#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
|
||||
|
||||
|
||||
@ -29,7 +29,7 @@
|
||||
* If we are developing, we might want to start armboot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
/* ARM asynchronous clock */
|
||||
#define AT91C_MAIN_CLOCK 207360000 /* from 18.432 MHz crystal (18432000 / 4 * 45) */
|
||||
@ -44,15 +44,7 @@
|
||||
#define CONFIG_SETUP_MEMORY_TAGS 1
|
||||
#define CONFIG_INITRD_TAG 1
|
||||
|
||||
/* define this to include the functionality of boot.bin in u-boot */
|
||||
#define CONFIG_BOOTBINFUNC
|
||||
|
||||
/* just to make sure */
|
||||
#ifndef CONFIG_BOOTBINFUNC
|
||||
#define CONFIG_BOOTBINFUNC
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOOTBINFUNC
|
||||
#ifdef CONFIG_INIT_CRITICAL
|
||||
#define CFG_USE_MAIN_OSCILLATOR 1
|
||||
/* flash */
|
||||
#define MC_PUIA_VAL 0x00000000
|
||||
@ -82,7 +74,7 @@
|
||||
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
|
||||
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
|
||||
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
|
||||
#endif
|
||||
#endif /* CONFIG_INIT_CRITICAL */
|
||||
|
||||
/*
|
||||
* Size of malloc() pool
|
||||
|
||||
@ -32,7 +32,7 @@
|
||||
* If we are developing, we might want to start armboot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
@ -306,7 +306,7 @@
|
||||
#else
|
||||
#define CFG_MDCNFG_VAL 0x00001aa1 /* FIXME can DTC be 01? */
|
||||
#define CFG_MDMRS_VAL 0x00000000
|
||||
#define CFG_MDREFR_VAL 0x00403018 /* Initial setting, individual bits set in memsetup.S */
|
||||
#define CFG_MDREFR_VAL 0x00403018 /* Initial setting, individual bits set in lowlevel_init.S */
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
||||
@ -37,7 +37,7 @@
|
||||
* If we are developing, we might want to start U-Boot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
|
||||
@ -31,8 +31,7 @@
|
||||
* If we are developing, we might want to start armboot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#undef CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#undef CONFIG_INIT_CRITICAL
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
|
||||
@ -31,7 +31,7 @@
|
||||
* If we are developing, we might want to start armboot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
|
||||
@ -33,7 +33,7 @@
|
||||
* Also swap the flash1 and flash2 addresses during debug.
|
||||
*
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
|
||||
@ -38,7 +38,7 @@
|
||||
* e.g. bootp/tftp download of the kernel is a far more convenient
|
||||
* when testing new kernels on this target. However the ADS GCPlus Linux
|
||||
* boot ROM leaves the MMU enabled when it passes control to U-Boot. So
|
||||
* we use memsetup (CONFIG_INIT_CRITICAL) to remedy that problem.
|
||||
* we use lowlevel_init (CONFIG_INIT_CRITICAL) to remedy that problem.
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
|
||||
@ -31,7 +31,7 @@
|
||||
* If we are developing, we might want to start armboot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
|
||||
@ -34,7 +34,7 @@
|
||||
* If we are developing, we might want to start U-Boot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
|
||||
@ -41,7 +41,7 @@
|
||||
* If we are developing, we might want to start armboot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
|
||||
|
||||
|
||||
@ -31,7 +31,7 @@
|
||||
* If we are developing, we might want to start armboot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
|
||||
@ -34,7 +34,7 @@
|
||||
* If we are developing, we might want to start U-Boot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
|
||||
@ -27,7 +27,7 @@
|
||||
* If we are developing, we might want to start armboot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
#undef CONFIG_USE_IRQ
|
||||
|
||||
|
||||
@ -27,7 +27,7 @@
|
||||
* If we are developing, we might want to start armboot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
#undef CONFIG_USE_IRQ
|
||||
|
||||
|
||||
@ -34,7 +34,7 @@
|
||||
* If we are developing, we might want to start armboot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
|
||||
@ -31,7 +31,7 @@
|
||||
* If we are developing, we might want to start u-boot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
|
||||
@ -32,7 +32,7 @@
|
||||
* If we are developing, we might want to start armboot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
|
||||
@ -31,7 +31,7 @@
|
||||
* If we are developing, we might want to start armboot from ram
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#define CONFIG_INIT_CRITICAL
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user