Blackfin: IP04: new board port
A low cost 4 port IP-PBX board. Signed-off-by: Brent Kandetzki <BrentK@teleco.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Brent Kandetzki
Mike Frysinger
parent
a3c08363b9
commit
3f1a5c1655
@ -1008,6 +1008,10 @@ Anton Shurpin <shurpin.aa@niistt.ru>
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BF561-ACVILON BF561
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Brent Kandetzki <brentk@teleco.com>
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IP04 BF532
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#########################################################################
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# End of MAINTAINERS list #
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#########################################################################
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1
MAKEALL
1
MAKEALL
@ -905,6 +905,7 @@ LIST_blackfin=" \
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cm-bf548 \
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cm-bf561 \
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ibf-dsp561 \
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ip04 \
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tcm-bf518 \
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tcm-bf537 \
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"
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2
Makefile
2
Makefile
@ -3554,7 +3554,7 @@ BFIN_BOARDS += cm-bf527 cm-bf533 cm-bf537e cm-bf537u cm-bf548 cm-bf561 \
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tcm-bf518 tcm-bf537
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# Misc third party boards
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BFIN_BOARDS += bf537-minotaur bf537-srv1 bf561-acvilon blackstamp
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BFIN_BOARDS += bf537-minotaur bf537-srv1 bf561-acvilon blackstamp ip04
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# I-SYST Micromodule
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BFIN_BOARDS += ibf-dsp561
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54
board/ip04/Makefile
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54
board/ip04/Makefile
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@ -0,0 +1,54 @@
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#
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# U-boot - Makefile
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#
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# Copyright (c) 2005-2010 Analog Device Inc.
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).a
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COBJS-y := $(BOARD).o
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SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS-y))
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SOBJS := $(addprefix $(obj),$(SOBJS-y))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS)
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$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
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clean:
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rm -f $(SOBJS) $(OBJS)
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distclean: clean
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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35
board/ip04/config.mk
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35
board/ip04/config.mk
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@ -0,0 +1,35 @@
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#
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# Copyright (c) 2005-2008 Analog Device Inc.
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#
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# (C) Copyright 2001
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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# This is not actually used for Blackfin boards so do not change it
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#TEXT_BASE = do-not-use-me
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CFLAGS_lib_generic += -O2
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CFLAGS_lzma += -O2
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# Set some default LDR flags based on boot mode.
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LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
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LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6
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LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
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42
board/ip04/ip04.c
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42
board/ip04/ip04.c
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@ -0,0 +1,42 @@
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/*
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* U-boot - main board file
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*
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* Copyright (c) 2007 David Rowe,
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* (c) 2006 Ivan Danov
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*
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* (C) Copyright 2000-2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <common.h>
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#include <net.h>
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#include <netdev.h>
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#include <asm/net.h>
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int checkboard(void)
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{
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printf("Board: IP04 IP-PBX\n");
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printf(" http://www.rowetel.com/ucasterisk/ip04.html\n");
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return 0;
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}
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#ifdef CONFIG_DRIVER_DM9000
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int board_eth_init(bd_t *bis)
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{
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return dm9000_initialize(bis);
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}
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int misc_init_r(void)
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{
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uchar enetaddr[6];
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if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
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puts("Warning: Generating 'random' MAC address\n");
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bfin_gen_rand_mac(enetaddr);
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eth_setenv_enetaddr("ethaddr", enetaddr);
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}
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return 0;
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}
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#endif
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157
include/configs/ip04.h
Normal file
157
include/configs/ip04.h
Normal file
@ -0,0 +1,157 @@
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/*
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* U-boot - Configuration file for IP04 board (having BF532 processor)
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*
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* Copyright (c) 2006 Intratrade Ltd., Ivan Danov, idanov@gmail.com
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*
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* Copyright (c) 2005-2010 Analog Devices Inc.
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*
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* (C) Copyright 2000-2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef __CONFIG_IP04_H__
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#define __CONFIG_IP04_H__
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#include <asm/config-pre.h>
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/*
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* Processor Settings
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*/
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#define CONFIG_BFIN_CPU bf532-0.5
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#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_NAND
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/*
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* Clock Settings
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* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
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* SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
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*/
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/* CONFIG_CLKIN_HZ is any value in Hz */
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#define CONFIG_CLKIN_HZ 10000000
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/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
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/* 1 = CLKIN / 2 */
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#define CONFIG_CLKIN_HALF 0
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/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
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/* 1 = bypass PLL */
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#define CONFIG_PLL_BYPASS 0
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/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
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/* Values can range from 0-63 (where 0 means 64) */
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#define CONFIG_VCO_MULT 40
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/* CCLK_DIV controls the core clock divider */
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/* Values can be 1, 2, 4, or 8 ONLY */
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#define CONFIG_CCLK_DIV 1
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/* SCLK_DIV controls the system clock divider */
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/* Values can range from 1-15 */
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#define CONFIG_SCLK_DIV 3
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/*
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* Memory Settings
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*/
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#define CONFIG_MEM_ADD_WDTH 10
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#define CONFIG_MEM_SIZE 64
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#define CONFIG_EBIU_SDRRC_VAL 0x408
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#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd
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#define CONFIG_EBIU_AMGCTL_VAL 0xFF
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#define CONFIG_EBIU_AMBCTL0_VAL 0xffc2ffc2
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#define CONFIG_EBIU_AMBCTL1_VAL 0xffc2ffc2
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#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
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/*
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* Network Settings
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*/
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#define ADI_CMDS_NETWORK 1
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#define CONFIG_NET_MULTI 1
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#define CONFIG_HOSTNAME IP04
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#define CONFIG_DRIVER_DM9000 1
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#define CONFIG_DM9000_NO_SROM
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#define CONFIG_DM9000_BASE 0x20100000
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#define DM9000_IO CONFIG_DM9000_BASE
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#define DM9000_DATA (CONFIG_DM9000_BASE + 2)
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/*
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* Flash Settings
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*/
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#define CONFIG_ENV_OVERWRITE 1
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#define CONFIG_SYS_NO_FLASH /* we have only NAND */
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/*
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* SPI Settings
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*/
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#define CONFIG_BFIN_SPI
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#define CONFIG_ENV_SPI_MAX_HZ 30000000
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#define CONFIG_SF_DEFAULT_SPEED 30000000
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_STMICRO
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#define CONFIG_SPI_FLASH_WINBOND
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/*
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* Env Storage Settings
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*/
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#define CONFIG_PREBOOT "echo starting from spi flash"
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#define CONFIG_ENV_OFFSET 0x30000
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#define CONFIG_ENV_SIZE 0x10000
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#define CONFIG_ENV_SECT_SIZE 0x10000
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/*
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* NAND Settings
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*/
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#define CONFIG_NAND_PLAT
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#define CONFIG_SYS_NAND_BASE 0x20000000
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2))
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#define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 1))
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#define BFIN_NAND_READY PF10
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#define BFIN_NAND_WRITE(addr, cmd) \
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do { \
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bfin_write8(addr, cmd); \
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SSYNC(); \
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} while (0)
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#define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd)
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#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
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#define NAND_PLAT_DEV_READY(chip) (bfin_read_FIO_FLAG_D() & BFIN_NAND_READY)
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#define NAND_PLAT_INIT() \
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do { \
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bfin_write_FIO_DIR(bfin_read_FIO_DIR() & ~BFIN_NAND_READY); \
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bfin_write_FIO_INEN(bfin_read_FIO_INEN() | BFIN_NAND_READY); \
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bfin_write_FIO_EDGE(bfin_read_FIO_EDGE() & ~BFIN_NAND_READY); \
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bfin_write_FIO_POLAR(bfin_read_FIO_POLAR() & ~BFIN_NAND_READY); \
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} while (0)
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/*
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* Misc Settings
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*/
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_MISC_INIT_R /* needed for MAC address */
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#define CONFIG_UART_CONSOLE 0
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#undef CONFIG_SHOW_BOOT_PROGRESS
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/* Enable this if bootretry required; currently it's disabled */
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#define CONFIG_BOOT_RETRY_TIME -1
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#define CONFIG_BOOTCOMMAND "run nandboot"
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#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n"
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/*
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* Pull in common ADI header for remaining command/environment setup
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*/
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#include <configs/bfin_adi_common.h>
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#endif
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